JPH10504934A - 組立て型半導体チップキャリア - Google Patents
組立て型半導体チップキャリアInfo
- Publication number
- JPH10504934A JPH10504934A JP7523542A JP52354295A JPH10504934A JP H10504934 A JPH10504934 A JP H10504934A JP 7523542 A JP7523542 A JP 7523542A JP 52354295 A JP52354295 A JP 52354295A JP H10504934 A JPH10504934 A JP H10504934A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor die
- die carrier
- leads
- lead
- carrier according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/45111—Tin (Sn) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/45164—Palladium (Pd) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49174—Stacked arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4943—Connecting portions the connecting portions being staggered
- H01L2224/49431—Connecting portions the connecting portions being staggered on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4943—Connecting portions the connecting portions being staggered
- H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85444—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01018—Argon [Ar]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01023—Vanadium [V]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
- H05K3/3426—Leaded components characterised by the leads
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
- Y10T29/49151—Assembling terminal to base by deforming or shaping
- Y10T29/49153—Assembling terminal to base by deforming or shaping with shaping or forcing terminal into base aperture
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1. 複数の電気絶縁側壁と、 前記側壁の少なくとも1つから延出し、かつ、リードフレームを用いずして個 々に製造される複数の導電性リード線と、 前記導電性リード線がその周縁部のまわりの1つ以上の場所に配置されるよう に位置付けられる半導体ダイと、 前記半導体ダイと前記導電性リード線の対応するものとの間に電気接続を提供 する手段と、 を有することを特徴とする半導体ダイキャリア。 2. 前記側壁に固着せしめられ、前記半導体ダイを支持する絶縁性床部を有し 、前記半導体ダイはその上に形成された複数のボンディングパッドを有する、こ とを特徴とする請求の範囲第1項記載の半導体ダイキャリア。 3. 前記導電性リード線は、前記側壁の各々から延出する複数のリード線から なる複数の垂直方向に重ねられた列を有する、ことを特徴とする請求の範囲第2 項記載の半導体ダイキャリア。 4. 前記複数の垂直方向に離隔された列の隣接するものの間に形成され、かつ 、前記リード線を支持する絶縁性棚部を有する、ことを特徴とする請求の範囲第 3項記載の半導体ダイキャリア。 5. 前記半導体ダイキャリアは、少なくとも4つの側壁 を有し、前記側壁の各々は、複数の導電性リード線からなる複数の垂直方向に離 隔された列を受け入れる、ことを特徴とする請求の範囲第3項記載の半導体ダイ キャリア。 6. 前記側壁の各々は、複数の導電性リード線からなる少なくとも2つの垂直 方向に離隔した列を受け入れる、ことを特徴とする請求の範囲第5項記載の半導 体ダイキャリア。 7. 前記側壁の各々は、複数の導電性リード線からなる少なくとも3つの垂直 方向に離隔した列を受け入れる、ことを特徴とする請求の範囲第5項記載の半導 体ダイキャリア。 8. 前記側壁の各々は、複数の導電性リード線らなる少なくとも4つの垂直方 向に離隔した列を受け入れる、ことを特徴とする請求の範囲第5項記載の半導体 ダイキャリア。 9. 前記リード線の各々は、前記側壁の対応する1つから延出し、かつ、 前記側壁の内側表面に隣接する位置から前記半導体ダイに向かう方向に延出し 、かつ、接合端子を含む接合延出部と、 前記側壁内に位置付けられる安定化部と、 前記側壁の外側表面に隣接する位置から前記半導体ダイを離れる方向に延出し 、かつ、インターフェース表面と電気的にインターフェース接続される足部を含 む外部リード部と、 体ダイキャリア。 10. 前記足部は、PCB上にて表面取り付けが行えるように形成されている、 ことを特徴とする請求の範囲第9項記載の半導体ダイキャリア。 11. 前記足部は、PCB内においてPTH取り付けが行えるように形成されて いる、ことを特徴とする請求の範囲第9項記載の半導体ダイキャリア。 12. 前記足部は、PCB又はPCBに取り付けられたソケットに対してプラグ 接続型の取り付けが行えるように形成されている、ことを特徴とする請求の範囲 第9項記載の半導体ダイキャリア。 13. 各々の側壁において、前記列の1つに含まれるリード線は、前記列の他の 1つに含まれるリード線に対して互い違いに配列されている、ことを特徴とする 請求の範囲第3項記載の半導体ダイキャリア。 14. 各々の側壁において、前記列の1つに含まれるリード線は、前記列の他の 1つに含まれるリード線に対して一直線に配列されている、ことを特徴とする請 求の範囲第3項記載の半導体ダイキャリア。 15. 各々の側壁において、前記列の1つに含まれるリード線は、前記列の他の 1つに含まれせるリード線に対して互い違いに配列され、かつ、前記列のさらな る他の1つに含まれるリード線に対して一直線に配列されている、ことを特徴と する請求の範囲第3項記載の半導体ダイキャリア。 16. 前記電気接続を提供する手段は、前記半導体ダイの前記ボンディングパッ ドの1つと前記リード線の1つに形成された接合端子との間を接続する少なくと も1つのボンディングワイヤを有する、ことを特徴とする請求の範囲第3項記載 の半導体ダイキャリア。 17. 前記半導体ダイは、前記ボンディングパッドが上向きに前記床部から離れ る方向に対向する状態で、前記基板の前記床部に接着せしめられる、ことを特徴 とする請求の範囲第3項記載の半導体ダイキャリア。 18. 前記半導体ダイは、前記ボンディングパッドが下向きに対向する状態で、 前記リード線の上方に位置する表面に接着せしめられる、ことを特徴とする請求 の範囲第3項記載の半導体ダイキャリア。 19. 前記半導体ダイは、前記床部に形成されたくぼみ内において前記床部に接 着せしめられる、ことを特徴とする請求の範囲第3項記載の半導体ダイキャリア 。 20. 前記床部上に隆起基部を有し、前記半導体ダイは前記隆起基部に接着せし められる、ことを特徴とする請求の範囲第3項記載の半導体ダイキャリア。 21. 前記リード線の隣接する上方列と下方列との間に位置付けられ、前記半導 体ダイに向かう方向において、前記下方列の上方で前記上方列を越えて延出し、 かつ、前記リード線を前記半導体ダイ上の前記ボンディングパッドに接続するボ ンディングワイヤを支持するための絶縁セパレー タを有する、ことを特徴とする請求の範囲第3項記載の半導体ダイキャリア。 22. 前記絶縁セパレータを支持する少なくとも1つの支柱を有する、ことを特 徴とする請求の範囲第21項記載の半導体ダイキャリア。 23. 前記半導体ダイは、前記ボンディングパッドが前記床部に向かって下向き に対向する状態で、前記床部の上方に吊るされた平面上に取り付けられる、こと を特徴とする請求の範囲第3項記載の半導体ダイキャリア。 24. 前記半導体ダイキャリアは矩形形状をなす、ことを特徴とする請求の範囲 第3項記載の半導体ダイキャリア。 25. 前記半導体ダイキャリアは非正方形形状をなすことを特徴とする請求の範 囲第3項記載の半導体ダイキャリア。 26. 前記半導体ダイキャリアは、少なくとも8個の側面を有する、ことを特徴 とする請求の範囲第3項記載の半導体ダイキャリア。 27. 前記側壁の各々は、両者の間にキャビティを形成する少なくとも内側壁と 外側壁とを有する、ことを特徴とする請求の範囲第3項記載の半導体ダイキャリ ア。 28. 前記内側壁と外側壁との間の前記キャビティを満たすボンディング材料を 有する、ことを特徴とする請求の範囲第27項記載の半導体ダイキャリア。 29. 半導体ダイキャリアの製造方法であって、 リードフレームを用いることなく別々に複数の導電性リ ード線を製造する工程と、 複数の電気絶縁側壁の少なくとも1つから複数の導電性リード線線を延出せし める工程と、 前記導電性リード線が半導体ダイの周縁部まわりの1つ以上の場所に配置され るように前記半導体ダイを位置付ける工程と、 前記半導体ダイを前記導電性リード線の対応するものに電気的に接続する工程 と、 を含む、ことを特徴とする半導体ダイキャリアの製造方法。 30. 前記複数の側壁の各々からリード線を延出せしめる工程は、前記複数の側 壁を型形成する工程、及び前記側壁の1つに前記リード線各々を挿着する工程を 含む、ことを特徴とする請求の範囲第29項記載の半導体ダイキャリアの製造方 法。 31. 前記複数の側壁の各々からリード線を延出せしめる工程は、挿入型成形工 程において、前記リード線を囲んで前記複数の側壁を型成形する、ことを特徴と する請求の範囲第29項記載の半導体ダイキャリアの製造方法。 32. 前記半導体ダイを支持するための、前記側壁に固着せしめられる絶縁床部 を形成する工程を含み、前記半導体ダイはその上に形成された複数のボンディン グパッドを有する、ことを特徴とする請求の範囲第29項記載の半導体ダイキャ リアの製造方法。 33. 前記形成する工程は、前記床部と前記複数の側壁と を一体的に形成する、ことを特徴とする請求の範囲第32項記載の半導体ダイキ ャリアの製造方法。 34. 前記延出せしめる工程は、前記床部が前記側壁に固着せしめられる前に行 われる、ことを特徴とする請求の範囲第32項記載の半導体ダイキャリアの製造 方法。 35. 前記リード線の各々は、前記側壁の1つに別々に挿入せしめられる、こと を特徴とする請求の範囲第32項記載の半導体ダイキャリアの製造方法。 36. 前記リード線は、前記側壁に集団的に挿入される、ことを特徴とする請求 の範囲第32項記載の半導体ダイキャリアの製造方法。 37. 前記リード線は、挿入型成形工程を用いて、前記側壁内に形成される、こ とを特徴とする請求の範囲第32項記載の半導体ダイキャリアの製造方法。 38. 前記複数の側壁を形成する工程は、各々の側壁に対して、充填剤を受け入 れるキャビティにより離隔せしめられる少なくとも外側壁と内側壁とを形成する 、ことを特徴とする請求の範囲第32項記載の半導体ダイキャリア製造方法。 39. 前記リード線の各々は、前記側壁の各々において、複数の導電性リード線 からなる複数の垂直方向に離隔したた列を形成すべく、前記側壁に挿着される、 ことを特徴とする請求の範囲第32項記載の半導体ダイキャリアの製造方法。 40. 隣接する前記垂直方向に離隔した列の間に位置して前記リード線を支持す る絶縁性棚部を設ける工程を含む、ことを特徴とする請求の範囲第39項記載の 半導体ダイキャリアの製造方法。 41. 複数の導電性リード線からなる少なくとも2つの垂直方向に離隔した列が 、前記側壁の各々に挿着される、ことを特徴とする請求の範囲第39項記載の半 導体ダイキャリアの製造方法。 42. 複数の導電性リード線からなる少なくとも3つの垂直方向に離隔した列が 、前記側壁の各々に挿着される、ことを特徴とする請求の範囲第39項記載の半 導体ダイキャリアの製造方法。 43. 複数の導電性リード線からなる少なくとも4つの垂直方向に離隔した列が 、前記側壁の各々に挿着される、ことを特徴とする請求の範囲第39項記載の半 導体ダイキャリアの製造方法。 44. 前記リード線の隣接する上方列と下方列との間で、前記半導体ダイに向か う方向において、前記下方列の上方で前記上方列を越えて延出し、前記リード線 を前記半導体ダイ上の前記ボンディングパッドに接続するボンディングワイヤを 支持する絶縁セパレータを位置付ける工程を含む、ことを特徴とする請求の範囲 第39項記載の半導体ダイキャリアの製造方法。 45. 前記半導体ダイキャリア内において、前記絶縁セパ レータを支持する支柱を位置付ける工程を含む、ことを特徴とする請求の範囲第 44項記載の半導体ダイキャリアの製造方法。 46. 前記側壁の各々からリード線を延出せしめる工程の後で、かつ、前記半導 体ダイを位置付ける工程の前において、前記半導体ダイキャリアに対して機械的 及び/又は電気的試験を行う工程を含む、ことを特徴とする請求の範囲第29項 記載の半導体ダイキャリアの製造方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/208,586 | 1994-03-11 | ||
US08/208,586 US6339191B1 (en) | 1994-03-11 | 1994-03-11 | Prefabricated semiconductor chip carrier |
PCT/US1995/002675 WO1995024733A1 (en) | 1994-03-11 | 1995-03-09 | Prefabricated semiconductor chip carrier |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007165452A Division JP2007294993A (ja) | 1994-03-11 | 2007-06-22 | 組立て型半導体チップキャリア |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH10504934A true JPH10504934A (ja) | 1998-05-12 |
Family
ID=22775142
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7523542A Pending JPH10504934A (ja) | 1994-03-11 | 1995-03-09 | 組立て型半導体チップキャリア |
JP2007165452A Pending JP2007294993A (ja) | 1994-03-11 | 2007-06-22 | 組立て型半導体チップキャリア |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007165452A Pending JP2007294993A (ja) | 1994-03-11 | 2007-06-22 | 組立て型半導体チップキャリア |
Country Status (8)
Country | Link |
---|---|
US (5) | US6339191B1 (ja) |
EP (1) | EP0749633B1 (ja) |
JP (2) | JPH10504934A (ja) |
KR (1) | KR100363004B1 (ja) |
AU (1) | AU2115795A (ja) |
DE (1) | DE69535712T2 (ja) |
TW (1) | TW242697B (ja) |
WO (1) | WO1995024733A1 (ja) |
Families Citing this family (53)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6072228A (en) * | 1996-10-25 | 2000-06-06 | Micron Technology, Inc. | Multi-part lead frame with dissimilar materials and method of manufacturing |
WO1999023700A1 (en) * | 1997-11-05 | 1999-05-14 | Martin Robert A | Chip housing, methods of making same and methods for mounting chips therein |
US6016256A (en) * | 1997-11-14 | 2000-01-18 | The Panda Project | Multi-chip module having interconnect dies |
US6141869A (en) * | 1998-10-26 | 2000-11-07 | Silicon Bandwidth, Inc. | Apparatus for and method of manufacturing a semiconductor die carrier |
US6246566B1 (en) | 1999-02-08 | 2001-06-12 | Amkor Technology, Inc. | Electrostatic discharge protection package and method |
US6305987B1 (en) | 1999-02-12 | 2001-10-23 | Silicon Bandwidth, Inc. | Integrated connector and semiconductor die package |
US6331452B1 (en) | 1999-04-12 | 2001-12-18 | Verdicom, Inc. | Method of fabricating integrated circuit package with opening allowing access to die |
KR20010036142A (ko) * | 1999-10-06 | 2001-05-07 | 윤종용 | 다층 리드를 갖는 반도체 칩 패키지 |
US6809348B1 (en) * | 1999-10-08 | 2004-10-26 | Denso Corporation | Semiconductor device and method for manufacturing the same |
US20090100295A1 (en) * | 2000-01-06 | 2009-04-16 | Super Talent Electronics, Inc. | Reliable memory module testing and manufacturing method |
US6683375B2 (en) * | 2001-06-15 | 2004-01-27 | Fairchild Semiconductor Corporation | Semiconductor die including conductive columns |
US6511866B1 (en) * | 2001-07-12 | 2003-01-28 | Rjr Polymers, Inc. | Use of diverse materials in air-cavity packaging of electronic devices |
US6826830B2 (en) * | 2002-02-05 | 2004-12-07 | International Business Machines Corporation | Multi-layered interconnect structure using liquid crystalline polymer dielectric |
US6734546B2 (en) * | 2002-02-26 | 2004-05-11 | Silicon Bandwidth, Inc. | Micro grid array semiconductor die package |
JP2005524239A (ja) * | 2002-04-29 | 2005-08-11 | シリコン・パイプ・インコーポレーテッド | ダイレクト・コネクト形信号システム |
US7750446B2 (en) | 2002-04-29 | 2010-07-06 | Interconnect Portfolio Llc | IC package structures having separate circuit interconnection structures and assemblies constructed thereof |
US6891272B1 (en) | 2002-07-31 | 2005-05-10 | Silicon Pipe, Inc. | Multi-path via interconnection structures and methods for manufacturing the same |
US7014472B2 (en) * | 2003-01-13 | 2006-03-21 | Siliconpipe, Inc. | System for making high-speed connections to board-mounted modules |
US6907659B2 (en) * | 2003-02-05 | 2005-06-21 | Advanced Connection Technology Inc. | Method for manufacturing and packaging integrated circuit |
US20040188863A1 (en) * | 2003-03-24 | 2004-09-30 | Wang Zhong Cheng | Substrate for semiconductor package and method of making same |
US7744802B2 (en) * | 2004-06-25 | 2010-06-29 | Intel Corporation | Dielectric film with low coefficient of thermal expansion (CTE) using liquid crystalline resin |
US20060011710A1 (en) * | 2004-07-13 | 2006-01-19 | Asm Technology Singapore Pte Ltd | Formation of a wire bond with enhanced pull |
JP4877455B2 (ja) * | 2005-03-28 | 2012-02-15 | ミツミ電機株式会社 | 二次電池保護モジュールおよびリード実装方法 |
US7280181B2 (en) * | 2005-06-30 | 2007-10-09 | Intel Corporation | Liquid crystal polymer optical filter carrier |
CN100555643C (zh) * | 2005-08-12 | 2009-10-28 | 鸿富锦精密工业(深圳)有限公司 | 影像感测芯片封装结构及应用该结构的数码相机模组 |
WO2007028634A1 (en) | 2005-09-08 | 2007-03-15 | Cardlab Aps | A dynamic transaction card and a method of writing information to the same |
US7466016B2 (en) * | 2007-04-07 | 2008-12-16 | Kevin Yang | Bent lead transistor |
US8225475B2 (en) * | 2008-12-10 | 2012-07-24 | Omnetics Connector Corporation | Alignment device for fine pitch connector leads |
US8759713B2 (en) * | 2009-06-14 | 2014-06-24 | Terepac Corporation | Methods for interconnecting bonding pads between components |
TWI411139B (zh) | 2009-07-16 | 2013-10-01 | Cheng Kung Capital Llc | 上下電極led封裝 |
JP5574667B2 (ja) * | 2009-10-21 | 2014-08-20 | キヤノン株式会社 | パッケージ、半導体装置、それらの製造方法及び機器 |
TWI405313B (zh) * | 2010-03-31 | 2013-08-11 | Quanta Comp Inc | 具側邊接腳之積體電路封裝元件 |
US8692366B2 (en) * | 2010-09-30 | 2014-04-08 | Analog Device, Inc. | Apparatus and method for microelectromechanical systems device packaging |
CN102779765B (zh) | 2011-05-13 | 2016-08-17 | 飞思卡尔半导体公司 | 具有交错引线的半导体器件 |
US9007783B2 (en) * | 2011-05-31 | 2015-04-14 | Sony Corporation | Memory device and receptacle for electronic devices |
US20130178080A1 (en) * | 2012-01-09 | 2013-07-11 | Kostal Of America, Inc. | Soldered electronic components mounted solely on the top surface of a printed circuit board |
US8836132B2 (en) | 2012-04-03 | 2014-09-16 | Analog Devices, Inc. | Vertical mount package and wafer level packaging therefor |
US9475694B2 (en) | 2013-01-14 | 2016-10-25 | Analog Devices Global | Two-axis vertical mount package assembly |
CN104241238B (zh) | 2013-06-09 | 2018-05-11 | 恩智浦美国有限公司 | 基于引线框的半导体管芯封装 |
US9287200B2 (en) * | 2013-06-27 | 2016-03-15 | Freescale Semiconductor, Inc. | Packaged semiconductor device |
JP6204088B2 (ja) * | 2013-07-02 | 2017-09-27 | エスアイアイ・セミコンダクタ株式会社 | 半導体装置 |
JP2015111623A (ja) * | 2013-12-06 | 2015-06-18 | 株式会社東海理化電機製作所 | 実装ユニット |
MA41187A (fr) | 2014-12-19 | 2021-04-07 | Cardlab Aps | Procédé et ensemble pour générer un champ magnétique et procédé de fabrication d'un ensemble |
EP3035230A1 (en) | 2014-12-19 | 2016-06-22 | Cardlab ApS | A method and an assembly for generating a magnetic field |
JP2016197636A (ja) * | 2015-04-02 | 2016-11-24 | 株式会社デンソー | モールドパッケージ |
EP3082071A1 (en) | 2015-04-17 | 2016-10-19 | Cardlab ApS | Device for and method of outputting a magnetic field |
US11647678B2 (en) | 2016-08-23 | 2023-05-09 | Analog Devices International Unlimited Company | Compact integrated device packages |
US10629574B2 (en) | 2016-10-27 | 2020-04-21 | Analog Devices, Inc. | Compact integrated device packages |
US10697800B2 (en) | 2016-11-04 | 2020-06-30 | Analog Devices Global | Multi-dimensional measurement using magnetic sensors and related systems, methods, and integrated circuits |
EP3520695A3 (en) | 2018-01-31 | 2019-11-06 | Analog Devices, Inc. | Electronic devices |
KR20200002194A (ko) * | 2018-06-29 | 2020-01-08 | 엘지디스플레이 주식회사 | 집적회로, 집적회로를 갖는 회로보드 및 이를 이용한 표시장치 |
JP7166874B2 (ja) * | 2018-10-25 | 2022-11-08 | 古河電気工業株式会社 | 光モジュール実装基板および容器実装基板 |
US11510351B2 (en) | 2019-01-04 | 2022-11-22 | Engent, Inc. | Systems and methods for precision placement of components |
Family Cites Families (120)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US123560A (en) * | 1872-02-13 | Improvement in washing-machines | ||
US2156558A (en) * | 1939-05-02 | Cover feeding and folding mecha | ||
US615549A (en) * | 1898-12-06 | Mud and scale receptacle for steam-boilers | ||
US472750A (en) * | 1892-04-12 | Lamp-wick | ||
US1205456A (en) * | 1913-11-15 | 1916-11-21 | Cable Co | Tracker-board and music-sheet. |
US2301182A (en) * | 1939-12-01 | 1942-11-10 | Raymond F Schutz | Receptacle |
US3151686A (en) * | 1962-05-14 | 1964-10-06 | Lamphere Jean K | Hydraulic weight control and compensating apparatus |
BE639646A (ja) * | 1962-11-08 | |||
US3337838A (en) * | 1964-12-16 | 1967-08-22 | Burndy Corp | Wiping contact |
NL137793B (ja) * | 1967-06-05 | 1900-01-01 | ||
US3516156A (en) * | 1967-12-11 | 1970-06-23 | Ibm | Circuit package assembly process |
US3545606A (en) * | 1968-06-11 | 1970-12-08 | Benny Morris Bennett | Flexible tape terminal assembly |
JPS5332233B1 (ja) | 1968-12-25 | 1978-09-07 | ||
US3676748A (en) | 1970-04-01 | 1972-07-11 | Fuji Electrochemical Co Ltd | Frame structures for electronic circuits |
US3676993A (en) | 1970-08-13 | 1972-07-18 | Hamilton Watch Co | Electronic watch |
US3875479A (en) * | 1973-05-07 | 1975-04-01 | Gilbert R Jaggar | Electrical apparatus |
US4167647A (en) | 1974-10-02 | 1979-09-11 | Santa Barbara Research Center | Hybrid microelectronic circuit package |
US4147660A (en) * | 1976-12-22 | 1979-04-03 | Osaka Gas Company, Ltd. | Method for reactivation of platinum group metal catalyst with aqueous alkaline and/or reducing solutions |
US4205548A (en) * | 1978-07-03 | 1980-06-03 | Plessey, Inc. | Stamping tools |
US4237154A (en) * | 1979-08-16 | 1980-12-02 | Garrison William H | Improved galvanizing method [and apparatus] |
US4423468A (en) | 1980-10-01 | 1983-12-27 | Motorola, Inc. | Dual electronic component assembly |
US4331831A (en) | 1980-11-28 | 1982-05-25 | Bell Telephone Laboratories, Incorporated | Package for semiconductor integrated circuits |
GB2091036B (en) * | 1981-01-13 | 1985-06-26 | Int Computers Ltd | Integrated circuit carrier assembly |
JPS5866344A (ja) | 1981-10-16 | 1983-04-20 | Hitachi Ltd | 集積回路パツケ−ジ |
US4437718A (en) | 1981-12-17 | 1984-03-20 | Motorola Inc. | Non-hermetically sealed stackable chip carrier package |
US4433886A (en) * | 1981-12-17 | 1984-02-28 | Elco Corporation | Connector mounting for integrated circuit chip packages |
US4572604A (en) * | 1982-08-25 | 1986-02-25 | Elfab Corp. | Printed circuit board finger connector |
JPS5954249A (ja) | 1982-09-22 | 1984-03-29 | Fujitsu Ltd | 半導体装置 |
US4487463A (en) | 1983-02-22 | 1984-12-11 | Gulf & Western Manufacturing Company | Multiple contact header assembly |
JPS59174220A (ja) * | 1983-03-22 | 1984-10-02 | Fujitsu Ltd | 折返し曲げ金型 |
JPS6016453A (ja) * | 1983-07-08 | 1985-01-28 | Fujitsu Ltd | 集積回路装置用パツケ−ジ |
JPS6028256A (ja) | 1983-07-26 | 1985-02-13 | Fujitsu Ltd | 半導体装置 |
DE3337796A1 (de) | 1983-10-18 | 1985-04-25 | Metz Apparatewerke Inh. Paul Metz, 8510 Fürth | Integrierter baustein |
US4660069A (en) | 1983-12-08 | 1987-04-21 | Motorola, Inc. | Device with captivate chip capacitor devices and method of making the same |
LU85135A1 (fr) | 1983-12-14 | 1985-09-12 | Bonameau Jean Marie | Dispositif de protection contre les perturbations et/ou des parasites au voisinage de circuits integres |
US4677526A (en) | 1984-03-01 | 1987-06-30 | Augat Inc. | Plastic pin grid array chip carrier |
JPS60254641A (ja) * | 1984-05-31 | 1985-12-16 | Fujitsu Ltd | 液体封入型パツケ−ジ |
JPS615549A (ja) | 1984-06-20 | 1986-01-11 | Hitachi Micro Comput Eng Ltd | 半導体装置 |
DE3430849A1 (de) | 1984-08-22 | 1986-03-06 | Gerd 7742 St Georgen Kammerer | Verfahren zur raeumlichen ausweitung der elektrischen verbindung zwischen den anschlusskontakten hochintegrierter elektronischer bauelemente und den kontaktstellen einer elektrischen anschlussvorrichtung auf einem bauelementetraeger |
US4655526A (en) * | 1984-08-31 | 1987-04-07 | Amp Incorporated | Limited insertion force contact terminals and connectors |
US4616406A (en) | 1984-09-27 | 1986-10-14 | Advanced Micro Devices, Inc. | Process of making a semiconductor device having parallel leads directly connected perpendicular to integrated circuit layers therein |
GB2174538A (en) | 1985-04-24 | 1986-11-05 | Stanley Bracey | Semiconductor package |
JPS6221249A (ja) * | 1985-07-22 | 1987-01-29 | Hitachi Ltd | 半導体装置 |
US4705917A (en) | 1985-08-27 | 1987-11-10 | Hughes Aircraft Company | Microelectronic package |
JPH069223B2 (ja) | 1985-10-05 | 1994-02-02 | 山一電機工業株式会社 | Icパッケ−ジ |
JPS62229896A (ja) * | 1986-03-29 | 1987-10-08 | 株式会社東芝 | 印刷配線基板 |
JPS62248243A (ja) | 1986-04-21 | 1987-10-29 | Matsushita Electronics Corp | 半導体パツケ−ジ |
US4675472A (en) * | 1986-08-04 | 1987-06-23 | Beta Phase, Inc. | Integrated circuit package and seal therefor |
JPH0777247B2 (ja) | 1986-09-17 | 1995-08-16 | 富士通株式会社 | 半導体装置の製造方法 |
GB2196178B (en) | 1986-10-09 | 1990-04-11 | Amp Inc | Semiconductor chip carrier system |
US4766479A (en) | 1986-10-14 | 1988-08-23 | Hughes Aircraft Company | Low resistance electrical interconnection for synchronous rectifiers |
US4715829A (en) | 1986-11-13 | 1987-12-29 | Amp Incorporated | High density electrical connector system |
US4734042A (en) | 1987-02-09 | 1988-03-29 | Augat Inc. | Multi row high density connector |
US5138438A (en) | 1987-06-24 | 1992-08-11 | Akita Electronics Co. Ltd. | Lead connections means for stacked tab packaged IC chips |
JPS6423560A (en) * | 1987-07-20 | 1989-01-26 | Olympus Optical Co | Semiconductor device and method of mounting same |
KR920000829B1 (ko) * | 1987-07-21 | 1992-01-30 | 스미도모덴기고오교오 가부시가가이샤 | 반도체 장치 |
JPH0452997Y2 (ja) * | 1987-09-12 | 1992-12-14 | ||
JPS6474795A (en) | 1987-09-17 | 1989-03-20 | Matsushita Electronics Corp | Method of mounting semiconductor device |
JPH01205456A (ja) * | 1988-02-10 | 1989-08-17 | Nec Corp | Lsi用多ピンケース |
FR2629665B1 (fr) | 1988-03-30 | 1991-01-11 | Bendix Electronics Sa | Boitier pour circuit electronique |
US4985747A (en) | 1988-06-09 | 1991-01-15 | Oki Electric Industry Co., Ltd. | Terminal structure and process of fabricating the same |
IT1221258B (it) * | 1988-06-22 | 1990-06-27 | Sgs Thomson Microelectronics | Contenitore plastico a cavita' per dispositivi semiconduttore |
JPH0221249A (ja) * | 1988-07-08 | 1990-01-24 | Matsushita Electric Ind Co Ltd | 電子部品の外観検査方法 |
US4897055A (en) * | 1988-11-28 | 1990-01-30 | International Business Machines Corp. | Sequential Connecting device |
JPH02156558A (ja) * | 1988-12-08 | 1990-06-15 | Sharp Corp | 半導体装置のリードフレームおよびこれを用いた半導体装置の製造方法 |
US5022144A (en) | 1989-03-02 | 1991-06-11 | Explosive Fabricators, Inc. | Method of manufacture power hybrid microcircuit |
US5037311A (en) | 1989-05-05 | 1991-08-06 | International Business Machines Corporation | High density interconnect strip |
US5049974A (en) | 1989-05-15 | 1991-09-17 | Roger Corporation | Interconnect device and method of manufacture thereof |
JPH02301182A (ja) | 1989-05-16 | 1990-12-13 | Matsushita Electric Ind Co Ltd | 薄型実装構造の回路基板 |
JP2598129B2 (ja) | 1989-05-18 | 1997-04-09 | 三菱電機株式会社 | 半導体装置 |
US4975066A (en) * | 1989-06-27 | 1990-12-04 | Amp Incorporated | Coaxial contact element |
JP2544977B2 (ja) * | 1989-10-13 | 1996-10-16 | ケル株式会社 | 表面実装用電子部品 |
IT1237135B (it) | 1989-10-30 | 1993-05-24 | Pirelli Cavi Spa | Gruppo di amplificazione ottico a basso rumore, con riflessione della potenza di pompaggio. |
JPH03151686A (ja) | 1989-11-08 | 1991-06-27 | Nec Corp | プリント配線基板 |
US4943846A (en) | 1989-11-09 | 1990-07-24 | Amp Incorporated | Pin grid array having seperate posts and socket contacts |
US5123164A (en) | 1989-12-08 | 1992-06-23 | Rockwell International Corporation | Hermetic organic/inorganic interconnection substrate for hybrid circuit manufacture |
US5008734A (en) | 1989-12-20 | 1991-04-16 | National Semiconductor Corporation | Stadium-stepped package for an integrated circuit with air dielectric |
US4991291A (en) * | 1989-12-29 | 1991-02-12 | Isotronics, Inc. | Method for fabricating a fold-up frame |
JPH0783080B2 (ja) | 1990-01-18 | 1995-09-06 | 株式会社東芝 | 半導体装置用部品 |
US4997376A (en) * | 1990-03-23 | 1991-03-05 | Amp Incorporated | Paired contact electrical connector system |
JPH03291869A (ja) | 1990-04-09 | 1991-12-24 | Hitachi Ltd | 電子装置 |
US5030144A (en) * | 1990-04-13 | 1991-07-09 | North American Specialties Corporation | Solder-bearing lead |
US5071363A (en) | 1990-04-18 | 1991-12-10 | Minnesota Mining And Manufacturing Company | Miniature multiple conductor electrical connector |
US5081563A (en) | 1990-04-27 | 1992-01-14 | International Business Machines Corporation | Multi-layer package incorporating a recessed cavity for a semiconductor chip |
FR2664097A1 (fr) | 1990-06-28 | 1992-01-03 | Sgs Thomson Microelectronics | Boitier de circuit integre et son procede de fabrication. |
DE4021872C2 (de) | 1990-07-09 | 1994-07-28 | Lsi Logic Products Gmbh | Hochintegriertes elektronisches Bauteil |
JPH0472750A (ja) * | 1990-07-13 | 1992-03-06 | Nec Corp | ガラス封止型半導体装置 |
DE4022829A1 (de) * | 1990-07-18 | 1992-01-23 | Werner Vogt | Tragbare speicherkarte |
CA2023361A1 (en) | 1990-07-20 | 1992-01-21 | Robert L. Barnhouse | Printed circuit boards |
JP2866465B2 (ja) | 1990-10-09 | 1999-03-08 | 三菱電機株式会社 | 電子部品 |
JPH0732042B2 (ja) | 1990-10-11 | 1995-04-10 | 富士通株式会社 | スルーホール接続形電子デバイスとその実装方法 |
JP2876773B2 (ja) | 1990-10-22 | 1999-03-31 | セイコーエプソン株式会社 | プログラム命令語長可変型計算装置及びデータ処理装置 |
JPH04171969A (ja) | 1990-11-06 | 1992-06-19 | Fujitsu Ltd | 実装icチップ樹脂封止構造及び樹脂封止方法 |
JPH04179264A (ja) | 1990-11-14 | 1992-06-25 | Hitachi Ltd | 樹脂封止型半導体装置 |
JPH04237154A (ja) | 1991-01-22 | 1992-08-25 | Sumitomo Electric Ind Ltd | 半導体パッケージ |
JPH04256203A (ja) * | 1991-02-07 | 1992-09-10 | Mitsubishi Electric Corp | マイクロ波帯ic用パッケージ |
US5107328A (en) * | 1991-02-13 | 1992-04-21 | Micron Technology, Inc. | Packaging means for a semiconductor die having particular shelf structure |
US5351393A (en) | 1991-05-28 | 1994-10-04 | Dimensonal Circuits Corporation | Method of mounting a surface-mountable IC to a converter board |
JPH05160292A (ja) | 1991-06-06 | 1993-06-25 | Toshiba Corp | 多層パッケージ |
JP2966972B2 (ja) | 1991-07-05 | 1999-10-25 | 株式会社日立製作所 | 半導体チップキャリアとそれを実装したモジュール及びそれを組み込んだ電子機器 |
US5226803A (en) * | 1991-07-22 | 1993-07-13 | Martin Thomas B | Vane-type fuel pump |
JP3014503B2 (ja) * | 1991-08-05 | 2000-02-28 | 日本特殊陶業株式会社 | 集積回路用パッケージ |
US5403784A (en) * | 1991-09-03 | 1995-04-04 | Microelectronics And Computer Technology Corporation | Process for manufacturing a stacked multiple leadframe semiconductor package using an alignment template |
JPH0595079A (ja) | 1991-10-02 | 1993-04-16 | Ibiden Co Ltd | リードフレーム、半導体集積回路搭載用基板及び半導体装置並びにそれらの製造方法 |
JPH05121142A (ja) * | 1991-10-31 | 1993-05-18 | Yazaki Corp | 基板用端子の製造方法 |
US5137456A (en) | 1991-11-04 | 1992-08-11 | International Business Machines Corporation | High density, separable connector and contact for use therein |
JPH05226803A (ja) | 1992-02-10 | 1993-09-03 | Matsushita Electric Works Ltd | 実装回路基板 |
JPH0677632A (ja) | 1992-02-24 | 1994-03-18 | Matsushita Electric Ind Co Ltd | 回路基板 |
US5438224A (en) | 1992-04-23 | 1995-08-01 | Motorola, Inc. | Integrated circuit package having a face-to-face IC chip arrangement |
JPH05335465A (ja) * | 1992-05-27 | 1993-12-17 | Mitsubishi Electric Corp | 半導体装置 |
US5283717A (en) | 1992-12-04 | 1994-02-01 | Sgs-Thomson Microelectronics, Inc. | Circuit assembly having interposer lead frame |
US5342999A (en) | 1992-12-21 | 1994-08-30 | Motorola, Inc. | Apparatus for adapting semiconductor die pads and method therefor |
US5371404A (en) | 1993-02-04 | 1994-12-06 | Motorola, Inc. | Thermally conductive integrated circuit package with radio frequency shielding |
US5327325A (en) | 1993-02-08 | 1994-07-05 | Fairchild Space And Defense Corporation | Three-dimensional integrated circuit package |
US5390412A (en) | 1993-04-08 | 1995-02-21 | Gregoire; George D. | Method for making printed circuit boards |
US5422514A (en) * | 1993-05-11 | 1995-06-06 | Micromodule Systems, Inc. | Packaging and interconnect system for integrated circuits |
US5543586A (en) * | 1994-03-11 | 1996-08-06 | The Panda Project | Apparatus having inner layers supporting surface-mount components |
US5541449A (en) * | 1994-03-11 | 1996-07-30 | The Panda Project | Semiconductor chip carrier affording a high-density external interface |
JP3401522B2 (ja) * | 1998-07-06 | 2003-04-28 | 日本電気株式会社 | ヒューズ回路及び冗長デコーダ回路 |
US6474795B1 (en) * | 1999-12-21 | 2002-11-05 | Eastman Kodak Company | Continuous ink jet printer with micro-valve deflection mechanism and method of controlling same |
-
1994
- 1994-03-11 US US08/208,586 patent/US6339191B1/en not_active Expired - Fee Related
- 1994-03-16 TW TW083102269A patent/TW242697B/zh active
-
1995
- 1995-03-09 WO PCT/US1995/002675 patent/WO1995024733A1/en active IP Right Grant
- 1995-03-09 EP EP95913970A patent/EP0749633B1/en not_active Expired - Lifetime
- 1995-03-09 DE DE69535712T patent/DE69535712T2/de not_active Expired - Fee Related
- 1995-03-09 AU AU21157/95A patent/AU2115795A/en not_active Abandoned
- 1995-03-09 KR KR1019960705041A patent/KR100363004B1/ko not_active IP Right Cessation
- 1995-03-09 JP JP7523542A patent/JPH10504934A/ja active Pending
- 1995-06-05 US US08/465,146 patent/US5819403A/en not_active Expired - Fee Related
-
2001
- 2001-09-28 US US09/964,542 patent/US6828511B2/en not_active Expired - Fee Related
-
2004
- 2004-01-13 US US10/755,414 patent/US6977432B2/en not_active Expired - Fee Related
-
2005
- 2005-08-25 US US11/210,758 patent/US20050280158A1/en not_active Abandoned
-
2007
- 2007-06-22 JP JP2007165452A patent/JP2007294993A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
US5819403A (en) | 1998-10-13 |
AU2115795A (en) | 1995-09-25 |
US20050280158A1 (en) | 2005-12-22 |
JP2007294993A (ja) | 2007-11-08 |
TW242697B (en) | 1995-03-11 |
US6977432B2 (en) | 2005-12-20 |
EP0749633A1 (en) | 1996-12-27 |
KR100363004B1 (ko) | 2003-02-26 |
US20040140542A1 (en) | 2004-07-22 |
US6828511B2 (en) | 2004-12-07 |
EP0749633B1 (en) | 2008-02-20 |
US20020053455A1 (en) | 2002-05-09 |
DE69535712T2 (de) | 2009-02-12 |
WO1995024733A1 (en) | 1995-09-14 |
DE69535712D1 (de) | 2008-04-03 |
US6339191B1 (en) | 2002-01-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH10504934A (ja) | 組立て型半導体チップキャリア | |
US5821457A (en) | Semiconductor die carrier having a dielectric epoxy between adjacent leads | |
US6577003B1 (en) | Semiconductor chip carrier affording a high-density external interface | |
US7408255B2 (en) | Assembly for stacked BGA packages | |
US7737545B2 (en) | Multi-surface IC packaging structures and methods for their manufacture | |
US7061092B2 (en) | High-density modularity for ICS | |
JP2967344B2 (ja) | 積層型半導体パッケージモジュール及び積層型半導体パッケージモジュールの製造方法 | |
US8796830B1 (en) | Stackable low-profile lead frame package | |
US5824950A (en) | Low profile semiconductor die carrier | |
JPH0637248A (ja) | 積み重ね半導体マルチチップモジュールおよびその製造方法 | |
WO1996041377A1 (en) | High performance semiconductor die carrier | |
KR100256307B1 (ko) | 스택 칩 패키지 | |
KR200231862Y1 (ko) | 반도체 패키지 | |
WO1996041378A1 (en) | Semiconductor die carrier having double-sided die attach plate |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20050531 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20050826 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20051007 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20051129 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20070313 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070612 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20070622 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20070626 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070912 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20071004 |
|
A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20071213 |