IT1221258B - Contenitore plastico a cavita' per dispositivi semiconduttore - Google Patents

Contenitore plastico a cavita' per dispositivi semiconduttore

Info

Publication number
IT1221258B
IT1221258B IT83642/88A IT8364288A IT1221258B IT 1221258 B IT1221258 B IT 1221258B IT 83642/88 A IT83642/88 A IT 83642/88A IT 8364288 A IT8364288 A IT 8364288A IT 1221258 B IT1221258 B IT 1221258B
Authority
IT
Italy
Prior art keywords
semiconductor devices
plastic container
cavity plastic
cavity
container
Prior art date
Application number
IT83642/88A
Other languages
English (en)
Other versions
IT8883642A0 (it
Inventor
Giuseppe Marchisi
Original Assignee
Sgs Thomson Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sgs Thomson Microelectronics filed Critical Sgs Thomson Microelectronics
Priority to IT83642/88A priority Critical patent/IT1221258B/it
Publication of IT8883642A0 publication Critical patent/IT8883642A0/it
Priority to US07/366,840 priority patent/US5034800A/en
Priority to EP89830270A priority patent/EP0348361B1/en
Priority to DE89830270T priority patent/DE68910738T2/de
Application granted granted Critical
Publication of IT1221258B publication Critical patent/IT1221258B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/315—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Light Receiving Elements (AREA)
IT83642/88A 1988-06-22 1988-06-22 Contenitore plastico a cavita' per dispositivi semiconduttore IT1221258B (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT83642/88A IT1221258B (it) 1988-06-22 1988-06-22 Contenitore plastico a cavita' per dispositivi semiconduttore
US07/366,840 US5034800A (en) 1988-06-22 1989-06-15 Hollow plastic package for semiconductor devices
EP89830270A EP0348361B1 (en) 1988-06-22 1989-06-16 Hollow plastic package for semiconductor devices
DE89830270T DE68910738T2 (de) 1988-06-22 1989-06-16 Hohle Plastikpackung für Halbleiteranordnungen.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT83642/88A IT1221258B (it) 1988-06-22 1988-06-22 Contenitore plastico a cavita' per dispositivi semiconduttore

Publications (2)

Publication Number Publication Date
IT8883642A0 IT8883642A0 (it) 1988-06-22
IT1221258B true IT1221258B (it) 1990-06-27

Family

ID=11323565

Family Applications (1)

Application Number Title Priority Date Filing Date
IT83642/88A IT1221258B (it) 1988-06-22 1988-06-22 Contenitore plastico a cavita' per dispositivi semiconduttore

Country Status (4)

Country Link
US (1) US5034800A (it)
EP (1) EP0348361B1 (it)
DE (1) DE68910738T2 (it)
IT (1) IT1221258B (it)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA2047486C (en) * 1990-07-21 2002-03-05 Shigeru Katayama Semiconductor device and method for manufacturing the same
GB2253309A (en) * 1990-08-28 1992-09-02 Lsi Logic Europ Encapsulation of electronic components
GB9018762D0 (en) * 1990-08-28 1990-10-10 Lsi Logic Europ Encapsulation of electronic components
US5537342A (en) * 1990-08-28 1996-07-16 Lsi Logic Corporation Encapsulation of electronic components
FR2667982B1 (fr) * 1990-10-15 1997-07-25 Sgs Thomson Microelectronics Boitier moule de circuit integre a fenetre et procede de moulage.
JPH04179263A (ja) * 1990-11-14 1992-06-25 Hitachi Ltd 樹脂封止型半導体装置とその製造方法
FR2673041A1 (fr) * 1991-02-19 1992-08-21 Gemplus Card Int Procede de fabrication de micromodules de circuit integre et micromodule correspondant.
US6339191B1 (en) * 1994-03-11 2002-01-15 Silicon Bandwidth Inc. Prefabricated semiconductor chip carrier
DE19524001A1 (de) * 1995-06-30 1997-03-06 Siemens Ag Verfahren zum Verpacken einer druckempfindlichen elektronischen Schaltung mit einer allseitig abdichtenden Schutzumhäusung
US5886400A (en) * 1995-08-31 1999-03-23 Motorola, Inc. Semiconductor device having an insulating layer and method for making
US5939672A (en) * 1997-03-10 1999-08-17 Antronix, Inc. Hermetically sealed electrical connection to a junction box
US6351288B1 (en) * 1997-06-27 2002-02-26 Eastman Kodak Company Sensor tilt control for a digital camera
EP1068537B1 (en) * 1998-04-03 2006-01-04 AlliedSignal Inc. Clamshell cover accelerometer
US6301966B1 (en) * 1999-03-31 2001-10-16 Honeywell International, Inc. Clamshell cover accelerometer
US7049166B2 (en) * 2000-08-17 2006-05-23 Authentec, Inc. Methods and apparatus for making integrated circuit package including opening exposing portion of the IC
JP3418373B2 (ja) * 2000-10-24 2003-06-23 エヌ・アール・エス・テクノロジー株式会社 弾性表面波装置及びその製造方法
FR2832136B1 (fr) * 2001-11-09 2005-02-18 3D Plus Sa Dispositif d'encapsulation hermetique de composant devant etre protege de toute contrainte
US7163838B2 (en) * 2002-07-22 2007-01-16 Texas Instruments Incorporated Method and apparatus for forming a DMD window frame with molded glass
DE102004024368A1 (de) * 2004-05-17 2005-12-15 Rohde & Schwarz Gmbh & Co. Kg Beleuchtbares GaAs-Schaltbauteil mit transparentem Gehäuse und Mikrowellenschaltung hiermit
CN100517738C (zh) * 2005-07-15 2009-07-22 鸿富锦精密工业（深圳）有限公司 影像感测芯片的封装结构
JP2008147243A (ja) * 2006-12-06 2008-06-26 Olympus Corp 気密封止装置
JP2009176894A (ja) * 2008-01-23 2009-08-06 Panasonic Corp 光学半導体装置
US7582954B1 (en) * 2008-02-25 2009-09-01 National Semiconductor Corporation Optical leadless leadframe package
FR2930084B1 (fr) 2008-04-09 2012-06-08 Thales Sa Procede de gestion d'un reseau electrique
US8003425B2 (en) * 2008-05-14 2011-08-23 International Business Machines Corporation Methods for forming anti-reflection structures for CMOS image sensors
US7759755B2 (en) 2008-05-14 2010-07-20 International Business Machines Corporation Anti-reflection structures for CMOS image sensors
US7728399B2 (en) * 2008-07-22 2010-06-01 National Semiconductor Corporation Molded optical package with fiber coupling feature
DE102010063048A1 (de) * 2010-12-14 2012-06-21 Robert Bosch Gmbh Verfahren zur Herstellung einer elektronischen Baugruppe mit Formkörper
JP6256301B2 (ja) * 2014-10-31 2018-01-10 株式会社デンソー 電子回路部品

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE135425C (it) *
US3665256A (en) * 1968-10-15 1972-05-23 Rca Corp Heat dissipation for power integrated circuits
US3778685A (en) * 1972-03-27 1973-12-11 Nasa Integrated circuit package with lead structure and method of preparing the same
GB1329810A (en) * 1972-06-19 1973-09-12 Williams T J Semiconductor device packaging
US4012579A (en) * 1975-02-21 1977-03-15 Allen-Bradley Company Encapsulated microcircuit package and method for assembly thereof
JPS584953A (ja) * 1981-07-01 1983-01-12 Toshiba Corp 半導体装置
JPS5889844A (ja) * 1981-11-24 1983-05-28 Toshiba Corp 樹脂封止型半導体装置
US4644384A (en) * 1984-02-02 1987-02-17 National Semiconductor Corporation Apparatus and method for packaging eprom integrated circuits
US4722060A (en) * 1984-03-22 1988-01-26 Thomson Components-Mostek Corporation Integrated-circuit leadframe adapted for a simultaneous bonding operation
JPS60239043A (ja) * 1984-05-14 1985-11-27 Oki Electric Ind Co Ltd 半導体装置用パツケ−ジの製造方法
US4855868A (en) * 1987-01-20 1989-08-08 Harding Ade Yemi S K Preformed packaging arrangement for energy dissipating devices

Also Published As

Publication number Publication date
IT8883642A0 (it) 1988-06-22
US5034800A (en) 1991-07-23
EP0348361A2 (en) 1989-12-27
DE68910738D1 (de) 1993-12-23
DE68910738T2 (de) 1994-03-10
EP0348361A3 (en) 1991-01-30
EP0348361B1 (en) 1993-11-18

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970628