JP6081693B2 - 配線基板及び配線基板の製造方法 - Google Patents

配線基板及び配線基板の製造方法 Download PDF

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Publication number
JP6081693B2
JP6081693B2 JP2011198564A JP2011198564A JP6081693B2 JP 6081693 B2 JP6081693 B2 JP 6081693B2 JP 2011198564 A JP2011198564 A JP 2011198564A JP 2011198564 A JP2011198564 A JP 2011198564A JP 6081693 B2 JP6081693 B2 JP 6081693B2
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JP
Japan
Prior art keywords
layer
wiring
insulating layer
insulating
adhesion
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Application number
JP2011198564A
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English (en)
Japanese (ja)
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JP2013062314A5 (enExample
JP2013062314A (ja
Inventor
人資 近藤
人資 近藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2011198564A priority Critical patent/JP6081693B2/ja
Priority to KR1020120098078A priority patent/KR101906883B1/ko
Priority to US13/604,833 priority patent/US9060455B2/en
Priority to TW101133257A priority patent/TWI625990B/zh
Publication of JP2013062314A publication Critical patent/JP2013062314A/ja
Publication of JP2013062314A5 publication Critical patent/JP2013062314A5/ja
Application granted granted Critical
Publication of JP6081693B2 publication Critical patent/JP6081693B2/ja
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • H05K3/387—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive for electroless plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2011198564A 2011-09-12 2011-09-12 配線基板及び配線基板の製造方法 Active JP6081693B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2011198564A JP6081693B2 (ja) 2011-09-12 2011-09-12 配線基板及び配線基板の製造方法
KR1020120098078A KR101906883B1 (ko) 2011-09-12 2012-09-05 배선 기판 및 그 제조 방법
US13/604,833 US9060455B2 (en) 2011-09-12 2012-09-06 Wiring board and method of manufacturing the same
TW101133257A TWI625990B (zh) 2011-09-12 2012-09-12 佈線板及其製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011198564A JP6081693B2 (ja) 2011-09-12 2011-09-12 配線基板及び配線基板の製造方法

Publications (3)

Publication Number Publication Date
JP2013062314A JP2013062314A (ja) 2013-04-04
JP2013062314A5 JP2013062314A5 (enExample) 2014-08-21
JP6081693B2 true JP6081693B2 (ja) 2017-02-15

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JP2011198564A Active JP6081693B2 (ja) 2011-09-12 2011-09-12 配線基板及び配線基板の製造方法

Country Status (4)

Country Link
US (1) US9060455B2 (enExample)
JP (1) JP6081693B2 (enExample)
KR (1) KR101906883B1 (enExample)
TW (1) TWI625990B (enExample)

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JP2015008261A (ja) * 2013-05-28 2015-01-15 京セラサーキットソリューションズ株式会社 配線基板およびその製造方法
US20140353019A1 (en) 2013-05-30 2014-12-04 Deepak ARORA Formation of dielectric with smooth surface
JP6158676B2 (ja) * 2013-10-15 2017-07-05 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
JP6375121B2 (ja) * 2014-02-27 2018-08-15 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
JP6341714B2 (ja) * 2014-03-25 2018-06-13 新光電気工業株式会社 配線基板及びその製造方法
JP6133227B2 (ja) * 2014-03-27 2017-05-24 新光電気工業株式会社 配線基板及びその製造方法
US9736939B2 (en) 2014-09-19 2017-08-15 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and method of manufacturing printed circuit board
US9899248B2 (en) * 2014-12-03 2018-02-20 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming semiconductor packages having through package vias
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JP6447075B2 (ja) * 2014-12-10 2019-01-09 凸版印刷株式会社 配線基板、半導体装置及び半導体装置の製造方法
JP2016219478A (ja) * 2015-05-15 2016-12-22 イビデン株式会社 配線基板及びその製造方法
JP2017152536A (ja) * 2016-02-24 2017-08-31 イビデン株式会社 プリント配線板及びその製造方法
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JP2019121771A (ja) * 2018-01-11 2019-07-22 イビデン株式会社 プリント配線板
TWI713842B (zh) * 2018-05-10 2020-12-21 恆勁科技股份有限公司 覆晶封裝基板之製法及其結構
JP7359531B2 (ja) * 2018-06-07 2023-10-11 新光電気工業株式会社 配線基板、配線基板の製造方法及び半導体パッケージの製造方法
TWI764630B (zh) * 2020-07-30 2022-05-11 南韓商三星電機股份有限公司 印刷電路板、電子部件內埋基板以及其製造方法
JP2022029308A (ja) * 2020-08-04 2022-02-17 新光電気工業株式会社 配線基板及び配線基板の製造方法
WO2022070389A1 (ja) * 2020-10-01 2022-04-07 昭和電工マテリアルズ株式会社 配線基板の製造方法、半導体装置の製造方法、及び樹脂シート
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CN114597193A (zh) * 2020-12-07 2022-06-07 群创光电股份有限公司 电子装置的重布线层结构及其制作方法
TWI812977B (zh) * 2021-07-16 2023-08-21 欣興電子股份有限公司 電路板強化結構及其製作方法
JP7743265B2 (ja) * 2021-10-26 2025-09-24 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
CN117812852A (zh) * 2022-09-23 2024-04-02 鹏鼎控股(深圳)股份有限公司 多层线路板的制造方法

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Also Published As

Publication number Publication date
KR20130028861A (ko) 2013-03-20
US20130062108A1 (en) 2013-03-14
TWI625990B (zh) 2018-06-01
JP2013062314A (ja) 2013-04-04
US9060455B2 (en) 2015-06-16
TW201325339A (zh) 2013-06-16
KR101906883B1 (ko) 2018-12-05

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