JP5735107B2 - ３次元メモリおよびその形成方法 - Google Patents

３次元メモリおよびその形成方法 Download PDF

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JP5735107B2
JP5735107B2 JP2013518511A JP2013518511A JP5735107B2 JP 5735107 B2 JP5735107 B2 JP 5735107B2 JP 2013518511 A JP2013518511 A JP 2013518511A JP 2013518511 A JP2013518511 A JP 2013518511A JP 5735107 B2 JP5735107 B2 JP 5735107B2
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memory
conductive material
memory cells
dielectric
cavity
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JP2013533628A5 (enExample
JP2013533628A (ja
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ディー． タン，サン
ディー． タン，サン
ケー． ザフラク，ジョン
ケー． ザフラク，ジョン
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マイクロン テクノロジー， インク．
マイクロン テクノロジー， インク．
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
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    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
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    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
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    • G11C13/0097—Erasing, e.g. resetting, circuits or methods
    • G—PHYSICS
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    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
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    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G—PHYSICS
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    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
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    • H10B41/23—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B41/27—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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    • H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
    • H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
    • H10B63/34—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors of the vertical channel field-effect transistor type
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    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
    • H10B63/845—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays the switching components being connected to a common vertical conductor
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    • H10D30/0411—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having floating gates
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    • H10D30/0413—Manufacture or treatment of FETs having insulated gates [IGFET] of FETs having charge-trapping gate insulators, e.g. MNOS transistors
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    • H10D30/68—Floating-gate IGFETs
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    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
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    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
JP2013518511A 2010-06-28 2011-06-24 ３次元メモリおよびその形成方法 Active JP5735107B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/825,211 2010-06-28
US12/825,211 US8803214B2 (en) 2010-06-28 2010-06-28 Three dimensional memory and methods of forming the same
PCT/US2011/041888 WO2012009140A2 (en) 2010-06-28 2011-06-24 Three dimensional memory and methods of forming the same

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JP2015083308A Division JP5923641B2 (ja) 2010-06-28 2015-04-15 ３次元メモリおよびその形成方法

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JP2013533628A JP2013533628A (ja) 2013-08-22
JP2013533628A5 JP2013533628A5 (enExample) 2014-08-21
JP5735107B2 true JP5735107B2 (ja) 2015-06-17

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US (9) US8803214B2 (enExample)
EP (2) EP2586060B1 (enExample)
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KR (2) KR102005475B1 (enExample)
CN (1) CN103038882B (enExample)
SG (3) SG10201907425TA (enExample)
WO (1) WO2012009140A2 (enExample)

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