JP6563988B2 - 不揮発性半導体記憶装置 - Google Patents
不揮発性半導体記憶装置 Download PDFInfo
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- JP6563988B2 JP6563988B2 JP2017160921A JP2017160921A JP6563988B2 JP 6563988 B2 JP6563988 B2 JP 6563988B2 JP 2017160921 A JP2017160921 A JP 2017160921A JP 2017160921 A JP2017160921 A JP 2017160921A JP 6563988 B2 JP6563988 B2 JP 6563988B2
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- 239000004065 semiconductor Substances 0.000 title claims description 9
- 238000003860 storage Methods 0.000 claims description 64
- 239000000758 substrate Substances 0.000 claims description 33
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 22
- 229910052710 silicon Inorganic materials 0.000 claims description 22
- 239000010703 silicon Substances 0.000 claims description 22
- 150000004767 nitrides Chemical class 0.000 claims description 8
- 230000006870 function Effects 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 4
- 230000002093 peripheral effect Effects 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 97
- 239000012535 impurity Substances 0.000 description 22
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 14
- 229920005591 polysilicon Polymers 0.000 description 14
- 238000000034 method Methods 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 10
- 238000009825 accumulation Methods 0.000 description 9
- 230000008569 process Effects 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 239000002784 hot electron Substances 0.000 description 5
- 239000007769 metal material Substances 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 230000010354 integration Effects 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- -1 arsenic ions Chemical class 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
- H01L29/7926—Vertical transistors, i.e. transistors having source and drain not in the same horizontal plane
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
- H10B41/41—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
- H10B43/23—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels
- H10B43/27—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels with source and drain on different levels, e.g. with sloping channels the channels comprising vertical portions, e.g. U-shaped channels
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/40—EEPROM devices comprising charge-trapping gate insulators characterised by the peripheral circuit region
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5671—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge trapping in an insulator
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Description
110:シリコン基板
120:柱状部
130A、130B:電荷蓄積部
132、136:酸化膜(O)
134:窒化膜(N)
140:コントロールゲート
150:セレクトゲート
160:ビット線
300:シリコン基板
310:高不純物層
320:第1のバッファ層
330:第2のバッファ層
340:マスク層
350:開口
360:柱状部
372、376:酸化膜(O)
374:窒化膜(N)
Claims (7)
- 基板と、
前記基板の表面から垂直方向に延在し、かつ導電性の半導体材料から構成される複数の柱状部と、
各柱状部の側部を取り囲むように形成された電荷蓄積部と、
各柱状部の側部を取り囲むように形成された絶縁部と、
行方向の電荷蓄積部の側部を取り囲むように形成されたコントロールゲートと、
行方向の絶縁部の側部を取り囲むように形成されたセレクトゲートと、
メモリセルをプログラムする手段とを有し、
前記柱状部の一方の端部がコンタクトホールを介してビット線に電気的に接続され、前記柱状部の他方の端部が前記基板側の基準電位に電気的に接続され、
前記柱状部の一方の端部側に配置された前記電荷蓄積部および前記コントロールゲートを含むメモリセルと、前記柱状部の他方の端部側に配置された前記絶縁部および前記セレクトゲートを含む選択トランジスタとが直列に接続され、
当該プログラムする手段は、選択メモリセルのコントロールゲートにプログラム電圧を印加し、前記選択メモリセルと直列に接続された選択トランジスタのセレクトゲートに前記プログラム電圧よりも小さい選択電圧を印加し、選択されたビット線に前記基準電位よりも大きい正の電圧を印加する、NOR型のフラッシュメモリ。 - 前記選択トランジスタは、電流制限用のトランジスタとして機能し、前記選択メモリセルの電荷蓄積部には、ソース側から電子が注入される、請求項1に記載のフラッシュメモリ。
- フラッシュメモリは、行アドレスに基づき行方向のコントロールゲートおよびセレクトゲートを選択する行選択手段と、列アドレスに基づき列方向のビット線およびソース線を選択する列選択手段とを含む、請求項1または2に記載のフラッシュメモリ。
- 前記電荷蓄積部と前記絶縁部とは、同一の構成である、請求項1に記載のフラッシュメモリ。
- 前記電荷蓄積部および絶縁部は、酸化膜(O)、窒化膜(N)および酸化膜(O)を含む、請求項4に記載のフラッシュメモリ。
- 前記基準電位は、シリコン基板上に形成された導電領域である、請求項1に記載のフラッシュメモリ。
- メモリセルの周辺回路は、シリコン基板上に形成され、メモリセルは、前記導電領域上に形成される、請求項6に記載のフラッシュメモリ。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017160921A JP6563988B2 (ja) | 2017-08-24 | 2017-08-24 | 不揮発性半導体記憶装置 |
TW107118202A TWI657567B (zh) | 2017-08-24 | 2018-05-28 | 反或型快閃記憶體 |
CN201810685566.0A CN109427799B (zh) | 2017-08-24 | 2018-06-28 | 或非型快闪存储器 |
KR1020180087222A KR102076415B1 (ko) | 2017-08-24 | 2018-07-26 | Nor형 플래시 메모리 |
US16/111,237 US11683935B2 (en) | 2017-08-24 | 2018-08-24 | NOR flash memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2017160921A JP6563988B2 (ja) | 2017-08-24 | 2017-08-24 | 不揮発性半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
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JP2019040972A JP2019040972A (ja) | 2019-03-14 |
JP6563988B2 true JP6563988B2 (ja) | 2019-08-21 |
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JP2017160921A Active JP6563988B2 (ja) | 2017-08-24 | 2017-08-24 | 不揮発性半導体記憶装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US11683935B2 (ja) |
JP (1) | JP6563988B2 (ja) |
KR (1) | KR102076415B1 (ja) |
CN (1) | CN109427799B (ja) |
TW (1) | TWI657567B (ja) |
Families Citing this family (10)
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TWI685949B (zh) * | 2019-05-15 | 2020-02-21 | 力晶積成電子製造股份有限公司 | 非揮發性記憶體結構 |
CN112466892A (zh) * | 2019-09-09 | 2021-03-09 | 旺宏电子股份有限公司 | 存储器、集成电路存储器及制造存储器的方法 |
US10978485B2 (en) * | 2019-09-09 | 2021-04-13 | Macronix International Co., Ltd. | Vertical-channel ferroelectric flash memory |
JP7341810B2 (ja) * | 2019-09-13 | 2023-09-11 | キオクシア株式会社 | 半導体記憶装置 |
JP6908738B1 (ja) * | 2020-01-06 | 2021-07-28 | ウィンボンド エレクトロニクス コーポレーション | 抵抗変化型記憶装置 |
US11985825B2 (en) | 2020-06-25 | 2024-05-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | 3D memory array contact structures |
US11653500B2 (en) | 2020-06-25 | 2023-05-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Memory array contact structures |
WO2022021307A1 (zh) * | 2020-07-31 | 2022-02-03 | 华为技术有限公司 | 存储单元和存储器 |
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