JP5578962B2 - 配線基板 - Google Patents

配線基板 Download PDF

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Publication number
JP5578962B2
JP5578962B2 JP2010143862A JP2010143862A JP5578962B2 JP 5578962 B2 JP5578962 B2 JP 5578962B2 JP 2010143862 A JP2010143862 A JP 2010143862A JP 2010143862 A JP2010143862 A JP 2010143862A JP 5578962 B2 JP5578962 B2 JP 5578962B2
Authority
JP
Japan
Prior art keywords
insulating layer
layer
wiring
opening
insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2010143862A
Other languages
English (en)
Japanese (ja)
Other versions
JP2012009606A (ja
JP2012009606A5 (https=
Inventor
人資 近藤
朋幸 下平
雅子 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2010143862A priority Critical patent/JP5578962B2/ja
Priority to US13/114,417 priority patent/US8450852B2/en
Priority to CN201110169981.9A priority patent/CN102300396B/zh
Publication of JP2012009606A publication Critical patent/JP2012009606A/ja
Publication of JP2012009606A5 publication Critical patent/JP2012009606A5/ja
Application granted granted Critical
Publication of JP5578962B2 publication Critical patent/JP5578962B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/69—Insulating materials thereof
    • H10W70/695—Organic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP2010143862A 2010-06-24 2010-06-24 配線基板 Active JP5578962B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2010143862A JP5578962B2 (ja) 2010-06-24 2010-06-24 配線基板
US13/114,417 US8450852B2 (en) 2010-06-24 2011-05-24 Wiring substrate
CN201110169981.9A CN102300396B (zh) 2010-06-24 2011-06-23 配线基板

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010143862A JP5578962B2 (ja) 2010-06-24 2010-06-24 配線基板

Publications (3)

Publication Number Publication Date
JP2012009606A JP2012009606A (ja) 2012-01-12
JP2012009606A5 JP2012009606A5 (https=) 2013-06-27
JP5578962B2 true JP5578962B2 (ja) 2014-08-27

Family

ID=45351753

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010143862A Active JP5578962B2 (ja) 2010-06-24 2010-06-24 配線基板

Country Status (3)

Country Link
US (1) US8450852B2 (https=)
JP (1) JP5578962B2 (https=)
CN (1) CN102300396B (https=)

Families Citing this family (19)

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US8952540B2 (en) * 2011-06-30 2015-02-10 Intel Corporation In situ-built pin-grid arrays for coreless substrates, and methods of making same
WO2013047848A1 (ja) * 2011-09-30 2013-04-04 京セラ株式会社 配線基板、部品内蔵基板および実装構造体
DE112011105967T5 (de) * 2011-12-20 2014-09-25 Intel Corporation Mikroelektronisches Gehäuse und gestapelte mikroelektronische Baugruppe und Rechensystem mit denselben
JP5990421B2 (ja) * 2012-07-20 2016-09-14 新光電気工業株式会社 配線基板及びその製造方法、半導体パッケージ
JP2015038911A (ja) 2012-09-27 2015-02-26 イビデン株式会社 プリント配線板及びプリント配線板の製造方法
CN104428881B (zh) 2013-07-08 2017-06-09 索尼公司 固化条件的确定方法、电路器件的生产方法和电路器件
JP6323011B2 (ja) * 2014-01-08 2018-05-16 株式会社デンソー 多層基板
JP6208054B2 (ja) * 2014-03-10 2017-10-04 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
US9941219B2 (en) 2014-09-19 2018-04-10 Intel Corporation Control of warpage using ABF GC cavity for embedded die package
JP6384879B2 (ja) * 2015-01-23 2018-09-05 オリンパス株式会社 撮像装置、および内視鏡
US9961767B2 (en) * 2015-02-10 2018-05-01 Shinko Electric Industires Co., Ltd. Circuit board and method of manufacturing circuit board
JP6444269B2 (ja) * 2015-06-19 2018-12-26 新光電気工業株式会社 電子部品装置及びその製造方法
US9997428B2 (en) 2015-07-14 2018-06-12 Avago Technologies General Ip (Singapore) Pte. Ltd. Via structures for thermal dissipation
US10129972B2 (en) 2015-10-30 2018-11-13 Avago Technologies International Sales Pte. Limited Frame elements for package structures comprising printed circuit boards (PCBs)
JP6812678B2 (ja) * 2016-06-29 2021-01-13 昭和電工マテリアルズ株式会社 配線板の製造方法
JP7252871B2 (ja) * 2019-09-26 2023-04-05 京セラ株式会社 基体構造体及び基体構造体を用いた電子デバイス
JP7229135B2 (ja) * 2019-09-26 2023-02-27 京セラ株式会社 電子デバイス
JP7566652B2 (ja) * 2021-02-02 2024-10-15 キオクシア株式会社 半導体装置および基板
US20230317592A1 (en) * 2022-04-01 2023-10-05 Intel Corporation Substrate with low-permittivity core and buildup layers

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JPH04322451A (ja) * 1991-04-23 1992-11-12 Hitachi Ltd 半導体装置
US6143116A (en) * 1996-09-26 2000-11-07 Kyocera Corporation Process for producing a multi-layer wiring board
JP2000244127A (ja) * 1998-12-24 2000-09-08 Ngk Spark Plug Co Ltd 配線基板および配線基板の製造方法
JP2000286362A (ja) * 1999-03-30 2000-10-13 Mitsubishi Gas Chem Co Inc 極薄ｂｇａタイプ半導体プラスチックパッケージ用プリント配線板
JP2000294677A (ja) * 1999-04-05 2000-10-20 Fujitsu Ltd 高密度薄膜配線基板及びその製造方法
US6413620B1 (en) * 1999-06-30 2002-07-02 Kyocera Corporation Ceramic wiring substrate and method of producing the same
JP2001102749A (ja) * 1999-09-17 2001-04-13 Internatl Business Mach Corp <Ibm> 回路基板
JP2001284809A (ja) * 2000-04-03 2001-10-12 Ibiden Co Ltd 多層回路基板および、その製造方法
US6753483B2 (en) * 2000-06-14 2004-06-22 Matsushita Electric Industrial Co., Ltd. Printed circuit board and method of manufacturing the same
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JP2004186265A (ja) * 2002-11-29 2004-07-02 Ngk Spark Plug Co Ltd 多層配線基板の製造方法
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JP2004228521A (ja) * 2003-01-27 2004-08-12 Ngk Spark Plug Co Ltd 配線基板およびその製造方法
JP2004140385A (ja) 2003-11-17 2004-05-13 Kyocera Corp 多層配線基板
JP2006120943A (ja) * 2004-10-22 2006-05-11 Shinko Electric Ind Co Ltd チップ内蔵基板及びその製造方法
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JP4806279B2 (ja) * 2006-03-17 2011-11-02 三菱樹脂株式会社 ガラスクロス含有絶縁基材
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JP5173338B2 (ja) 2007-09-19 2013-04-03 新光電気工業株式会社 多層配線基板及びその製造方法
JP5096855B2 (ja) * 2007-09-27 2012-12-12 新光電気工業株式会社 配線基板の製造方法及び配線基板
JP2009176889A (ja) * 2008-01-23 2009-08-06 Hitachi Chem Co Ltd 多層プリント配線板用絶縁樹脂組成物、支持体付き絶縁フィルム、多層プリント配線板及びその製造方法
JP2009224461A (ja) * 2008-03-14 2009-10-01 Shinko Electric Ind Co Ltd 配線基板及びその製造方法
JP5295596B2 (ja) * 2008-03-19 2013-09-18 新光電気工業株式会社 多層配線基板およびその製造方法
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JP5479233B2 (ja) * 2010-06-04 2014-04-23 新光電気工業株式会社 配線基板及びその製造方法

Also Published As

Publication number Publication date
US20110316148A1 (en) 2011-12-29
CN102300396A (zh) 2011-12-28
JP2012009606A (ja) 2012-01-12
US8450852B2 (en) 2013-05-28
CN102300396B (zh) 2016-08-24

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