JP5574089B2 - サブリソグラフィックパターニングのためにブロック共重合体自己集合を使用する方法 - Google Patents
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Description
Claims (24)
- 基板のサブリソグラフィックパターニングのための方法であって、
L0の固有周期を持つブロック共重合体を提供するステップと、
複数のトレンチを含む基板を提供するステップであって、前記複数のトレンチの各トレンチは、自己集合した共重合体によって画定されており、かつ、nL0の幅を持ち、nは1から15である、ステップと、
前記ブロック共重合体を前記基板上に堆積するステップと、
前記ブロック共重合体をアニールして、前記ブロック共重合体を自己集合させるステップと、
を含む方法。 - 前記複数のトレンチの各トレンチは二つの側壁を持ち、両側壁は前記ブロック共重合体の一つのブロックによって選択的にウェッティングされる、請求項1記載の方法。
- 前記複数のトレンチの各トレンチは、前記ブロック共重合体の各ブロックに対してニュートラルウェッティングである床面を持つ、請求項1又は2記載の方法。
- アニールするステップは、前記基板にほぼ垂直で、かつ各トレンチ側壁にほぼ整合するラメラのセットを、各トレンチ内に形成し、
前記方法は、
前記ラメラのセットの第一の部分を架橋するステップであって、前記第一の部分は、前記自己集合したブロック共重合体の第一のブロックを含むラメラを含む、ステップと、
前記ラメラのセットの第二の部分を選択的に除去するステップであって、前記第二の部分は前記自己集合したブロック共重合体の第二のブロックを含むラメラを含む、ステップと、
前記架橋されたラメラをエッチングマスクとして使用して前記基板をエッチングして、サブリソグラフィックトレンチを形成するステップと、
残存する高分子材料を随意に除去するステップと、
前記サブリソグラフィックトレンチの中に導電性材料を堆積して、サブリソグラフィック導電性ラインを形成するステップと、
を更に含む、請求項2記載の方法。 - 前記導電性材料は金属含有材料である、請求項4記載の方法。
- 一つ以上の追加の層を堆積してデバイスを形成するステップを更に含む、請求項4又は5記載の方法。
- 前記サブリソグラフィック導電性ラインはトランジスタゲートである、請求項4又は5記載の方法。
- アニールするステップは、前記基板にほぼ垂直で、かつ各トレンチ側壁にほぼ整合するラメラのセットを、各トレンチ内に形成し、
前記方法は、
前記ラメラのセットの第一の部分を架橋するステップであって、前記第一の部分は、前記自己集合したブロック共重合体の第一のブロックを含むラメラを含む、ステップと、
前記ラメラのセットの第二の部分を選択的に除去するステップであって、前記第二の部分は前記自己集合したブロック共重合体の第二のブロックを含むラメラを含む、ステップと、
前記架橋されたラメラをエッチングマスクとして使用して前記基板をエッチングして、サブリソグラフィックトレンチを形成するステップと、
残存する高分子材料を随意に除去するステップと、
前記サブリソグラフィックトレンチの中に絶縁材料を堆積して、活性領域を分離するステップと、
を更に含む、請求項2記載の方法。 - 一つ以上の追加の層を堆積してデバイスを形成するステップを更に含む、請求項8記載の方法。
- 前記絶縁材料は低誘電率を持つ、請求項8又は9記載の方法。
- 基板をパターニングするための方法であって、
L0の固有周期を持つ第一のブロック共重合体を提供するステップと、
L0′の固有周期を持つ第二のブロック共重合体を提供するステップと、
高さYの複数の堰を含む表面を持つ基板を提供して、堰とトレンチの表面地形を形成するステップであって、各トレンチは前記第一のブロック共重合体の各ブロックに対してニュートラルウェッティングである床面を持ち、各トレンチは前記第一のブロック共重合体の一つのブロックによって選択的にウェッティングされる二つの側壁を持ち、各トレンチはnL0の幅を持ち、nは1から15であり、堰幅/トレンチ幅の比はmL0′/nL0であり、mは1から15である、ステップと、
前記基板上に前記第一のブロック共重合体を堆積して、厚さY以下の層を形成するステップと、
前記第一のブロック共重合体の層をアニールして、前記第一のブロック共重合体を自己集合させ、前記基板にほぼ垂直で、かつ各トレンチ側壁とほぼ整合するラメラの第一のセットを、各トレンチ内に形成するステップと、
前記自己集合した第一のブロック共重合体の第一のブロックを含む前記ラメラの第一のセットの部分を架橋するステップと、
前記堰を形成する材料の少なくとも一部を除去して、深さY′の少なくとも一つの開口部を形成するステップであって、前記少なくとも一つの開口部は前記第二のブロック共重合体の各ブロックに対してニュートラルウェッティングである床面を持ち、前記少なくとも一つの開口部は前記第二のブロック共重合体の一つのブロックによって選択的にウェッティングされる二つの側壁を持ち、前記少なくとも一つの開口部はmL0′の幅を持ち、mは1から15である、ステップと、
前記基板上に前記第二のブロック共重合体を堆積して、厚さY′以下の層を形成するステップと、
前記第二のブロック共重合体の層をアニールして、前記第二のブロック共重合体を自己集合させ、前記基板にほぼ垂直で、かつ各開口部側壁にほぼ整合するラメラの第二のセットを、前記少なくとも一つの開口部内に形成するステップと、
を含む方法。 - 前記ラメラの第二のセットの第一の部分を架橋するステップをさらに含み、前記ラメラの第二のセットの前記第一の部分は、前記自己集合した第二のブロック共重合体の第一のブロックを含むラメラを含む、請求項11記載の方法。
- 前記ラメラの第一のセットの第二の部分を選択的に除去するステップをさらに含み、前記ラメラの第一のセットの前記第二の部分は、前記自己集合した第一のブロック共重合体の第二のブロックを含むラメラを含む、請求項11記載の方法。
- 前記ラメラの第二のセットの第二の部分を選択的に除去するステップをさらに含み、前記ラメラの第二のセットの前記第二の部分は、前記自己集合した第二のブロック共重合体の第二のブロックを含むラメラを含む、請求項11記載の方法。
- 前記基板上に高分子マットを堆積するステップと、前記高分子マットを架橋するステップとをさらに含む、請求項1、2、4、5、8、9、11、12、13、又は14のいずれか一項に記載の方法。
- L0=L0′である請求項11記載の方法。
- 前記第一のブロック共重合体は前記第二のブロック共重合体と同じである、請求項11記載の方法。
- 前記第一のブロック共重合体を前記基板上に堆積するステップは、スピンコーティング、浸漬コーティング、スプレーコーティング、およびそれらの組み合わせからなる群から選択される方法を含む、請求項11記載の方法。
- アニールするステップは、熱アニーリング、溶媒アニーリング、もしくはそれらの組み合わせを含む、請求項1、2、4、5、8、9、11、12、14、16、17、又は18のいずれか一項に記載の方法。
- 高さYの複数の堰を含む表面を持つ基板を提供して、堰とトレンチの表面地形を形成するステップが、
前記表面を持つ前記基板を提供するステップと、
前記基板上に厚さYの層を堆積するステップと、
前記厚さYの層を選択的にエッチングして、堰とトレンチの表面地形を形成するように高さYの複数の堰を形成するステップと、
を含む、請求項11から14、16、17、又は18のいずれか一項に記載の方法。 - 基板をパターニングする方法であって、
基板上に堰及び開口部を形成するステップであって、前記堰は、各々、交互に並んだラメラの第一のセットを含む自己集合した第一のブロック共重合体を含む、ステップと、
前記開口部内に第二のブロック共重合体を形成するステップと、
前記開口部内の前記第二のブロック共重合体を自己集合させて、前記開口部の各々の中に、交互に並んだラメラの第二のセットを形成するステップと、
を含む方法。 - 前記第一及び第二のブロック共重合体は同一の組成からなる、請求項21記載の方法。
- 前記第一及び第二のブロック共重合体は異なる組成からなる、請求項21記載の方法。
- 基板をパターニングする方法であって、
基板上の犠牲材料の中に第一の開口部を形成するステップと、
前記第一の開口部内に第一のブロック共重合体を形成するステップと、
前記第一の開口部内の前記第一のブロック共重合体を自己集合させて、前記第一の開口部内に、交互に並んだラメラの第一のセットを形成するステップと、
前記犠牲材料を除去して、前記基板上に第二の開口部を形成するステップであって、前記第二の開口部は、前記自己集合した第一のブロック共重合体を含む側壁を含む、ステップと、
前記第二の開口部内に第二のブロック共重合体を形成するステップと、
前記第二の開口部内の前記第二のブロック共重合体を自己集合させて、前記第二の開口部内に、交互に並んだラメラの第二のセットを形成するステップと、
を含む方法。
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