JP4637380B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP4637380B2
JP4637380B2 JP2001032362A JP2001032362A JP4637380B2 JP 4637380 B2 JP4637380 B2 JP 4637380B2 JP 2001032362 A JP2001032362 A JP 2001032362A JP 2001032362 A JP2001032362 A JP 2001032362A JP 4637380 B2 JP4637380 B2 JP 4637380B2
Authority
JP
Japan
Prior art keywords
semiconductor chip
semiconductor device
die pad
semiconductor
sealing resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001032362A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002237565A (ja
JP2002237565A5 (enExample
Inventor
俊一 阿部
哲也 上林
直生 和泉
暁 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2001032362A priority Critical patent/JP4637380B2/ja
Priority to US09/892,539 priority patent/US6737736B2/en
Priority to DE10142585A priority patent/DE10142585B4/de
Priority to KR10-2001-0063287A priority patent/KR100445501B1/ko
Publication of JP2002237565A publication Critical patent/JP2002237565A/ja
Priority to US10/810,813 priority patent/US6965154B2/en
Publication of JP2002237565A5 publication Critical patent/JP2002237565A5/ja
Application granted granted Critical
Publication of JP4637380B2 publication Critical patent/JP4637380B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP2001032362A 2001-02-08 2001-02-08 半導体装置 Expired - Fee Related JP4637380B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2001032362A JP4637380B2 (ja) 2001-02-08 2001-02-08 半導体装置
US09/892,539 US6737736B2 (en) 2001-02-08 2001-06-28 Semiconductor device
DE10142585A DE10142585B4 (de) 2001-02-08 2001-08-31 Halbleiteranordnung und zugehöriges Verfahren zu deren Herstellung
KR10-2001-0063287A KR100445501B1 (ko) 2001-02-08 2001-10-15 반도체장치 및 그 제조방법
US10/810,813 US6965154B2 (en) 2001-02-08 2004-03-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001032362A JP4637380B2 (ja) 2001-02-08 2001-02-08 半導体装置

Publications (3)

Publication Number Publication Date
JP2002237565A JP2002237565A (ja) 2002-08-23
JP2002237565A5 JP2002237565A5 (enExample) 2008-03-21
JP4637380B2 true JP4637380B2 (ja) 2011-02-23

Family

ID=18896308

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001032362A Expired - Fee Related JP4637380B2 (ja) 2001-02-08 2001-02-08 半導体装置

Country Status (4)

Country Link
US (2) US6737736B2 (enExample)
JP (1) JP4637380B2 (enExample)
KR (1) KR100445501B1 (enExample)
DE (1) DE10142585B4 (enExample)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6843421B2 (en) * 2001-08-13 2005-01-18 Matrix Semiconductor, Inc. Molded memory module and method of making the module absent a substrate support
US6731011B2 (en) * 2002-02-19 2004-05-04 Matrix Semiconductor, Inc. Memory module having interconnected and stacked integrated circuits
JP2004071899A (ja) * 2002-08-07 2004-03-04 Sanyo Electric Co Ltd 回路装置およびその製造方法
US6667543B1 (en) * 2002-10-29 2003-12-23 Motorola, Inc. Optical sensor package
US6879028B2 (en) * 2003-02-21 2005-04-12 Freescale Semiconductor, Inc. Multi-die semiconductor package
FR2854495B1 (fr) * 2003-04-29 2005-12-02 St Microelectronics Sa Procede de fabrication d'un boitier semi-conducteur et boitier semi-conducteur a grille.
JP2006019652A (ja) * 2004-07-05 2006-01-19 Toshiba Corp 半導体装置
US20060056233A1 (en) * 2004-09-10 2006-03-16 Parkinson Ward D Using a phase change memory as a replacement for a buffered flash memory
JP4602223B2 (ja) * 2005-10-24 2010-12-22 株式会社東芝 半導体装置とそれを用いた半導体パッケージ
JP5217291B2 (ja) * 2006-08-04 2013-06-19 大日本印刷株式会社 樹脂封止型半導体装置とその製造方法、半導体装置用基材、および積層型樹脂封止型半導体装置
JP4918391B2 (ja) * 2007-04-16 2012-04-18 オンセミコンダクター・トレーディング・リミテッド 半導体装置
JP2010129848A (ja) * 2008-11-28 2010-06-10 Sanyo Electric Co Ltd 半導体装置
US8110440B2 (en) 2009-05-18 2012-02-07 Stats Chippac, Ltd. Semiconductor device and method of forming overlapping semiconductor die with coplanar vertical interconnect structure
WO2011155165A1 (ja) * 2010-06-11 2011-12-15 パナソニック株式会社 樹脂封止型半導体装置及びその製造方法
DE102010047128A1 (de) * 2010-09-30 2012-04-05 Infineon Technologies Ag Hallsensoranordnung zum redundanten Messen eines Magnetfeldes
CN107994004A (zh) * 2011-07-22 2018-05-04 超大规模集成电路技术有限责任公司 堆叠式管芯半导体封装体
US9184114B2 (en) * 2012-09-07 2015-11-10 Eoplex Limited Lead carrier with print-formed terminal pads
JP2014207821A (ja) * 2013-04-15 2014-10-30 矢崎総業株式会社 電子部品及び電子部品の組付構造
US9275944B2 (en) * 2013-08-29 2016-03-01 Infineon Technologies Ag Semiconductor package with multi-level die block
US8952509B1 (en) * 2013-09-19 2015-02-10 Alpha & Omega Semiconductor, Inc. Stacked multi-chip bottom source semiconductor device and preparation method thereof
DE102014213217A1 (de) * 2014-07-08 2016-01-14 Continental Teves Ag & Co. Ohg Körperschallentkopplung an mit Geberfeldern arbeitenden Sensoren
JP6846225B2 (ja) * 2017-02-06 2021-03-24 ラピスセミコンダクタ株式会社 検査回路、半導体記憶素子、半導体装置、および接続検査方法
WO2019021766A1 (ja) * 2017-07-24 2019-01-31 株式会社デンソー 半導体装置及び半導体装置の製造方法
JP6780675B2 (ja) * 2017-07-24 2020-11-04 株式会社デンソー 半導体装置及び半導体装置の製造方法
JP7167721B2 (ja) * 2019-01-10 2022-11-09 株式会社デンソー 半導体装置およびその製造方法
CN118471867B (zh) * 2024-07-13 2024-09-24 中北大学 一种半导体封装测试装置及其测试方法

Family Cites Families (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU2309388A (en) * 1987-08-26 1989-03-31 Matsushita Electric Industrial Co., Ltd. Integrated circuit device and method of producing the same
JPH0444145A (ja) * 1990-06-11 1992-02-13 Nec Corp 端末構成認識方式
US5172214A (en) * 1991-02-06 1992-12-15 Motorola, Inc. Leadless semiconductor device and method for making the same
JPH0521703A (ja) 1991-07-11 1993-01-29 Mitsubishi Electric Corp 半導体装置
JPH05218295A (ja) 1992-02-04 1993-08-27 Fujitsu Ltd 半導体装置
KR0128251Y1 (ko) * 1992-08-21 1998-10-15 문정환 리드 노출형 반도체 조립장치
US6165819A (en) * 1992-10-20 2000-12-26 Fujitsu Limited Semiconductor device, method of producing semiconductor device and semiconductor device mounting structure
KR960005042B1 (ko) * 1992-11-07 1996-04-18 금성일렉트론주식회사 반도체 펙케지
KR0149798B1 (ko) * 1994-04-15 1998-10-01 모리시다 요이치 반도체 장치 및 그 제조방법과 리드프레임
JPH088389A (ja) * 1994-04-20 1996-01-12 Fujitsu Ltd 半導体装置及び半導体装置ユニット
JPH08222681A (ja) * 1995-02-14 1996-08-30 Toshiba Corp 樹脂封止型半導体装置
US5721452A (en) * 1995-08-16 1998-02-24 Micron Technology, Inc. Angularly offset stacked die multichip device and method of manufacture
US5886412A (en) * 1995-08-16 1999-03-23 Micron Technology, Inc. Angularly offset and recessed stacked die multichip device
US5689135A (en) * 1995-12-19 1997-11-18 Micron Technology, Inc. Multi-chip device and method of fabrication employing leads over and under processes
KR0179803B1 (ko) * 1995-12-29 1999-03-20 문정환 리드노출형 반도체 패키지
KR100204753B1 (ko) * 1996-03-08 1999-06-15 윤종용 엘오씨 유형의 적층 칩 패키지
US6001671A (en) * 1996-04-18 1999-12-14 Tessera, Inc. Methods for manufacturing a semiconductor package having a sacrificial layer
KR0179924B1 (ko) * 1996-06-14 1999-03-20 문정환 버텀리드 반도체 패키지
JPH1012773A (ja) * 1996-06-24 1998-01-16 Matsushita Electron Corp 樹脂封止型半導体装置およびその製造方法
KR100237051B1 (ko) * 1996-12-28 2000-01-15 김영환 버텀리드 반도체 패키지 및 그 제조 방법
KR100242994B1 (ko) * 1996-12-28 2000-02-01 김영환 버텀리드프레임 및 그를 이용한 버텀리드 반도체 패키지
US6133637A (en) * 1997-01-24 2000-10-17 Rohm Co., Ltd. Semiconductor device having a plurality of semiconductor chips
KR100214561B1 (ko) * 1997-03-14 1999-08-02 구본준 버틈 리드 패키지
JP3495566B2 (ja) * 1997-07-23 2004-02-09 三洋電機株式会社 半導体装置
US6297547B1 (en) * 1998-02-13 2001-10-02 Micron Technology Inc. Mounting multiple semiconductor dies in a package
JPH11260972A (ja) * 1998-03-13 1999-09-24 Sumitomo Metal Mining Co Ltd 薄型半導体装置
KR100277438B1 (ko) * 1998-05-28 2001-02-01 윤종용 멀티칩패키지
KR100293815B1 (ko) * 1998-06-30 2001-07-12 박종섭 스택형 패키지
JP3842444B2 (ja) * 1998-07-24 2006-11-08 富士通株式会社 半導体装置の製造方法
KR100302593B1 (ko) * 1998-10-24 2001-09-22 김영환 반도체패키지및그제조방법
JP2000156464A (ja) 1998-11-20 2000-06-06 Hitachi Ltd 半導体装置の製造方法
JP3034517B1 (ja) 1999-03-11 2000-04-17 沖電気工業株式会社 半導体装置およびその製造方法
JP3235589B2 (ja) 1999-03-16 2001-12-04 日本電気株式会社 半導体装置
TW404030B (en) * 1999-04-12 2000-09-01 Siliconware Precision Industries Co Ltd Dual-chip semiconductor package device having malposition and the manufacture method thereof
US6215193B1 (en) * 1999-04-21 2001-04-10 Advanced Semiconductor Engineering, Inc. Multichip modules and manufacturing method therefor
US6163076A (en) * 1999-06-04 2000-12-19 Advanced Semiconductor Engineering, Inc. Stacked structure of semiconductor package
JP3497775B2 (ja) * 1999-08-23 2004-02-16 松下電器産業株式会社 半導体装置
JP3460646B2 (ja) * 1999-10-29 2003-10-27 松下電器産業株式会社 樹脂封止型半導体装置およびその製造方法
JP2001127244A (ja) * 1999-11-01 2001-05-11 Nec Corp マルチチップ半導体装置およびその製造方法
US6376914B2 (en) * 1999-12-09 2002-04-23 Atmel Corporation Dual-die integrated circuit package
JP3429245B2 (ja) * 2000-03-07 2003-07-22 沖電気工業株式会社 半導体装置及びその製造方法
US6448659B1 (en) * 2000-04-26 2002-09-10 Advanced Micro Devices, Inc. Stacked die design with supporting O-ring
US6518659B1 (en) * 2000-05-08 2003-02-11 Amkor Technology, Inc. Stackable package having a cavity and a lid for an electronic device
US6424031B1 (en) * 2000-05-08 2002-07-23 Amkor Technology, Inc. Stackable package with heat sink
JP3668101B2 (ja) * 2000-07-05 2005-07-06 三洋電機株式会社 半導体装置
US6365966B1 (en) * 2000-08-07 2002-04-02 Advanced Semiconductor Engineering, Inc. Stacked chip scale package
TW546789B (en) * 2000-09-06 2003-08-11 Siliconware Precision Industries Co Ltd Dual-chip structure without die pad
JP2002093992A (ja) * 2000-09-13 2002-03-29 Seiko Epson Corp 半導体装置及びその製造方法
US6476474B1 (en) * 2000-10-10 2002-11-05 Siliconware Precision Industries Co., Ltd. Dual-die package structure and method for fabricating the same
US6462422B2 (en) * 2001-01-19 2002-10-08 Siliconware Precision Industries Co., Ltd. Intercrossedly-stacked dual-chip semiconductor package
US6388313B1 (en) * 2001-01-30 2002-05-14 Siliconware Precision Industries Co., Ltd. Multi-chip module

Also Published As

Publication number Publication date
US20020105061A1 (en) 2002-08-08
US6965154B2 (en) 2005-11-15
JP2002237565A (ja) 2002-08-23
US20040178490A1 (en) 2004-09-16
US6737736B2 (en) 2004-05-18
DE10142585B4 (de) 2007-08-09
DE10142585A1 (de) 2002-09-05
KR20020066366A (ko) 2002-08-16
KR100445501B1 (ko) 2004-08-21

Similar Documents

Publication Publication Date Title
JP4637380B2 (ja) 半導体装置
US6909168B2 (en) Resin encapsulation semiconductor device utilizing grooved leads and die pad
JP3205235B2 (ja) リードフレーム、樹脂封止型半導体装置、その製造方法及び該製造方法で用いる半導体装置製造用金型
US9236317B2 (en) Semiconductor device
JP2002231882A (ja) 半導体装置
WO2004004005A1 (ja) 半導体装置およびその製造方法
US6483181B2 (en) Multi-chip package
KR20040053902A (ko) 멀티 칩 패키지
JP2002222889A (ja) 半導体装置及びその製造方法
TW200919604A (en) Integrated circuit packaging system with base structure device
JP3077668B2 (ja) 半導体装置、半導体装置用リードフレームおよびその製造方法
JP5144294B2 (ja) リードフレームおよびそれを用いた回路装置の製造方法
JP2003197846A (ja) リードフレームおよびこれを用いた半導体装置
JP2000156434A (ja) 半導体装置
JP3497775B2 (ja) 半導体装置
JP4317665B2 (ja) 樹脂封止型半導体装置の製造方法
JP5285289B2 (ja) 回路装置およびその製造方法
JP4033780B2 (ja) 半導体装置とその製造方法
JP2885786B1 (ja) 半導体装置の製法および半導体装置
JP3034517B1 (ja) 半導体装置およびその製造方法
JPH04302209A (ja) 中空素子構造
JP2007287809A (ja) 積層型半導体装置及び積層型半導体装置の製造方法
JPH08181165A (ja) 半導体集積回路
JP2004200719A (ja) 半導体装置
JP2003031752A (ja) リードフレーム、半導体装置、およびその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080204

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080204

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20091005

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100209

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100407

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20100519

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20101116

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20101124

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131203

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

LAPS Cancellation because of no payment of annual fees