JP4524455B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4524455B2
JP4524455B2 JP2004341475A JP2004341475A JP4524455B2 JP 4524455 B2 JP4524455 B2 JP 4524455B2 JP 2004341475 A JP2004341475 A JP 2004341475A JP 2004341475 A JP2004341475 A JP 2004341475A JP 4524455 B2 JP4524455 B2 JP 4524455B2
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JP
Japan
Prior art keywords
voltage
semiconductor device
word lines
memory element
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004341475A
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English (en)
Japanese (ja)
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JP2006155700A5 (https=
JP2006155700A (ja
Inventor
健一 長田
尊之 河原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
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Renesas Electronics Corp
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Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2004341475A priority Critical patent/JP4524455B2/ja
Priority to US11/283,689 priority patent/US7609544B2/en
Publication of JP2006155700A publication Critical patent/JP2006155700A/ja
Publication of JP2006155700A5 publication Critical patent/JP2006155700A5/ja
Application granted granted Critical
Publication of JP4524455B2 publication Critical patent/JP4524455B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/003—Cell access
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5678—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using amorphous/crystalline phase transition storage elements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0004—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising amorphous/crystalline phase transition cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0061—Timing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0064—Verifying circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/009—Write using potential difference applied between cell electrodes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • G11C2013/0092—Write characterized by the shape, e.g. form, length, amplitude of the write pulse
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/74—Array wherein each memory cell has more than one access device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/79—Array wherein the access device being a transistor

Landscapes

  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
JP2004341475A 2004-11-26 2004-11-26 半導体装置 Expired - Fee Related JP4524455B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2004341475A JP4524455B2 (ja) 2004-11-26 2004-11-26 半導体装置
US11/283,689 US7609544B2 (en) 2004-11-26 2005-11-22 Programmable semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004341475A JP4524455B2 (ja) 2004-11-26 2004-11-26 半導体装置

Publications (3)

Publication Number Publication Date
JP2006155700A JP2006155700A (ja) 2006-06-15
JP2006155700A5 JP2006155700A5 (https=) 2007-12-20
JP4524455B2 true JP4524455B2 (ja) 2010-08-18

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004341475A Expired - Fee Related JP4524455B2 (ja) 2004-11-26 2004-11-26 半導体装置

Country Status (2)

Country Link
US (1) US7609544B2 (https=)
JP (1) JP4524455B2 (https=)

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KR100819106B1 (ko) * 2006-09-27 2008-04-02 삼성전자주식회사 상변화 메모리 장치에서의 라이트 동작방법
JP4492816B2 (ja) 2006-10-03 2010-06-30 株式会社半導体理工学研究センター 多値記録相変化メモリ素子、多値記録相変化チャンネルトランジスタおよびメモリセルアレイ
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JP5060191B2 (ja) * 2007-07-18 2012-10-31 株式会社東芝 抵抗変化メモリ装置のデータ書き込み方法
KR100882119B1 (ko) * 2007-07-24 2009-02-05 주식회사 하이닉스반도체 상 변화 메모리 장치의 구동 방법
US7911824B2 (en) 2007-08-01 2011-03-22 Panasonic Corporation Nonvolatile memory apparatus
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KR100905170B1 (ko) * 2007-08-10 2009-06-29 주식회사 하이닉스반도체 상 변화 메모리 장치의 구동 방법
JP5253784B2 (ja) * 2007-10-17 2013-07-31 株式会社東芝 不揮発性半導体記憶装置
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US7729166B2 (en) * 2008-07-02 2010-06-01 Mosaid Technologies Incorporated Multiple-bit per cell (MBC) non-volatile memory apparatus and system having polarity control and method of programming same
KR20100035445A (ko) 2008-09-26 2010-04-05 삼성전자주식회사 비휘발성 메모리 장치 및 그 구동 방법
KR101552209B1 (ko) * 2008-10-17 2015-09-11 삼성전자주식회사 멀티 비트를 프로그램하는 가변 저항 메모리 장치
KR101448915B1 (ko) 2008-10-17 2014-10-14 삼성전자주식회사 프로그램 및 검증 동작을 수행하는 가변 저항 메모리 장치
IT1392578B1 (it) * 2008-12-30 2012-03-09 St Microelectronics Rousset Metodo di programmazione multilivello di celle di memoria a cambiamento di fase utilizzante impulsi di reset adattativi
TWI402845B (zh) 2008-12-30 2013-07-21 Higgs Opl Capital Llc 相變化記憶體陣列之驗證電路及方法
TWI412124B (zh) 2008-12-31 2013-10-11 Higgs Opl Capital Llc 相變化記憶體
JP4720912B2 (ja) 2009-01-22 2011-07-13 ソニー株式会社 抵抗変化型メモリデバイス
CN102067234B (zh) * 2009-04-27 2013-10-09 松下电器产业株式会社 电阻变化型非易失性存储元件的写入方法和电阻变化型非易失性存储装置
US8154904B2 (en) * 2009-06-19 2012-04-10 Sandisk 3D Llc Programming reversible resistance switching elements
KR101571148B1 (ko) * 2009-09-02 2015-11-23 삼성전자주식회사 저항 메모리 소자의 저항 측정 방법 및 저항 측정 시스템
US8289749B2 (en) * 2009-10-08 2012-10-16 Sandisk 3D Llc Soft forming reversible resistivity-switching element for bipolar switching
US8289762B2 (en) * 2009-10-30 2012-10-16 Intel Corporation Double-pulse write for phase change memory
US8817521B2 (en) * 2009-11-24 2014-08-26 Industrial Technology Research Institute Control method for memory cell
TWI428929B (zh) * 2009-11-24 2014-03-01 Ind Tech Res Inst 控制方法
KR20110088906A (ko) * 2010-01-29 2011-08-04 삼성전자주식회사 가변 저항 메모리 장치, 그것의 동작 방법, 그리고 그것을 포함하는 메모리 시스템
KR101097446B1 (ko) * 2010-01-29 2011-12-23 주식회사 하이닉스반도체 디스터번스를 줄일 수 있는 상변화 메모리 장치의 구동방법
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Also Published As

Publication number Publication date
US7609544B2 (en) 2009-10-27
JP2006155700A (ja) 2006-06-15
US20060126380A1 (en) 2006-06-15

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