JP4253052B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4253052B2 JP4253052B2 JP00598698A JP598698A JP4253052B2 JP 4253052 B2 JP4253052 B2 JP 4253052B2 JP 00598698 A JP00598698 A JP 00598698A JP 598698 A JP598698 A JP 598698A JP 4253052 B2 JP4253052 B2 JP 4253052B2
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- Japan
- Prior art keywords
- voltage
- misfet
- type
- source
- drain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0021—Modifications of threshold
- H03K19/0027—Modifications of threshold in field effect transistor circuits
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Logic Circuits (AREA)
- Dram (AREA)
- Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP00598698A JP4253052B2 (ja) | 1997-04-08 | 1998-01-14 | 半導体装置 |
| KR1019980013407A KR100305254B1 (ko) | 1997-04-08 | 1998-04-08 | 반도체장치 |
| US09/056,632 US6040610A (en) | 1997-04-08 | 1998-04-08 | Semiconductor device |
| TW087105307A TW421891B (en) | 1997-04-08 | 1998-04-08 | Semiconductor apparatus |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8953897 | 1997-04-08 | ||
| JP9-89538 | 1997-04-08 | ||
| JP00598698A JP4253052B2 (ja) | 1997-04-08 | 1998-01-14 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH10340998A JPH10340998A (ja) | 1998-12-22 |
| JPH10340998A5 JPH10340998A5 (enExample) | 2005-06-16 |
| JP4253052B2 true JP4253052B2 (ja) | 2009-04-08 |
Family
ID=26340036
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP00598698A Expired - Fee Related JP4253052B2 (ja) | 1997-04-08 | 1998-01-14 | 半導体装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6040610A (enExample) |
| JP (1) | JP4253052B2 (enExample) |
| KR (1) | KR100305254B1 (enExample) |
| TW (1) | TW421891B (enExample) |
Families Citing this family (124)
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| US6768165B1 (en) | 1997-08-01 | 2004-07-27 | Saifun Semiconductors Ltd. | Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
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| CN112509981B (zh) * | 2019-09-13 | 2024-05-31 | 杭州士兰集昕微电子有限公司 | 半导体器件及其制造方法 |
| US11681313B2 (en) | 2020-11-25 | 2023-06-20 | Changxin Memory Technologies, Inc. | Voltage generating circuit, inverter, delay circuit, and logic gate circuit |
| EP4033664B1 (en) * | 2020-11-25 | 2024-01-10 | Changxin Memory Technologies, Inc. | Potential generation circuit, inverter, delay circuit, and logic gate circuit |
| EP4033661B1 (en) | 2020-11-25 | 2024-01-24 | Changxin Memory Technologies, Inc. | Control circuit and delay circuit |
| CN114553216B (zh) * | 2020-11-25 | 2025-02-07 | 长鑫存储技术有限公司 | 电位产生电路、反相器、延时电路和逻辑门电路 |
| EP4033312B1 (en) | 2020-11-25 | 2024-08-21 | Changxin Memory Technologies, Inc. | Control circuit and delay circuit |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4092548A (en) * | 1977-03-15 | 1978-05-30 | International Business Machines Corporation | Substrate bias modulation to improve mosfet circuit performance |
| US4460835A (en) * | 1980-05-13 | 1984-07-17 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor integrated circuit device with low power consumption in a standby mode using an on-chip substrate bias generator |
| US4660835A (en) * | 1984-09-13 | 1987-04-28 | Locurto Anthony F | Tethered ball golf practice device |
| JPH06216346A (ja) * | 1992-11-30 | 1994-08-05 | Sony Corp | 半導体装置 |
| JP3175521B2 (ja) * | 1995-01-27 | 2001-06-11 | 日本電気株式会社 | シリコン・オン・インシュレータ半導体装置及びバイアス電圧発生回路 |
-
1998
- 1998-01-14 JP JP00598698A patent/JP4253052B2/ja not_active Expired - Fee Related
- 1998-04-08 US US09/056,632 patent/US6040610A/en not_active Expired - Fee Related
- 1998-04-08 KR KR1019980013407A patent/KR100305254B1/ko not_active Expired - Fee Related
- 1998-04-08 TW TW087105307A patent/TW421891B/zh active
Also Published As
| Publication number | Publication date |
|---|---|
| TW421891B (en) | 2001-02-11 |
| KR100305254B1 (ko) | 2001-11-02 |
| US6040610A (en) | 2000-03-21 |
| JPH10340998A (ja) | 1998-12-22 |
| KR19980081420A (ko) | 1998-11-25 |
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