JP3547101B2 - 表示プロセッサシステム及び表示プロセッサシステムにおける画素データを出力する方法 - Google Patents
表示プロセッサシステム及び表示プロセッサシステムにおける画素データを出力する方法 Download PDFInfo
- Publication number
- JP3547101B2 JP3547101B2 JP13529795A JP13529795A JP3547101B2 JP 3547101 B2 JP3547101 B2 JP 3547101B2 JP 13529795 A JP13529795 A JP 13529795A JP 13529795 A JP13529795 A JP 13529795A JP 3547101 B2 JP3547101 B2 JP 3547101B2
- Authority
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- Japan
- Prior art keywords
- register
- frame buffer
- data
- bus
- pixel data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
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Images
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/363—Graphics controllers
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/10—Aspects relating to interfaces of memory device to external buses
- G11C2207/104—Embedded memory devices, e.g. memories with a processing device on the same die or ASIC memory designs
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Graphics (AREA)
- Databases & Information Systems (AREA)
- Controls And Circuits For Display Device (AREA)
- Dram (AREA)
- Digital Computer Display Output (AREA)
- Image Processing (AREA)
- Memory System (AREA)
- Semiconductor Memories (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Image Generation (AREA)
- Transforming Electric Information Into Light Information (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US08/253,271 US5694143A (en) | 1994-06-02 | 1994-06-02 | Single chip frame buffer and graphics accelerator |
| US253271 | 1994-06-02 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002300220A Division JP2003241957A (ja) | 1994-06-02 | 2002-10-15 | シングルチップフレームバッファおよびグラフィックアクセラレータ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1026966A JPH1026966A (ja) | 1998-01-27 |
| JP3547101B2 true JP3547101B2 (ja) | 2004-07-28 |
Family
ID=22959575
Family Applications (4)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13529795A Expired - Fee Related JP3547101B2 (ja) | 1994-06-02 | 1995-06-01 | 表示プロセッサシステム及び表示プロセッサシステムにおける画素データを出力する方法 |
| JP2002300220A Pending JP2003241957A (ja) | 1994-06-02 | 2002-10-15 | シングルチップフレームバッファおよびグラフィックアクセラレータ |
| JP2008023690A Expired - Lifetime JP5299745B2 (ja) | 1994-06-02 | 2008-02-04 | シングルチップ表示プロセッサ |
| JP2010132490A Pending JP2010266871A (ja) | 1994-06-02 | 2010-06-09 | Ic(集積回路) |
Family Applications After (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002300220A Pending JP2003241957A (ja) | 1994-06-02 | 2002-10-15 | シングルチップフレームバッファおよびグラフィックアクセラレータ |
| JP2008023690A Expired - Lifetime JP5299745B2 (ja) | 1994-06-02 | 2008-02-04 | シングルチップ表示プロセッサ |
| JP2010132490A Pending JP2010266871A (ja) | 1994-06-02 | 2010-06-09 | Ic(集積回路) |
Country Status (4)
| Country | Link |
|---|---|
| US (5) | US5694143A (OSRAM) |
| EP (1) | EP0690430A3 (OSRAM) |
| JP (4) | JP3547101B2 (OSRAM) |
| KR (1) | KR960001972A (OSRAM) |
Families Citing this family (124)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5712664A (en) * | 1993-10-14 | 1998-01-27 | Alliance Semiconductor Corporation | Shared memory graphics accelerator system |
| WO1995035572A1 (en) * | 1994-06-20 | 1995-12-28 | Neomagic Corporation | Graphics controller integrated circuit without memory interface |
| US6078319A (en) * | 1995-04-17 | 2000-06-20 | Cirrus Logic, Inc. | Programmable core-voltage solution for a video controller |
| TW316965B (OSRAM) * | 1995-10-31 | 1997-10-01 | Cirrus Logic Inc | |
| US6359624B1 (en) | 1996-02-02 | 2002-03-19 | Kabushiki Kaisha Toshiba | Apparatus having graphic processor for high speed performance |
| JPH1040679A (ja) * | 1996-03-05 | 1998-02-13 | Cirrus Logic Inc | シングルチップフレームバッファ、単一のチップ上に製造されたフレームバッファ、ディスプレイサブシステムおよびフレームバッファ構成方法 |
| US5867180A (en) * | 1997-03-13 | 1999-02-02 | International Business Machines Corporation | Intelligent media memory statically mapped in unified memory architecture |
| JPH10302054A (ja) * | 1997-04-24 | 1998-11-13 | Mitsubishi Electric Corp | フレームバッファメモリ |
| US9098297B2 (en) * | 1997-05-08 | 2015-08-04 | Nvidia Corporation | Hardware accelerator for an object-oriented programming language |
| US5995121A (en) * | 1997-10-16 | 1999-11-30 | Hewlett-Packard Company | Multiple graphics pipeline integration with a windowing system through the use of a high speed interconnect to the frame buffer |
| US6789146B1 (en) * | 1998-02-12 | 2004-09-07 | Micron Technology, Inc. | Socket for receiving a single-chip video controller and circuit board containing the same |
| US6088800A (en) | 1998-02-27 | 2000-07-11 | Mosaid Technologies, Incorporated | Encryption processor with shared memory interconnect |
| US6590901B1 (en) * | 1998-04-01 | 2003-07-08 | Mosaid Technologies, Inc. | Method and apparatus for providing a packet buffer random access memory |
| US6559851B1 (en) * | 1998-05-21 | 2003-05-06 | Mitsubishi Electric & Electronics Usa, Inc. | Methods for semiconductor systems for graphics processing |
| US6504550B1 (en) * | 1998-05-21 | 2003-01-07 | Mitsubishi Electric & Electronics Usa, Inc. | System for graphics processing employing semiconductor device |
| US6535218B1 (en) * | 1998-05-21 | 2003-03-18 | Mitsubishi Electric & Electronics Usa, Inc. | Frame buffer memory for graphic processing |
| KR100464955B1 (ko) * | 1998-06-29 | 2005-04-06 | 매그나칩 반도체 유한회사 | 메모리소자와 함께 집적화된 씨모스 이미지센서 |
| JP2000030435A (ja) * | 1998-07-10 | 2000-01-28 | Nec Corp | 半導体集積回路 |
| US6480205B1 (en) | 1998-07-22 | 2002-11-12 | Nvidia Corporation | Method and apparatus for occlusion culling in graphics systems |
| US6646639B1 (en) | 1998-07-22 | 2003-11-11 | Nvidia Corporation | Modified method and apparatus for improved occlusion culling in graphics systems |
| US6798420B1 (en) | 1998-11-09 | 2004-09-28 | Broadcom Corporation | Video and graphics system with a single-port RAM |
| US7982740B2 (en) | 1998-11-09 | 2011-07-19 | Broadcom Corporation | Low resolution graphics mode support using window descriptors |
| US6636222B1 (en) | 1999-11-09 | 2003-10-21 | Broadcom Corporation | Video and graphics system with an MPEG video decoder for concurrent multi-row decoding |
| US6744472B1 (en) | 1998-11-09 | 2004-06-01 | Broadcom Corporation | Graphics display system with video synchronization feature |
| US6661422B1 (en) | 1998-11-09 | 2003-12-09 | Broadcom Corporation | Video and graphics system with MPEG specific data transfer commands |
| US6573905B1 (en) | 1999-11-09 | 2003-06-03 | Broadcom Corporation | Video and graphics system with parallel processing of graphics windows |
| US6853385B1 (en) | 1999-11-09 | 2005-02-08 | Broadcom Corporation | Video, audio and graphics decode, composite and display system |
| US6768774B1 (en) | 1998-11-09 | 2004-07-27 | Broadcom Corporation | Video and graphics system with video scaling |
| US7446774B1 (en) | 1998-11-09 | 2008-11-04 | Broadcom Corporation | Video and graphics system with an integrated system bridge controller |
| US6618048B1 (en) | 1999-10-28 | 2003-09-09 | Nintendo Co., Ltd. | 3D graphics rendering system for performing Z value clamping in near-Z range to maximize scene resolution of visually important Z components |
| US6717577B1 (en) | 1999-10-28 | 2004-04-06 | Nintendo Co., Ltd. | Vertex cache for 3D computer graphics |
| US6975324B1 (en) | 1999-11-09 | 2005-12-13 | Broadcom Corporation | Video and graphics system with a video transport processor |
| US8913667B2 (en) | 1999-11-09 | 2014-12-16 | Broadcom Corporation | Video decoding system having a programmable variable-length decoder |
| US9668011B2 (en) | 2001-02-05 | 2017-05-30 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Single chip set-top box system |
| US6538656B1 (en) | 1999-11-09 | 2003-03-25 | Broadcom Corporation | Video and graphics system with a data transport processor |
| US6353439B1 (en) * | 1999-12-06 | 2002-03-05 | Nvidia Corporation | System, method and computer program product for a blending operation in a transform module of a computer graphics pipeline |
| US6765575B1 (en) | 1999-12-06 | 2004-07-20 | Nvidia Corporation | Clip-less rasterization using line equation-based traversal |
| US6573900B1 (en) | 1999-12-06 | 2003-06-03 | Nvidia Corporation | Method, apparatus and article of manufacture for a sequencer in a transform/lighting module capable of processing multiple independent execution threads |
| US6417851B1 (en) | 1999-12-06 | 2002-07-09 | Nvidia Corporation | Method and apparatus for lighting module in a graphics processor |
| US6452595B1 (en) | 1999-12-06 | 2002-09-17 | Nvidia Corporation | Integrated graphics processing unit with antialiasing |
| US6844880B1 (en) | 1999-12-06 | 2005-01-18 | Nvidia Corporation | System, method and computer program product for an improved programmable vertex processing model with instruction set |
| US6198488B1 (en) * | 1999-12-06 | 2001-03-06 | Nvidia | Transform, lighting and rasterization system embodied on a single semiconductor platform |
| US6504542B1 (en) | 1999-12-06 | 2003-01-07 | Nvidia Corporation | Method, apparatus and article of manufacture for area rasterization using sense points |
| US6515671B1 (en) | 1999-12-06 | 2003-02-04 | Nvidia Corporation | Method, apparatus and article of manufacture for a vertex attribute buffer in a graphics processor |
| US6650325B1 (en) | 1999-12-06 | 2003-11-18 | Nvidia Corporation | Method, apparatus and article of manufacture for boustrophedonic rasterization |
| US7209140B1 (en) | 1999-12-06 | 2007-04-24 | Nvidia Corporation | System, method and article of manufacture for a programmable vertex processing model with instruction set |
| US6870540B1 (en) | 1999-12-06 | 2005-03-22 | Nvidia Corporation | System, method and computer program product for a programmable pixel processing model with instruction set |
| US6593923B1 (en) | 2000-05-31 | 2003-07-15 | Nvidia Corporation | System, method and article of manufacture for shadow mapping |
| US6806886B1 (en) | 2000-05-31 | 2004-10-19 | Nvidia Corporation | System, method and article of manufacture for converting color data into floating point numbers in a computer graphics pipeline |
| US7119813B1 (en) | 2000-06-02 | 2006-10-10 | Nintendo Co., Ltd. | Variable bit field encoding |
| US6825851B1 (en) | 2000-08-23 | 2004-11-30 | Nintendo Co., Ltd. | Method and apparatus for environment-mapped bump-mapping in a graphics system |
| US6811489B1 (en) | 2000-08-23 | 2004-11-02 | Nintendo Co., Ltd. | Controller interface for a graphics system |
| US6980218B1 (en) | 2000-08-23 | 2005-12-27 | Nintendo Co., Ltd. | Method and apparatus for efficient generation of texture coordinate displacements for implementing emboss-style bump mapping in a graphics rendering system |
| US6937245B1 (en) * | 2000-08-23 | 2005-08-30 | Nintendo Co., Ltd. | Graphics system with embedded frame buffer having reconfigurable pixel formats |
| US6636214B1 (en) | 2000-08-23 | 2003-10-21 | Nintendo Co., Ltd. | Method and apparatus for dynamically reconfiguring the order of hidden surface processing based on rendering mode |
| US7034828B1 (en) | 2000-08-23 | 2006-04-25 | Nintendo Co., Ltd. | Recirculating shade tree blender for a graphics system |
| US6867781B1 (en) | 2000-08-23 | 2005-03-15 | Nintendo Co., Ltd. | Graphics pipeline token synchronization |
| US7002591B1 (en) | 2000-08-23 | 2006-02-21 | Nintendo Co., Ltd. | Method and apparatus for interleaved processing of direct and indirect texture coordinates in a graphics system |
| US6700586B1 (en) | 2000-08-23 | 2004-03-02 | Nintendo Co., Ltd. | Low cost graphics with stitching processing hardware support for skeletal animation |
| US7061502B1 (en) | 2000-08-23 | 2006-06-13 | Nintendo Co., Ltd. | Method and apparatus for providing logical combination of N alpha operations within a graphics system |
| US7196710B1 (en) | 2000-08-23 | 2007-03-27 | Nintendo Co., Ltd. | Method and apparatus for buffering graphics data in a graphics system |
| US6707458B1 (en) | 2000-08-23 | 2004-03-16 | Nintendo Co., Ltd. | Method and apparatus for texture tiling in a graphics system |
| JP4683760B2 (ja) * | 2000-08-23 | 2011-05-18 | 任天堂株式会社 | 再構成可能なピクセルフォーマットを有する組み込みフレームバッファを有するグラフィックスシステム |
| US7576748B2 (en) | 2000-11-28 | 2009-08-18 | Nintendo Co. Ltd. | Graphics system with embedded frame butter having reconfigurable pixel formats |
| US7184059B1 (en) | 2000-08-23 | 2007-02-27 | Nintendo Co., Ltd. | Graphics system with copy out conversions between embedded frame buffer and main memory |
| US7538772B1 (en) | 2000-08-23 | 2009-05-26 | Nintendo Co., Ltd. | Graphics processing system with enhanced memory controller |
| US6597356B1 (en) | 2000-08-31 | 2003-07-22 | Nvidia Corporation | Integrated tessellator in a graphics processing unit |
| US6828980B1 (en) * | 2000-10-02 | 2004-12-07 | Nvidia Corporation | System, method and computer program product for z-texture mapping |
| US6501698B1 (en) * | 2000-11-01 | 2002-12-31 | Enhanced Memory Systems, Inc. | Structure and method for hiding DRAM cycle time behind a burst access |
| US20020105522A1 (en) * | 2000-12-12 | 2002-08-08 | Kolluru Mahadev S. | Embedded memory architecture for video applications |
| US7456838B1 (en) | 2001-06-08 | 2008-11-25 | Nvidia Corporation | System and method for converting a vertex program to a binary format capable of being executed by a hardware graphics pipeline |
| US7162716B2 (en) | 2001-06-08 | 2007-01-09 | Nvidia Corporation | Software emulator for optimizing application-programmable vertex processing |
| US6697064B1 (en) | 2001-06-08 | 2004-02-24 | Nvidia Corporation | System, method and computer program product for matrix tracking during vertex processing in a graphics pipeline |
| US7006101B1 (en) | 2001-06-08 | 2006-02-28 | Nvidia Corporation | Graphics API with branching capabilities |
| WO2002101497A2 (en) * | 2001-06-08 | 2002-12-19 | Nvidia Corporation | System, method and computer program product for programmable fragment processing in a graphics pipeline |
| US6882218B2 (en) * | 2002-08-26 | 2005-04-19 | Broadcom Corporation | Transimpedance amplifier and offset correction mechanism and method for lowering noise |
| JP4099578B2 (ja) * | 2002-12-09 | 2008-06-11 | ソニー株式会社 | 半導体装置及び画像データ処理装置 |
| US7598948B1 (en) * | 2003-02-06 | 2009-10-06 | Nvidia Corporation | System and method of detecting rotated displays |
| US7667710B2 (en) * | 2003-04-25 | 2010-02-23 | Broadcom Corporation | Graphics display system with line buffer control scheme |
| US8732644B1 (en) | 2003-09-15 | 2014-05-20 | Nvidia Corporation | Micro electro mechanical switch system and method for testing and configuring semiconductor functional circuits |
| US8788996B2 (en) * | 2003-09-15 | 2014-07-22 | Nvidia Corporation | System and method for configuring semiconductor functional circuits |
| US8775997B2 (en) | 2003-09-15 | 2014-07-08 | Nvidia Corporation | System and method for testing and configuring semiconductor functional circuits |
| US8063916B2 (en) | 2003-10-22 | 2011-11-22 | Broadcom Corporation | Graphics layer reduction for video composition |
| US8711161B1 (en) | 2003-12-18 | 2014-04-29 | Nvidia Corporation | Functional component compensation reconfiguration system and method |
| US7450120B1 (en) * | 2003-12-19 | 2008-11-11 | Nvidia Corporation | Apparatus, system, and method for Z-culling |
| US8269769B1 (en) * | 2003-12-22 | 2012-09-18 | Nvidia Corporation | Occlusion prediction compression system and method |
| US8854364B1 (en) | 2003-12-22 | 2014-10-07 | Nvidia Corporation | Tight depth range occlusion prediction system and method |
| US7995056B1 (en) | 2003-12-22 | 2011-08-09 | Nvidia Corporation | Culling data selection system and method |
| US8390619B1 (en) | 2003-12-22 | 2013-03-05 | Nvidia Corporation | Occlusion prediction graphics processing system and method |
| US7868890B2 (en) | 2004-02-24 | 2011-01-11 | Qualcomm Incorporated | Display processor for a wireless device |
| JP2006127460A (ja) * | 2004-06-09 | 2006-05-18 | Renesas Technology Corp | 半導体装置、半導体信号処理装置、およびクロスバースイッチ |
| US8723231B1 (en) | 2004-09-15 | 2014-05-13 | Nvidia Corporation | Semiconductor die micro electro-mechanical switch management system and method |
| JP2006099232A (ja) * | 2004-09-28 | 2006-04-13 | Renesas Technology Corp | 半導体信号処理装置 |
| US8711156B1 (en) | 2004-09-30 | 2014-04-29 | Nvidia Corporation | Method and system for remapping processing elements in a pipeline of a graphics processing unit |
| EP1860630B1 (en) * | 2005-03-16 | 2018-12-26 | Mitsubishi Electric Corporation | Data converting apparatus and data converting method |
| JP4207912B2 (ja) * | 2005-03-24 | 2009-01-14 | セイコーエプソン株式会社 | データ転送制御装置及び電子機器 |
| US8021193B1 (en) | 2005-04-25 | 2011-09-20 | Nvidia Corporation | Controlled impedance display adapter |
| US7793029B1 (en) | 2005-05-17 | 2010-09-07 | Nvidia Corporation | Translation device apparatus for configuring printed circuit board connectors |
| JP4327175B2 (ja) * | 2005-07-12 | 2009-09-09 | 株式会社ソニー・コンピュータエンタテインメント | マルチグラフィックプロセッサシステム、グラフィックプロセッサおよび描画処理方法 |
| US8412872B1 (en) | 2005-12-12 | 2013-04-02 | Nvidia Corporation | Configurable GPU and method for graphics processing using a configurable GPU |
| US8417838B2 (en) * | 2005-12-12 | 2013-04-09 | Nvidia Corporation | System and method for configurable digital communication |
| US8766995B2 (en) | 2006-04-26 | 2014-07-01 | Qualcomm Incorporated | Graphics system with configurable caches |
| US8884972B2 (en) | 2006-05-25 | 2014-11-11 | Qualcomm Incorporated | Graphics processor with arithmetic and elementary function units |
| US8869147B2 (en) | 2006-05-31 | 2014-10-21 | Qualcomm Incorporated | Multi-threaded processor with deferred thread output control |
| US8644643B2 (en) | 2006-06-14 | 2014-02-04 | Qualcomm Incorporated | Convolution filtering in a graphics processor |
| US8766996B2 (en) * | 2006-06-21 | 2014-07-01 | Qualcomm Incorporated | Unified virtual addressed register file |
| US8724483B2 (en) * | 2007-10-22 | 2014-05-13 | Nvidia Corporation | Loopback configuration for bi-directional interfaces |
| US8390636B1 (en) | 2007-11-12 | 2013-03-05 | Google Inc. | Graphics display coordination |
| US8878849B2 (en) * | 2007-12-14 | 2014-11-04 | Nvidia Corporation | Horizon split ambient occlusion |
| US9336752B1 (en) | 2007-12-21 | 2016-05-10 | Oracle America, Inc. | Microprocessor including a display interface in the microprocessor |
| US8890876B1 (en) | 2007-12-21 | 2014-11-18 | Oracle America, Inc. | Microprocessor including a display interface in the microprocessor |
| US20100117931A1 (en) * | 2008-11-10 | 2010-05-13 | Microsoft Corporation | Functional image representation |
| US8687639B2 (en) * | 2009-06-04 | 2014-04-01 | Nvidia Corporation | Method and system for ordering posted packets and non-posted packets transfer |
| US9176909B2 (en) | 2009-12-11 | 2015-11-03 | Nvidia Corporation | Aggregating unoccupied PCI-e links to provide greater bandwidth |
| US9331869B2 (en) * | 2010-03-04 | 2016-05-03 | Nvidia Corporation | Input/output request packet handling techniques by a device specific kernel mode driver |
| JP2011192305A (ja) * | 2011-06-01 | 2011-09-29 | Renesas Electronics Corp | 半導体信号処理装置 |
| US9330031B2 (en) | 2011-12-09 | 2016-05-03 | Nvidia Corporation | System and method for calibration of serial links using a serial-to-parallel loopback |
| US10008029B2 (en) | 2013-05-31 | 2018-06-26 | Nvidia Corporation | Updating depth related graphics data |
| US9418400B2 (en) | 2013-06-18 | 2016-08-16 | Nvidia Corporation | Method and system for rendering simulated depth-of-field visual effect |
| US9513927B1 (en) * | 2013-10-08 | 2016-12-06 | American Megatrends, Inc. | Method and implementation for playing media content while booting the software of an soc or computer system |
| US9778937B1 (en) * | 2013-10-16 | 2017-10-03 | American Megatrends, Inc. | Method and implementation for starting and stopping the playing of media content during booting process |
| US9787481B2 (en) | 2014-08-28 | 2017-10-10 | The Regents Of The University Of Michigan | Physical unclonable function using augmented memory for challenge-response hashing |
| WO2018147329A1 (ja) * | 2017-02-10 | 2018-08-16 | パナソニック インテレクチュアル プロパティ コーポレーション オブ アメリカ | 自由視点映像生成方法及び自由視点映像生成システム |
| US11403067B2 (en) | 2019-03-20 | 2022-08-02 | Micron Technology, Inc. | Memory array data structure for posit operations |
Family Cites Families (71)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58114391A (ja) * | 1981-12-25 | 1983-07-07 | Nec Corp | センスアンプ回路 |
| JPS5910988A (ja) * | 1982-07-12 | 1984-01-20 | ホシデン株式会社 | カラ−液晶表示器 |
| US4691295A (en) * | 1983-02-28 | 1987-09-01 | Data General Corporation | System for storing and retreiving display information in a plurality of memory planes |
| JPS60252394A (ja) * | 1984-05-22 | 1985-12-13 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | カラ−画像表示装置 |
| US4646151A (en) * | 1985-02-01 | 1987-02-24 | General Electric Company | Television frame synchronizer with independently controllable input/output rates |
| US4700328A (en) * | 1985-07-11 | 1987-10-13 | Intel Corporation | High speed and high efficiency layout for dram circuits |
| JPH0762794B2 (ja) * | 1985-09-13 | 1995-07-05 | 株式会社日立製作所 | グラフイツク表示装置 |
| JPS62252596A (ja) * | 1986-04-24 | 1987-11-04 | Sony Corp | センスアンプ回路 |
| US4716320A (en) * | 1986-06-20 | 1987-12-29 | Texas Instruments Incorporated | CMOS sense amplifier with isolated sensing nodes |
| DE3628286A1 (de) * | 1986-08-20 | 1988-02-25 | Staerk Juergen Dipl Ing Dipl I | Prozessor mit integriertem speicher |
| US4754433A (en) * | 1986-09-16 | 1988-06-28 | Ibm Corporation | Dynamic ram having multiplexed twin I/O line pairs |
| JPS63189893A (ja) * | 1987-01-31 | 1988-08-05 | ソニー株式会社 | グラフイツク処理装置 |
| US4918526A (en) * | 1987-03-20 | 1990-04-17 | Digital Equipment Corporation | Apparatus and method for video signal image processing under control of a data processing system |
| JP2558701B2 (ja) | 1987-06-04 | 1996-11-27 | 松下電器産業株式会社 | デ−タ転送装置 |
| GB8718057D0 (en) * | 1987-07-30 | 1987-09-03 | Int Computers Ltd | Digital display system |
| JPH01143095A (ja) | 1987-11-28 | 1989-06-05 | Nippon Telegr & Teleph Corp <Ntt> | デユアルポートメモリ |
| US5047760A (en) * | 1988-03-23 | 1991-09-10 | Dupont Pixel Systems Limited | Crossbar converter |
| GB8807849D0 (en) * | 1988-04-05 | 1988-05-05 | Int Computers Ltd | Data processing apparatus with page mode memory |
| JPH01285088A (ja) | 1988-05-10 | 1989-11-16 | Nec Corp | 半導体記憶装置 |
| JP2661150B2 (ja) | 1988-06-23 | 1997-10-08 | 松下電器産業株式会社 | データ転送装置 |
| US4958146A (en) * | 1988-10-14 | 1990-09-18 | Sun Microsystems, Inc. | Multiplexor implementation for raster operations including foreground and background colors |
| JPH02201797A (ja) * | 1989-01-31 | 1990-08-09 | Toshiba Corp | 半導体メモリ装置 |
| JP3060458B2 (ja) * | 1989-03-17 | 2000-07-10 | 富士通株式会社 | 半導体記憶装置 |
| JPH02254573A (ja) * | 1989-03-29 | 1990-10-15 | Pfu Ltd | ラスタ演算装置 |
| US4972102A (en) * | 1989-05-08 | 1990-11-20 | Motorola, Inc. | Single-ended sense amplifier with dual feedback and a latching disable mode that saves power |
| JPH0325792A (ja) | 1989-06-22 | 1991-02-04 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP2865712B2 (ja) | 1989-07-12 | 1999-03-08 | 株式会社日立製作所 | 半導体記憶装置 |
| JP2706535B2 (ja) | 1989-10-03 | 1998-01-28 | 松下精工株式会社 | 内転型電動機固定子の製造方法 |
| US5170466A (en) * | 1989-10-10 | 1992-12-08 | Unisys Corporation | Storage/retrieval system for document |
| JP2575899B2 (ja) * | 1989-10-26 | 1997-01-29 | 株式会社東芝 | プリチャージ式論理回路 |
| JP3025792B2 (ja) | 1989-11-20 | 2000-03-27 | 日揮ユニバーサル株式会社 | 吸着処理剤を用いる脱臭処理方法 |
| US5027212A (en) * | 1989-12-06 | 1991-06-25 | Videologic Limited | Computer based video/graphics display system |
| US5305283A (en) * | 1990-04-06 | 1994-04-19 | Mosaid, Inc. | Dram column address latching technique |
| US5267201A (en) * | 1990-04-06 | 1993-11-30 | Mosaid, Inc. | High voltage boosted word line supply charge pump regulator for DRAM |
| GB9007786D0 (en) * | 1990-04-06 | 1990-06-06 | Gillingham Peter B | Transition detection circuit |
| GB9007789D0 (en) * | 1990-04-06 | 1990-06-06 | Foss Richard C | Method for dram sensing current control |
| US5170154A (en) * | 1990-06-29 | 1992-12-08 | Radius Inc. | Bus structure and method for compiling pixel data with priorities |
| JPH0467259A (ja) * | 1990-07-09 | 1992-03-03 | Hitachi Ltd | 情報処理装置 |
| JPH06102842A (ja) * | 1990-08-06 | 1994-04-15 | Texas Instr Inc <Ti> | 分割シリアルレジスタ及び動作カウンタの付いたビデオランダムアクセスメモリを含むグラフィックディスプレイシステム |
| JPH0696582A (ja) * | 1990-09-17 | 1994-04-08 | Texas Instr Inc <Ti> | メモリアレイアーキテクチャ |
| US5157634A (en) * | 1990-10-23 | 1992-10-20 | International Business Machines Corporation | Dram having extended refresh time |
| JPH06103599B2 (ja) | 1990-11-16 | 1994-12-14 | 三菱電機株式会社 | 半導体集積回路装置 |
| GB9027678D0 (en) * | 1990-12-20 | 1991-02-13 | Ncr Co | Videographics display system |
| US5144223A (en) * | 1991-03-12 | 1992-09-01 | Mosaid, Inc. | Bandgap voltage generator |
| JP3086273B2 (ja) | 1991-04-12 | 2000-09-11 | 株式会社日立製作所 | 半導体記憶装置 |
| JP2951786B2 (ja) | 1992-02-03 | 1999-09-20 | 三菱電機株式会社 | 半導体記憶装置 |
| JPH0581852A (ja) | 1991-09-24 | 1993-04-02 | Mitsubishi Denki Eng Kk | 半導体記憶装置 |
| JPH04368692A (ja) | 1991-06-17 | 1992-12-21 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US5392391A (en) * | 1991-10-18 | 1995-02-21 | Lsi Logic Corporation | High performance graphics applications controller |
| JP3182813B2 (ja) * | 1991-10-31 | 2001-07-03 | 株式会社日立製作所 | 情報処理装置 |
| EP0547892B1 (en) * | 1991-12-17 | 1998-10-28 | STMicroelectronics, Inc. | An integrated circuit with self-biased differential data lines |
| JPH05198167A (ja) | 1992-01-20 | 1993-08-06 | Sharp Corp | 半導体記憶装置 |
| JPH0636555A (ja) | 1992-05-20 | 1994-02-10 | Nec Corp | ダイナミック型半導体記憶装置および画像データ生成装置 |
| JPH05341753A (ja) | 1992-06-09 | 1993-12-24 | Toshiba Corp | ビデオメモリ |
| US5469401A (en) * | 1992-07-14 | 1995-11-21 | Mosaid Technologies Incorporated | Column redundancy scheme for DRAM using normal and redundant column decoders programmed with defective array address and defective column address |
| JP2795074B2 (ja) | 1992-07-16 | 1998-09-10 | 日本電気株式会社 | ダイナミックram |
| US5283761A (en) * | 1992-07-22 | 1994-02-01 | Mosaid Technologies Incorporated | Method of multi-level storage in DRAM |
| JPH0695962A (ja) * | 1992-09-09 | 1994-04-08 | Hitachi Ltd | 並列アクセスバスをもつプロセッサ |
| US5388206A (en) * | 1992-11-13 | 1995-02-07 | The University Of North Carolina | Architecture and apparatus for image generation |
| US5572655A (en) * | 1993-01-12 | 1996-11-05 | Lsi Logic Corporation | High-performance integrated bit-mapped graphics controller |
| JPH06214194A (ja) | 1993-01-20 | 1994-08-05 | Nec Corp | 光アイソレータ |
| JPH07114577A (ja) * | 1993-07-16 | 1995-05-02 | Internatl Business Mach Corp <Ibm> | データ検索装置、データ圧縮装置及び方法 |
| US5712664A (en) * | 1993-10-14 | 1998-01-27 | Alliance Semiconductor Corporation | Shared memory graphics accelerator system |
| US5442748A (en) * | 1993-10-29 | 1995-08-15 | Sun Microsystems, Inc. | Architecture of output switching circuitry for frame buffer |
| US5544306A (en) * | 1994-05-03 | 1996-08-06 | Sun Microsystems, Inc. | Flexible dram access in a frame buffer memory and system |
| JP3124245B2 (ja) | 1997-02-28 | 2001-01-15 | 株式会社東海ヒット | 顕微鏡観察用加温装置 |
| JP4368692B2 (ja) | 2004-01-21 | 2009-11-18 | 伊藤機工株式会社 | ショットピーニング機 |
| JP4182984B2 (ja) | 2006-01-27 | 2008-11-19 | トヨタ自動車株式会社 | シート |
| JP5217374B2 (ja) | 2007-11-13 | 2013-06-19 | 富士電機株式会社 | 自動販売機 |
| JP5198167B2 (ja) | 2008-06-30 | 2013-05-15 | パナソニック株式会社 | 真空断熱箱体 |
| JP5081852B2 (ja) | 2009-02-27 | 2012-11-28 | 日立オートモティブシステムズ株式会社 | 容量式センサおよび角速度センサ |
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1994
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1995
- 1995-05-20 EP EP95107711A patent/EP0690430A3/en not_active Withdrawn
- 1995-06-01 JP JP13529795A patent/JP3547101B2/ja not_active Expired - Fee Related
- 1995-06-02 KR KR1019950014566A patent/KR960001972A/ko not_active Ceased
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| USRE44589E1 (en) | 2013-11-12 |
| USRE40326E1 (en) | 2008-05-20 |
| JP2003241957A (ja) | 2003-08-29 |
| JP2010266871A (ja) | 2010-11-25 |
| US5694143A (en) | 1997-12-02 |
| KR960001972A (ko) | 1996-01-26 |
| JP5299745B2 (ja) | 2013-09-25 |
| USRE41565E1 (en) | 2010-08-24 |
| JP2008181136A (ja) | 2008-08-07 |
| EP0690430A2 (en) | 1996-01-03 |
| USRE37944E1 (en) | 2002-12-31 |
| JPH1026966A (ja) | 1998-01-27 |
| EP0690430A3 (en) | 1996-07-03 |
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