JP2011066109A5 - - Google Patents

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Publication number
JP2011066109A5
JP2011066109A5 JP2009214094A JP2009214094A JP2011066109A5 JP 2011066109 A5 JP2011066109 A5 JP 2011066109A5 JP 2009214094 A JP2009214094 A JP 2009214094A JP 2009214094 A JP2009214094 A JP 2009214094A JP 2011066109 A5 JP2011066109 A5 JP 2011066109A5
Authority
JP
Japan
Prior art keywords
diffusion layer
nmos
memory device
storage node
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009214094A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011066109A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2009214094A priority Critical patent/JP2011066109A/ja
Priority claimed from JP2009214094A external-priority patent/JP2011066109A/ja
Priority to EP10009571A priority patent/EP2299485A1/en
Priority to TW099131002A priority patent/TWI412123B/zh
Priority to KR1020100089927A priority patent/KR20110030354A/ko
Priority to US12/882,847 priority patent/US8507995B2/en
Priority to CN201010285007.4A priority patent/CN102024818A/zh
Publication of JP2011066109A publication Critical patent/JP2011066109A/ja
Publication of JP2011066109A5 publication Critical patent/JP2011066109A5/ja
Pending legal-status Critical Current

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JP2009214094A 2009-09-16 2009-09-16 半導体記憶装置 Pending JP2011066109A (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2009214094A JP2011066109A (ja) 2009-09-16 2009-09-16 半導体記憶装置
EP10009571A EP2299485A1 (en) 2009-09-16 2010-09-14 SRAM cell comprising four NMOS SGTs and two load resistors
TW099131002A TWI412123B (zh) 2009-09-16 2010-09-14 半導體記憶裝置
KR1020100089927A KR20110030354A (ko) 2009-09-16 2010-09-14 반도체 기억 장치
US12/882,847 US8507995B2 (en) 2009-09-16 2010-09-15 Semiconductor memory device
CN201010285007.4A CN102024818A (zh) 2009-09-16 2010-09-16 半导体存储器件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009214094A JP2011066109A (ja) 2009-09-16 2009-09-16 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2011066109A JP2011066109A (ja) 2011-03-31
JP2011066109A5 true JP2011066109A5 (enExample) 2011-07-21

Family

ID=43033127

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009214094A Pending JP2011066109A (ja) 2009-09-16 2009-09-16 半導体記憶装置

Country Status (6)

Country Link
US (1) US8507995B2 (enExample)
EP (1) EP2299485A1 (enExample)
JP (1) JP2011066109A (enExample)
KR (1) KR20110030354A (enExample)
CN (1) CN102024818A (enExample)
TW (1) TWI412123B (enExample)

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JP5990401B2 (ja) * 2012-05-29 2016-09-14 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
KR102191215B1 (ko) 2013-12-20 2020-12-16 삼성전자주식회사 에스램 셀 및 그 제조 방법
JP2015141726A (ja) 2014-01-28 2015-08-03 株式会社東芝 半導体記憶装置
US9653563B2 (en) * 2014-04-18 2017-05-16 Taiwan Semiconductor Manufacturing Company Limited Connection structure for vertical gate all around (VGAA) devices on semiconductor on insulator (SOI) substrate
JP5986618B2 (ja) * 2014-12-04 2016-09-06 ユニサンティス エレクトロニクス シンガポール プライベート リミテッドUnisantis Electronics Singapore Pte Ltd. 半導体装置
JP6375316B2 (ja) * 2016-01-06 2018-08-15 ユニサンティス エレクトロニクス シンガポール プライベート リミテッドUnisantis Electronics Singapore Pte Ltd. 半導体装置の製造方法、及び、半導体装置
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JP7185149B2 (ja) * 2018-08-31 2022-12-07 株式会社ソシオネクスト 半導体装置
US10818324B2 (en) 2018-12-18 2020-10-27 Micron Technology, Inc. Memory array decoding and interconnects
KR102796871B1 (ko) * 2020-07-20 2025-04-17 삼성전자주식회사 메모리 셀 스트링을 포함하는 수직형 비휘발성 메모리 장치

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