JP2009533546A - 選択的堆積 - Google Patents
選択的堆積 Download PDFInfo
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- JP2009533546A JP2009533546A JP2009500603A JP2009500603A JP2009533546A JP 2009533546 A JP2009533546 A JP 2009533546A JP 2009500603 A JP2009500603 A JP 2009500603A JP 2009500603 A JP2009500603 A JP 2009500603A JP 2009533546 A JP2009533546 A JP 2009533546A
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- gas
- silicon
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- deposition
- etching
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7834—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a non-planar structure, e.g. the gate or the source or the drain being non-planar
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02529—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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Abstract
【選択図】 図1
Description
[0001]本発明の実施形態は、電子製造プロセス及びデバイスの分野に係り、より詳細には、電子デバイスを形成する間にシリコン含有膜を堆積する方法に係る。
[0002]より小型のトランジスタが製造されるにつれて、極浅のソース/ドレイン接合を形成することが益々難題になりつつある。100nm以下のCMOS(相補的金属酸化物半導体)デバイスは、接合深さが30nm未満であることを要求する。シリコン含有材料(例えば、Si、SiGe及びSiC)のエピ層(epilayers)を接合内に形成するために選択的エピタキシャル堆積がしばしば利用されている。選択的エピタキシャル堆積は、シリコン堀にエピ層の成長を許容し、誘電体エリアには成長させない。選択的エピタキシーは、バイポーラデバイスのエレベートソース/ドレイン、ソース/ドレイン延長部、コンタクトプラグ又はベース層堆積部のような半導体デバイス内で使用することができる。
Claims (36)
- 基板表面上にシリコン含有材料をエピタキシャル形成する方法において、
単結晶表面と、アモルファス表面、多結晶表面及びその組合せより成るグループから選択された第2の表面とを含む基板をプロセスチャンバー内に位置させるステップと、
シリコンソースと、ハロゲン含有化合物を含む担体ガスとで構成された堆積ガスに上記基板を露出して、上記単結晶表面にはエピタキシャル層を、上記第2の表面には多結晶層を堆積するステップと、
エッチングガスに上記基板を露出して、上記多結晶層及びエピタキシャル層をエッチングするステップと、
を備えた方法。 - 前記ハロゲン含有化合物は、HCl、HBr又はその組合せを含む、請求項1に記載の方法。
- 前記ハロゲン含有化合物は、HClを含む、請求項2に記載の方法。
- 上記堆積ガスは、更に、Cl2、H2、N2、不活性ガス、又はその組合せを含む、請求項1に記載の方法。
- 前記ハロゲン含有化合物は、前記基板を前記堆積ガスに露出する間に、約60sccmから約600sccmの割合で前記チャンバーへ流れ込む、請求項1に記載の方法。
- 前記エッチングガスは、前記ハロゲン含有化合物を含む、請求項1に記載の方法。
- 前記ハロゲン含有化合物は、前記基板を前記堆積ガスに前記露出する間には約60sccmから約600sccmの割合で前記チャンバーへ流れ込むのと、前記基板を前記エッチングガスに前記露出する間には約2000sccmから約20000sccmの割合で流れ込むのとを交互に行う、請求項6に記載の方法。
- 前記基板をエッチングガスに前記露出する間のチャンバー圧力は、約30トールから約100トールである、請求項1に記載の方法。
- 堆積サイクルは、上記基板を上記堆積ガス及びエッチングガスに露出して、所定厚みのシリコン含有材料を形成するのを繰り返すことを含む、請求項1に記載の方法。
- 上記堆積サイクルは、少なくとも2回繰り返される、請求項1に記載の方法。
- 上記エピタキシャル層は、シリコンゲルマニウム、シリコン炭素、シリコンゲルマニウム炭素、及びその組合せより成るグループから選択された材料を含む、請求項1に記載の方法。
- 上記プロセスチャンバーの温度は、基板を堆積ガスに露出する間及び基板をエッチングガスに露出する間に約500℃から約650℃である、請求項1に記載の方法。
- 基板表面上にシリコン含有材料をエピタキシャル形成する方法において、
単結晶表面と、アモルファス表面、多結晶表面及びその組合せより成るグループから選択された第2の表面とを含む基板をプロセスチャンバー内に位置させるステップと、
シリコンソース及び担体ガスで構成された堆積ガスに上記基板を露出して、上記単結晶表面にはエピタキシャル層を、上記第2の表面には多結晶層を堆積するステップと、
約650℃より低いプロセスチャンバー温度における塩素化炭化水素エッチングガスに上記基板を露出して、上記多結晶層及びエピタキシャル層をエッチングするステップと、
を備えた方法。 - 前記担体ガスは、ハロゲン含有化合物を含む、請求項13に記載の方法。
- 前記ハロゲン含有化合物は、HCl、HBr、Hl又はその組合せを含む、請求項14に記載の方法。
- 前記ハロゲン含有ガスは、HClを含む、請求項15に記載の方法。
- 前記塩素化炭化水素は、塩化メチル、ジクロロメタン、クロロホルム、四塩化炭素、塩化エチル、クロロアルケン、又はその組合せを含む、請求項13に記載の方法。
- 前記塩素化炭化水素は、前記堆積ガスと同時に前記チャンバーへ流れ込む、請求項13に記載の方法。
- 前記塩素化炭化水素は、前記堆積ガスと交互に前記チャンバーへ流れ込む、請求項13に記載の方法。
- 前記基板を前記エッチングガスに露出する前記ステップは、約50トール以下のプロセスチャンバー圧力で行われる、請求項13に記載の方法。
- 堆積サイクルは、上記基板を上記堆積ガス及びエッチングガスに露出して、所定厚みのシリコン含有材料を形成するのを繰り返すことを含む、請求項13に記載の方法。
- 上記堆積サイクルは、少なくとも2回繰り返される、請求項21に記載の方法。
- 上記エピタキシャル層は、シリコンゲルマニウム、シリコン炭素、シリコンゲルマニウム炭素、及びその組合せより成るグループから選択された材料を含む、請求項13に記載の方法。
- 基板表面上にシリコン含有材料をエピタキシャル形成する方法において、
シリコンソース及びHClを担体ガスとして含む堆積ガスに上記基板を露出するステップと、
HClをエッチングガスとして使用してエッチングを行うステップと、
を備えた方法。 - 上記堆積ガスは、更に、Cl2、H2、N2、不活性ガス、又はその組合せを含む、請求項24に記載の方法。
- 前記HClは、前記基板を前記堆積ガスに前記露出する間に約60sccmから約600sccmの割合で前記チャンバーに流れ込む、請求項24に記載の方法。
- 前記HClは、前記エッチング中に約2000sccmから約20000sccmの割合で前記チャンバーに流れ込む、請求項24に記載の方法。
- 前記HClは、前記基板を前記堆積ガスに前記露出する間には約60sccmから約600sccmの割合で前記チャンバーへ流れ込むのと、前記エッチング中には約2000sccmから約20000sccmの割合で流れ込むのとを交互に行う、請求項24に記載の方法。
- 上記プロセスチャンバー温度は、上記基板を堆積ガスに露出する間及び上記エッチング中に約500℃から約650℃である、請求項24に記載の方法。
- プロセスチャンバーに位置された基板上にシリコン含有材料をエピタキシャル形成する方法であって、上記基板は、単結晶表面と、アモルファス表面、多結晶表面及びその組合せより成るグループから選択された第2の表面とを含むものである方法において、
上記プロセスチャンバーへのハロゲン含有ガスの流れを、上記単結晶表面にはエピタキシャル層を、上記第2の表面には多結晶層を堆積するための第1の流量に制御するステップと、
上記プロセスチャンバーへのハロゲン含有ガスの流量を、上記多結晶層及びエピタキシャル層をエッチングするための第2の流量に制御するステップと、
を備えた方法。 - 上記第1の流量におけるハロゲン含有ガスと、上記第2の流量におけるハロゲン含有ガスは、同じものである、請求項30に記載の方法。
- 前記ハロゲン含有ガスは、HClを含む、請求項31に記載の方法。
- 前記ハロゲン含有ガスは、前記第1の流量に対して約60sccmから約600sccmの割合で前記チャンバーへと流れ込む、請求項32に記載の方法。
- 前記ハロゲン含有化合物は、前記第2の流量に対して約2000sccmから約20000sccmの割合で前記チャンバーへと流れ込む、請求項32に記載の方法。
- 上記プロセスチャンバーの温度は、前記方法の間に約500℃から約650℃である、請求項30に記載の方法。
- 請求項30に記載の方法を実行するためのプログラムインストラクションが記憶されたコンピュータ読み取り可能な媒体。
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US11/378,101 US7560352B2 (en) | 2004-12-01 | 2006-03-17 | Selective deposition |
PCT/US2007/064038 WO2007109491A2 (en) | 2006-03-17 | 2007-03-15 | Selective deposition |
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WO2007109491A3 (en) | 2007-12-13 |
CN101401202A (zh) | 2009-04-01 |
WO2007109491A2 (en) | 2007-09-27 |
TWI419204B (zh) | 2013-12-11 |
US20060166414A1 (en) | 2006-07-27 |
CN101401202B (zh) | 2011-09-28 |
US7560352B2 (en) | 2009-07-14 |
TW200802547A (en) | 2008-01-01 |
KR101037524B1 (ko) | 2011-05-26 |
KR20080112298A (ko) | 2008-12-24 |
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