JP2008513985A5 - - Google Patents

Download PDF

Info

Publication number
JP2008513985A5
JP2008513985A5 JP2007531632A JP2007531632A JP2008513985A5 JP 2008513985 A5 JP2008513985 A5 JP 2008513985A5 JP 2007531632 A JP2007531632 A JP 2007531632A JP 2007531632 A JP2007531632 A JP 2007531632A JP 2008513985 A5 JP2008513985 A5 JP 2008513985A5
Authority
JP
Japan
Prior art keywords
workpiece
current
pulse
current pulse
process according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007531632A
Other languages
English (en)
Japanese (ja)
Other versions
JP5078142B2 (ja
JP2008513985A (ja
Filing date
Publication date
Priority claimed from DE102004045451A external-priority patent/DE102004045451B4/de
Application filed filed Critical
Publication of JP2008513985A publication Critical patent/JP2008513985A/ja
Publication of JP2008513985A5 publication Critical patent/JP2008513985A5/ja
Application granted granted Critical
Publication of JP5078142B2 publication Critical patent/JP5078142B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

JP2007531632A 2004-09-20 2005-08-30 スルーホールに金属を充填するための電気処理、とりわけプリント基板のスルーホールに銅を充填するための電気処理 Expired - Lifetime JP5078142B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102004045451A DE102004045451B4 (de) 2004-09-20 2004-09-20 Galvanisches Verfahren zum Füllen von Durchgangslöchern mit Metallen, insbesondere von Leiterplatten mit Kupfer
DE102004045451.5 2004-09-20
PCT/EP2005/009332 WO2006032346A1 (en) 2004-09-20 2005-08-30 Galvanic process for filling through-holes with metals, in particular of printed circuit boards with copper

Publications (3)

Publication Number Publication Date
JP2008513985A JP2008513985A (ja) 2008-05-01
JP2008513985A5 true JP2008513985A5 (enExample) 2008-08-28
JP5078142B2 JP5078142B2 (ja) 2012-11-21

Family

ID=35447785

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007531632A Expired - Lifetime JP5078142B2 (ja) 2004-09-20 2005-08-30 スルーホールに金属を充填するための電気処理、とりわけプリント基板のスルーホールに銅を充填するための電気処理

Country Status (10)

Country Link
US (2) US9445510B2 (enExample)
EP (1) EP1810554B1 (enExample)
JP (1) JP5078142B2 (enExample)
KR (1) KR101222627B1 (enExample)
CN (1) CN101053286B (enExample)
AT (1) ATE417492T1 (enExample)
DE (2) DE102004045451B4 (enExample)
MY (1) MY145344A (enExample)
TW (1) TWI370715B (enExample)
WO (1) WO2006032346A1 (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100632552B1 (ko) * 2004-12-30 2006-10-11 삼성전기주식회사 내부 비아홀의 필 도금 구조 및 그 제조 방법
KR100783467B1 (ko) * 2006-02-24 2007-12-07 삼성전기주식회사 내부 관통홀을 가지는 인쇄회로기판 및 그 제조 방법
KR101335480B1 (ko) * 2006-03-30 2013-12-02 아토테크 도이칠란드 게엠베하 홀 및 캐비티를 금속으로 충전하기 위한 전기분해 방법
KR100803004B1 (ko) * 2006-09-01 2008-02-14 삼성전기주식회사 관통홀 충진방법
JP6161863B2 (ja) * 2010-12-28 2017-07-12 株式会社荏原製作所 電気めっき方法
EP2518187A1 (en) 2011-04-26 2012-10-31 Atotech Deutschland GmbH Aqueous acidic bath for electrolytic deposition of copper
JP5980735B2 (ja) 2012-08-07 2016-08-31 株式会社荏原製作所 スルーホールの電気めっき方法及び電気めっき装置
KR20140034529A (ko) 2012-09-12 2014-03-20 삼성전기주식회사 전기 동도금 장치
JP6114527B2 (ja) * 2012-10-05 2017-04-12 新光電気工業株式会社 配線基板及びその製造方法
CN102877098B (zh) * 2012-10-29 2015-06-17 东莞市若美电子科技有限公司 一种多波段输出的脉冲电镀方法
CN104053311A (zh) * 2013-03-13 2014-09-17 欣兴电子股份有限公司 导通孔的制作方法
JP2015106653A (ja) 2013-11-29 2015-06-08 イビデン株式会社 プリント配線板の製造方法
CN104159420A (zh) * 2014-09-04 2014-11-19 深圳恒宝士线路板有限公司 带盲孔且具有四层线路的电路板制造方法
EP3029178A1 (en) * 2014-12-05 2016-06-08 ATOTECH Deutschland GmbH Method and apparatus for electroplating a metal onto a substrate
EP3570645B1 (en) * 2018-05-17 2023-01-25 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with only partially filled thermal through-hole
US11716819B2 (en) * 2018-06-21 2023-08-01 Averatek Corporation Asymmetrical electrolytic plating for a conductive pattern
KR102662860B1 (ko) * 2019-05-29 2024-05-03 삼성전기주식회사 인쇄회로기판
KR102748951B1 (ko) * 2019-06-25 2025-01-02 삼성전기주식회사 인쇄회로기판 도금 방법 및 인쇄회로기판
CN110306214A (zh) * 2019-07-05 2019-10-08 东莞市斯坦得电子材料有限公司 一种用于高纵横比孔径印制线路板通孔电镀的反向脉冲镀铜工艺
WO2021032775A1 (en) 2019-08-19 2021-02-25 Atotech Deutschland Gmbh Manufacturing sequences for high density interconnect printed circuit boards and a high density interconnect printed circuit board
US11746433B2 (en) * 2019-11-05 2023-09-05 Macdermid Enthone Inc. Single step electrolytic method of filling through holes in printed circuit boards and other substrates
KR102215846B1 (ko) * 2019-11-27 2021-02-16 와이엠티 주식회사 회로기판의 관통홀 충진 방법 및 이를 이용하여 제조된 회로기판
KR102776287B1 (ko) 2020-01-06 2025-03-07 삼성전기주식회사 인쇄회로기판
EP4359588A4 (en) * 2021-06-25 2024-12-18 MacDermid Enthone Inc. COMPLEX WAVEFORM FOR ELECTROLYTIC PLATING
US20230279577A1 (en) * 2022-03-04 2023-09-07 Rohm And Haas Electronic Materials Llc Method of filling through-holes to reduce voids

Family Cites Families (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH629542A5 (de) * 1976-09-01 1982-04-30 Inoue Japax Res Verfahren und vorrichtung zur galvanischen materialablagerung.
US4683036A (en) * 1983-06-10 1987-07-28 Kollmorgen Technologies Corporation Method for electroplating non-metallic surfaces
DE3836521C2 (de) 1988-10-24 1995-04-13 Atotech Deutschland Gmbh Wäßriges saures Bad zur galvanischen Abscheidung von glänzenden und rißfreien Kupferüberzügen und Verwendung des Bades
DE4126502C1 (enExample) * 1991-08-07 1993-02-11 Schering Ag Berlin Und Bergkamen, 1000 Berlin, De
DE4225961C5 (de) * 1992-08-06 2011-01-27 Atotech Deutschland Gmbh Vorrichtung zur Galvanisierung, insbesondere Verkupferung, flacher platten- oder bogenförmiger Gegenstände
DE4229403C2 (de) * 1992-09-03 1995-04-13 Hoellmueller Maschbau H Vorrichtung zum Galvanisieren dünner, ein- oder beidseits mit einer leitfähigen Beschichtung versehener Kunststoffolien
DE69412952T2 (de) * 1993-09-21 1999-05-12 Matsushita Electric Industrial Co., Ltd., Kadoma, Osaka Verbindungsteil eines Schaltungssubstrats und Verfahren zur Herstellung mehrschichtiger Schaltungssubstrate unter Verwendung dieses Teils
DE19545231A1 (de) * 1995-11-21 1997-05-22 Atotech Deutschland Gmbh Verfahren zur elektrolytischen Abscheidung von Metallschichten
DE19547948C1 (de) * 1995-12-21 1996-11-21 Atotech Deutschland Gmbh Verfahren und Schaltungsanordnung zur Erzeugung von Strompulsen zur elektrolytischen Metallabscheidung
DE19717512C3 (de) * 1997-04-25 2003-06-18 Atotech Deutschland Gmbh Vorrichtung zum Galvanisieren von Leiterplatten unter konstanten Bedingungen in Durchlaufanlagen
US5972192A (en) * 1997-07-23 1999-10-26 Advanced Micro Devices, Inc. Pulse electroplating copper or copper alloys
US6071398A (en) * 1997-10-06 2000-06-06 Learonal, Inc. Programmed pulse electroplating process
JP2000173949A (ja) * 1998-12-09 2000-06-23 Fujitsu Ltd 半導体装置及びその製造方法並びにめっき方法及び装置
ATE282248T1 (de) * 1999-01-21 2004-11-15 Atotech Deutschland Gmbh Verfahren zum galvanischen bilden von leiterstrukturen aus hochreinem kupfer bei der herstellung von integrierten schaltungen
DE19915146C1 (de) * 1999-01-21 2000-07-06 Atotech Deutschland Gmbh Verfahren zum galvanischen Bilden von Leiterstrukturen aus hochreinem Kupfer bei der Herstellung von integrierten Schaltungen
US6652727B2 (en) * 1999-10-15 2003-11-25 Faraday Technology Marketing Group, Llc Sequential electrodeposition of metals using modulated electric fields for manufacture of circuit boards having features of different sizes
WO2001045478A1 (en) * 1999-12-14 2001-06-21 Matsushita Electric Industrial Co. Ltd. Multilayered printed wiring board and production method therefor
EP1132500A3 (en) 2000-03-08 2002-01-23 Applied Materials, Inc. Method for electrochemical deposition of metal using modulated waveforms
JP2001267726A (ja) * 2000-03-22 2001-09-28 Toyota Autom Loom Works Ltd 配線基板の電解メッキ方法及び配線基板の電解メッキ装置
JP2002004083A (ja) * 2000-04-18 2002-01-09 Shinko Electric Ind Co Ltd ヴィアフィリング方法
JP2002016332A (ja) * 2000-06-28 2002-01-18 Ibiden Co Ltd スルーホールを有する積層板およびその製造方法
JP2002053993A (ja) 2000-08-04 2002-02-19 Mitsui Mining & Smelting Co Ltd 電解銅箔およびその製造方法
US20020015833A1 (en) * 2000-06-29 2002-02-07 Naotomi Takahashi Manufacturing method of electrodeposited copper foil and electrodeposited copper foil
JP2002141440A (ja) 2000-11-01 2002-05-17 Mitsui High Tec Inc 基板の製造方法
TWI255871B (en) * 2000-12-20 2006-06-01 Learonal Japan Inc Electrolytic copper plating solution and process for electrolytic plating using the same
US6458696B1 (en) * 2001-04-11 2002-10-01 Agere Systems Guardian Corp Plated through hole interconnections
WO2002086196A1 (en) 2001-04-19 2002-10-31 Rd Chemical Company Copper acid baths, system and method for electroplating high aspect ratio substrates
TWI268966B (en) * 2001-06-07 2006-12-21 Shipley Co Llc Electrolytic copper plating method
JP3941433B2 (ja) 2001-08-08 2007-07-04 株式会社豊田自動織機 ビアホールのスミア除去方法
JP4000796B2 (ja) * 2001-08-08 2007-10-31 株式会社豊田自動織機 ビアホールの銅メッキ方法
CN1283848C (zh) * 2001-10-16 2006-11-08 新光电气工业株式会社 小直径孔镀铜的方法
JP2003168860A (ja) * 2001-11-30 2003-06-13 Cmk Corp プリント配線板及びその製造方法
JP3964263B2 (ja) * 2002-05-17 2007-08-22 株式会社デンソー ブラインドビアホール充填方法及び貫通電極形成方法
DE10223957B4 (de) * 2002-05-31 2006-12-21 Advanced Micro Devices, Inc., Sunnyvale Ein verbessertes Verfahren zum Elektroplattieren von Kupfer auf einer strukturierten dielektrischen Schicht
EP1475463B2 (en) * 2002-12-20 2017-03-01 Shipley Company, L.L.C. Reverse pulse plating method
US20040154926A1 (en) * 2002-12-24 2004-08-12 Zhi-Wen Sun Multiple chemistry electrochemical plating method
JP2004311919A (ja) 2003-02-21 2004-11-04 Shinko Electric Ind Co Ltd スルーホールフィル方法
DE10311575B4 (de) * 2003-03-10 2007-03-22 Atotech Deutschland Gmbh Verfahren zum elektrolytischen Metallisieren von Werkstücken mit Bohrungen mit einem hohen Aspektverhältnis
DE10325101A1 (de) * 2003-06-03 2004-12-30 Atotech Deutschland Gmbh Verfahren zum Auffüllen von µ-Blind-Vias (µ-BVs)
JP4248353B2 (ja) * 2003-09-19 2009-04-02 新光電気工業株式会社 スルーホールの充填方法
US20050121214A1 (en) * 2003-12-04 2005-06-09 Gould Len C. Active electrical transmission system
JP4973829B2 (ja) * 2004-07-23 2012-07-11 上村工業株式会社 電気銅めっき浴及び電気銅めっき方法

Similar Documents

Publication Publication Date Title
JP2008513985A5 (enExample)
CN101416569B (zh) 用金属填充孔和凹处的电解方法
KR100572433B1 (ko) 프로그램된 펄스 전기도금방법
JP5078142B2 (ja) スルーホールに金属を充填するための電気処理、とりわけプリント基板のスルーホールに銅を充填するための電気処理
TWI583279B (zh) 組合的通孔鍍覆和孔填充的方法
JP2001519480A5 (enExample)
TWI266383B (en) Copper electrodeposition in microelectronics
US6783654B2 (en) Electrolytic plating method and device for a wiring board
JP2012518084A5 (enExample)
JP2006519931A5 (enExample)
JP6472445B2 (ja) 電気銅めっき方法
JP2009532586A (ja) 電解銅めっき方法
WO2005040459B1 (en) Electroplating compositions and methods for electroplating
TW200516176A (en) Electroplating compositions and methods for electroplating
CN104131319B (zh) 用于板型件表面填孔的电镀液及其电镀方法
IL194505A0 (en) Electroplating device and method
JP4857317B2 (ja) スルーホールの充填方法
TWI883333B (zh) 在電子基板上電鍍金屬的方法、用於在電子基板上電鍍金屬的設備、電子基板及印刷電路板
CN115835530A (zh) 一种电路板的加工方法及电路板
JP2004176171A (ja) 非シアン電解金めっき液
JP4148895B2 (ja) ホールの銅めっき方法
WO2017204246A1 (ja) 溶解性銅陽極、電解銅めっき装置、電解銅めっき方法、及び酸性電解銅めっき液の保存方法
US20240224432A1 (en) Single Step Electrolytic Method of Filling Through-Holes in Printed Circuit Boards and Other Substrates
TW200609389A (en) A swing electric plating apparatus and a method for electric plating articles
JP2014221946A (ja) Prパルス電解銅めっき用添加剤及びprパルス電解めっき用銅めっき液