JP2006519931A5 - - Google Patents

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Publication number
JP2006519931A5
JP2006519931A5 JP2006504539A JP2006504539A JP2006519931A5 JP 2006519931 A5 JP2006519931 A5 JP 2006519931A5 JP 2006504539 A JP2006504539 A JP 2006504539A JP 2006504539 A JP2006504539 A JP 2006504539A JP 2006519931 A5 JP2006519931 A5 JP 2006519931A5
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JP
Japan
Prior art keywords
circuit board
printed circuit
current pulse
pulse
reverse current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2006504539A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006519931A (ja
Filing date
Publication date
Priority claimed from DE10311575A external-priority patent/DE10311575B4/de
Application filed filed Critical
Publication of JP2006519931A publication Critical patent/JP2006519931A/ja
Publication of JP2006519931A5 publication Critical patent/JP2006519931A5/ja
Ceased legal-status Critical Current

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JP2006504539A 2003-03-10 2004-03-04 高アスペクト比のホールを有する加工品の電気めっき方法 Ceased JP2006519931A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10311575A DE10311575B4 (de) 2003-03-10 2003-03-10 Verfahren zum elektrolytischen Metallisieren von Werkstücken mit Bohrungen mit einem hohen Aspektverhältnis
PCT/EP2004/002208 WO2004081262A1 (en) 2003-03-10 2004-02-04 Method of electroplating a workpiece having high-aspect ratio holes

Publications (2)

Publication Number Publication Date
JP2006519931A JP2006519931A (ja) 2006-08-31
JP2006519931A5 true JP2006519931A5 (enExample) 2007-05-24

Family

ID=32892263

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006504539A Ceased JP2006519931A (ja) 2003-03-10 2004-03-04 高アスペクト比のホールを有する加工品の電気めっき方法

Country Status (7)

Country Link
US (1) US20060151328A1 (enExample)
EP (1) EP1601822A1 (enExample)
JP (1) JP2006519931A (enExample)
KR (1) KR20050105280A (enExample)
DE (1) DE10311575B4 (enExample)
TW (1) TW200502443A (enExample)
WO (1) WO2004081262A1 (enExample)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7947161B2 (en) * 2004-03-19 2011-05-24 Faraday Technology, Inc. Method of operating an electroplating cell with hydrodynamics facilitating more uniform deposition on a workpiece with through holes
US7553401B2 (en) * 2004-03-19 2009-06-30 Faraday Technology, Inc. Electroplating cell with hydrodynamics facilitating more uniform deposition across a workpiece during plating
DE102004045451B4 (de) * 2004-09-20 2007-05-03 Atotech Deutschland Gmbh Galvanisches Verfahren zum Füllen von Durchgangslöchern mit Metallen, insbesondere von Leiterplatten mit Kupfer
US20070063521A1 (en) * 2004-12-03 2007-03-22 Lancashire Christopher L Method and apparatus for plating automotive bumpers
ATE484943T1 (de) 2006-03-30 2010-10-15 Atotech Deutschland Gmbh Elektrolytisches verfahren zum füllen von löchern und vertiefungen mit metallen
US8062496B2 (en) * 2008-04-18 2011-11-22 Integran Technologies Inc. Electroplating method and apparatus
JP5425440B2 (ja) * 2008-10-20 2014-02-26 株式会社Ｊｃｕ 銅めっきにおけるウィスカーの抑制方法
US20100206737A1 (en) * 2009-02-17 2010-08-19 Preisser Robert F Process for electrodeposition of copper chip to chip, chip to wafer and wafer to wafer interconnects in through-silicon vias (tsv)
JP5504147B2 (ja) 2010-12-21 2014-05-28 株式会社荏原製作所 電気めっき方法
US9816193B2 (en) * 2011-01-07 2017-11-14 Novellus Systems, Inc. Configuration and method of operation of an electrodeposition system for improved process stability and performance
JP5981455B2 (ja) 2011-01-26 2016-08-31 エンソン インコーポレイテッド マイクロ電子工業におけるビアホール充填方法
CN103179806B (zh) * 2011-12-21 2019-05-28 奥特斯有限公司 组合的通孔镀覆和孔填充的方法
US9816196B2 (en) 2012-04-27 2017-11-14 Novellus Systems, Inc. Method and apparatus for electroplating semiconductor wafer when controlling cations in electrolyte
US9435048B2 (en) * 2013-02-27 2016-09-06 Taiwan Semiconductor Manufacturing Co., Ltd. Layer by layer electro chemical plating (ECP) process
DE102013021586A1 (de) * 2013-12-19 2015-06-25 Ludy Galvanosysteme Gmbh Verfahren und Vorrichtung zum elektrochemischen Behandeln von flachem Behandlungsgut
US10154598B2 (en) 2014-10-13 2018-12-11 Rohm And Haas Electronic Materials Llc Filling through-holes
EP3029178A1 (en) 2014-12-05 2016-06-08 ATOTECH Deutschland GmbH Method and apparatus for electroplating a metal onto a substrate
JP6906237B2 (ja) * 2018-12-12 2021-07-21 奥野製薬工業株式会社 断続的電気めっき方法
JP7478741B2 (ja) * 2018-12-28 2024-05-07 エーシーエム リサーチ （シャンハイ） インコーポレーテッド めっき装置及びめっき方法
CN110699725A (zh) * 2019-11-21 2020-01-17 上海江南轧辊有限公司 一种液中放电沉积系统及其使用方法
WO2021245766A1 (ja) * 2020-06-02 2021-12-09 奥野製薬工業株式会社 断続的電気めっき方法
NL2030054B1 (nl) * 2021-12-07 2023-06-22 Meco Equipment Eng B V Inrichting en werkwijze voor het elektrolytisch behandelen van substraten.
CN114554727B (zh) * 2022-03-31 2024-12-06 生益电子股份有限公司 一种实现高纵横比通盲孔的电镀方法及pcb
CN120425431B (zh) * 2025-07-09 2025-11-07 阜阳师范大学 一种微孔电镀方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH629542A5 (de) * 1976-09-01 1982-04-30 Inoue Japax Res Verfahren und vorrichtung zur galvanischen materialablagerung.
DE4134632C1 (enExample) * 1991-10-19 1993-04-01 Schering Ag Berlin Und Bergkamen, 1000 Berlin, De
DE4225961C5 (de) * 1992-08-06 2011-01-27 Atotech Deutschland Gmbh Vorrichtung zur Galvanisierung, insbesondere Verkupferung, flacher platten- oder bogenförmiger Gegenstände
DE4344387C2 (de) * 1993-12-24 1996-09-05 Atotech Deutschland Gmbh Verfahren zur elektrolytischen Abscheidung von Kupfer und Anordnung zur Durchführung des Verfahrens
DE19547948C1 (de) * 1995-12-21 1996-11-21 Atotech Deutschland Gmbh Verfahren und Schaltungsanordnung zur Erzeugung von Strompulsen zur elektrolytischen Metallabscheidung
DE19717512C3 (de) * 1997-04-25 2003-06-18 Atotech Deutschland Gmbh Vorrichtung zum Galvanisieren von Leiterplatten unter konstanten Bedingungen in Durchlaufanlagen
US6071398A (en) * 1997-10-06 2000-06-06 Learonal, Inc. Programmed pulse electroplating process
US6210555B1 (en) * 1999-01-29 2001-04-03 Faraday Technology Marketing Group, Llc Electrodeposition of metals in small recesses for manufacture of high density interconnects using reverse pulse plating
DE19915146C1 (de) * 1999-01-21 2000-07-06 Atotech Deutschland Gmbh Verfahren zum galvanischen Bilden von Leiterstrukturen aus hochreinem Kupfer bei der Herstellung von integrierten Schaltungen
US6444110B2 (en) * 1999-05-17 2002-09-03 Shipley Company, L.L.C. Electrolytic copper plating method
EP1069212A1 (en) * 1999-07-12 2001-01-17 Applied Materials, Inc. Electrochemical deposition for high aspect ratio structures using electrical pulse modulation
US20040045832A1 (en) * 1999-10-14 2004-03-11 Nicholas Martyak Electrolytic copper plating solutions
US6652727B2 (en) * 1999-10-15 2003-11-25 Faraday Technology Marketing Group, Llc Sequential electrodeposition of metals using modulated electric fields for manufacture of circuit boards having features of different sizes
US6881318B2 (en) * 2001-07-26 2005-04-19 Applied Materials, Inc. Dynamic pulse plating for high aspect ratio features

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