ATE417492T1 - Galvanischer prozess zur füllung von durchgangslöchern mit metallen, insbesondere von leiterplatten mit kupfer - Google Patents

Galvanischer prozess zur füllung von durchgangslöchern mit metallen, insbesondere von leiterplatten mit kupfer

Info

Publication number
ATE417492T1
ATE417492T1 AT05775130T AT05775130T ATE417492T1 AT E417492 T1 ATE417492 T1 AT E417492T1 AT 05775130 T AT05775130 T AT 05775130T AT 05775130 T AT05775130 T AT 05775130T AT E417492 T1 ATE417492 T1 AT E417492T1
Authority
AT
Austria
Prior art keywords
filling
holes
metals
copper
circuit boards
Prior art date
Application number
AT05775130T
Other languages
English (en)
Inventor
Bert Reents
Thomas Pliet
Bernd Roelfs
Toshiya Fujiwara
Rene Wenzel
Markus Youkhanis
Soungsoo Kim
Original Assignee
Atotech Deutschland Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atotech Deutschland Gmbh filed Critical Atotech Deutschland Gmbh
Application granted granted Critical
Publication of ATE417492T1 publication Critical patent/ATE417492T1/de

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/18Electroplating using modulated, pulsed or reversing current
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D21/00Processes for servicing or operating cells for electrolytic coating
    • C25D21/12Process control or regulation
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/38Electroplating: Baths therefor from solutions of copper
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1476Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps
    • H05K2203/1492Periodical treatments, e.g. pulse plating of through-holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Automation & Control Theory (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
AT05775130T 2004-09-20 2005-08-30 Galvanischer prozess zur füllung von durchgangslöchern mit metallen, insbesondere von leiterplatten mit kupfer ATE417492T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102004045451A DE102004045451B4 (de) 2004-09-20 2004-09-20 Galvanisches Verfahren zum Füllen von Durchgangslöchern mit Metallen, insbesondere von Leiterplatten mit Kupfer

Publications (1)

Publication Number Publication Date
ATE417492T1 true ATE417492T1 (de) 2008-12-15

Family

ID=35447785

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05775130T ATE417492T1 (de) 2004-09-20 2005-08-30 Galvanischer prozess zur füllung von durchgangslöchern mit metallen, insbesondere von leiterplatten mit kupfer

Country Status (10)

Country Link
US (2) US9445510B2 (de)
EP (1) EP1810554B1 (de)
JP (1) JP5078142B2 (de)
KR (1) KR101222627B1 (de)
CN (1) CN101053286B (de)
AT (1) ATE417492T1 (de)
DE (2) DE102004045451B4 (de)
MY (1) MY145344A (de)
TW (1) TWI370715B (de)
WO (1) WO2006032346A1 (de)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100632552B1 (ko) * 2004-12-30 2006-10-11 삼성전기주식회사 내부 비아홀의 필 도금 구조 및 그 제조 방법
KR100783467B1 (ko) * 2006-02-24 2007-12-07 삼성전기주식회사 내부 관통홀을 가지는 인쇄회로기판 및 그 제조 방법
EP2000013B1 (de) 2006-03-30 2010-10-13 ATOTECH Deutschland GmbH Elektrolytisches verfahren zum füllen von löchern und vertiefungen mit metallen
KR100803004B1 (ko) * 2006-09-01 2008-02-14 삼성전기주식회사 관통홀 충진방법
JP6161863B2 (ja) * 2010-12-28 2017-07-12 株式会社荏原製作所 電気めっき方法
EP2518187A1 (de) 2011-04-26 2012-10-31 Atotech Deutschland GmbH Wässriges Säurebad zur elektrolytischen Ablagerung von Kupfer
JP5980735B2 (ja) 2012-08-07 2016-08-31 株式会社荏原製作所 スルーホールの電気めっき方法及び電気めっき装置
KR20140034529A (ko) 2012-09-12 2014-03-20 삼성전기주식회사 전기 동도금 장치
JP6114527B2 (ja) * 2012-10-05 2017-04-12 新光電気工業株式会社 配線基板及びその製造方法
CN102877098B (zh) * 2012-10-29 2015-06-17 东莞市若美电子科技有限公司 一种多波段输出的脉冲电镀方法
CN104053311A (zh) * 2013-03-13 2014-09-17 欣兴电子股份有限公司 导通孔的制作方法
JP2015106653A (ja) * 2013-11-29 2015-06-08 イビデン株式会社 プリント配線板の製造方法
CN104159420A (zh) * 2014-09-04 2014-11-19 深圳恒宝士线路板有限公司 带盲孔且具有四层线路的电路板制造方法
EP3029178A1 (de) * 2014-12-05 2016-06-08 ATOTECH Deutschland GmbH Verfahren und Vorrichtung zum elektrolytischen Abscheiden eines Metalls auf einem Substrat
EP3570645B1 (de) * 2018-05-17 2023-01-25 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Komponententräger mit nur teilweise gefülltem thermischem durchgangsloch
US11716819B2 (en) * 2018-06-21 2023-08-01 Averatek Corporation Asymmetrical electrolytic plating for a conductive pattern
KR102662860B1 (ko) 2019-05-29 2024-05-03 삼성전기주식회사 인쇄회로기판
KR20210000514A (ko) 2019-06-25 2021-01-05 삼성전기주식회사 인쇄회로기판 도금 방법 및 인쇄회로기판
CN110306214A (zh) * 2019-07-05 2019-10-08 东莞市斯坦得电子材料有限公司 一种用于高纵横比孔径印制线路板通孔电镀的反向脉冲镀铜工艺
EP4018790A1 (de) 2019-08-19 2022-06-29 Atotech Deutschland GmbH & Co. KG Fertigungssequenzen für hochdichte verbindungsleiterplatten und hochdichte verbindungsleiterplatte
US11746433B2 (en) 2019-11-05 2023-09-05 Macdermid Enthone Inc. Single step electrolytic method of filling through holes in printed circuit boards and other substrates
KR102215846B1 (ko) * 2019-11-27 2021-02-16 와이엠티 주식회사 회로기판의 관통홀 충진 방법 및 이를 이용하여 제조된 회로기판
KR20210088227A (ko) 2020-01-06 2021-07-14 삼성전기주식회사 인쇄회로기판
US20230279577A1 (en) * 2022-03-04 2023-09-07 Rohm And Haas Electronic Materials Llc Method of filling through-holes to reduce voids

Family Cites Families (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH629542A5 (de) * 1976-09-01 1982-04-30 Inoue Japax Res Verfahren und vorrichtung zur galvanischen materialablagerung.
US4683036A (en) * 1983-06-10 1987-07-28 Kollmorgen Technologies Corporation Method for electroplating non-metallic surfaces
DE3836521C2 (de) 1988-10-24 1995-04-13 Atotech Deutschland Gmbh Wäßriges saures Bad zur galvanischen Abscheidung von glänzenden und rißfreien Kupferüberzügen und Verwendung des Bades
DE4126502C1 (de) * 1991-08-07 1993-02-11 Schering Ag Berlin Und Bergkamen, 1000 Berlin, De
DE4225961C5 (de) * 1992-08-06 2011-01-27 Atotech Deutschland Gmbh Vorrichtung zur Galvanisierung, insbesondere Verkupferung, flacher platten- oder bogenförmiger Gegenstände
DE4229403C2 (de) * 1992-09-03 1995-04-13 Hoellmueller Maschbau H Vorrichtung zum Galvanisieren dünner, ein- oder beidseits mit einer leitfähigen Beschichtung versehener Kunststoffolien
CN1075338C (zh) * 1993-09-21 2001-11-21 松下电器产业株式会社 电路基板连接件及用其制造多层电路基板的方法
DE19545231A1 (de) * 1995-11-21 1997-05-22 Atotech Deutschland Gmbh Verfahren zur elektrolytischen Abscheidung von Metallschichten
DE19547948C1 (de) * 1995-12-21 1996-11-21 Atotech Deutschland Gmbh Verfahren und Schaltungsanordnung zur Erzeugung von Strompulsen zur elektrolytischen Metallabscheidung
DE19717512C3 (de) * 1997-04-25 2003-06-18 Atotech Deutschland Gmbh Vorrichtung zum Galvanisieren von Leiterplatten unter konstanten Bedingungen in Durchlaufanlagen
US5972192A (en) * 1997-07-23 1999-10-26 Advanced Micro Devices, Inc. Pulse electroplating copper or copper alloys
US6071398A (en) * 1997-10-06 2000-06-06 Learonal, Inc. Programmed pulse electroplating process
JP2000173949A (ja) * 1998-12-09 2000-06-23 Fujitsu Ltd 半導体装置及びその製造方法並びにめっき方法及び装置
CA2359473A1 (en) * 1999-01-21 2000-07-27 Atotech Deutschland Gmbh Method for electrolytically forming conductor structures from highly pure copper when producing integrated circuits
DE19915146C1 (de) * 1999-01-21 2000-07-06 Atotech Deutschland Gmbh Verfahren zum galvanischen Bilden von Leiterstrukturen aus hochreinem Kupfer bei der Herstellung von integrierten Schaltungen
US6652727B2 (en) * 1999-10-15 2003-11-25 Faraday Technology Marketing Group, Llc Sequential electrodeposition of metals using modulated electric fields for manufacture of circuit boards having features of different sizes
EP1194023A4 (de) * 1999-12-14 2005-11-09 Matsushita Electric Ind Co Ltd Mehrschichtige leiterplatte und ihre herstellungsmethode
EP1132500A3 (de) 2000-03-08 2002-01-23 Applied Materials, Inc. Verfahrem zum elektrochemischen Absetzen von Metall unter Verwendung von modulierten Wellenformen
JP2001267726A (ja) * 2000-03-22 2001-09-28 Toyota Autom Loom Works Ltd 配線基板の電解メッキ方法及び配線基板の電解メッキ装置
JP2002004083A (ja) * 2000-04-18 2002-01-09 Shinko Electric Ind Co Ltd ヴィアフィリング方法
JP2002016332A (ja) * 2000-06-28 2002-01-18 Ibiden Co Ltd スルーホールを有する積層板およびその製造方法
US20020015833A1 (en) * 2000-06-29 2002-02-07 Naotomi Takahashi Manufacturing method of electrodeposited copper foil and electrodeposited copper foil
JP2002053993A (ja) 2000-08-04 2002-02-19 Mitsui Mining & Smelting Co Ltd 電解銅箔およびその製造方法
JP2002141440A (ja) 2000-11-01 2002-05-17 Mitsui High Tec Inc 基板の製造方法
KR100845189B1 (ko) * 2000-12-20 2008-07-10 롬 앤드 하스 일렉트로닉 머트어리얼즈, 엘.엘.씨 전해적 구리 도금액 및 이의 제어법
US6458696B1 (en) * 2001-04-11 2002-10-01 Agere Systems Guardian Corp Plated through hole interconnections
WO2002086196A1 (en) 2001-04-19 2002-10-31 Rd Chemical Company Copper acid baths, system and method for electroplating high aspect ratio substrates
KR100877923B1 (ko) * 2001-06-07 2009-01-12 롬 앤드 하스 일렉트로닉 머트어리얼즈, 엘.엘.씨 전해 구리 도금법
JP3941433B2 (ja) * 2001-08-08 2007-07-04 株式会社豊田自動織機 ビアホールのスミア除去方法
JP4000796B2 (ja) * 2001-08-08 2007-10-31 株式会社豊田自動織機 ビアホールの銅メッキ方法
WO2003033775A1 (fr) * 2001-10-16 2003-04-24 Shinko Electric Industries Co., Ltd. Procede de cuivrage de trous a petit diametre
JP2003168860A (ja) * 2001-11-30 2003-06-13 Cmk Corp プリント配線板及びその製造方法
JP3964263B2 (ja) * 2002-05-17 2007-08-22 株式会社デンソー ブラインドビアホール充填方法及び貫通電極形成方法
DE10223957B4 (de) * 2002-05-31 2006-12-21 Advanced Micro Devices, Inc., Sunnyvale Ein verbessertes Verfahren zum Elektroplattieren von Kupfer auf einer strukturierten dielektrischen Schicht
EP1475463B2 (de) * 2002-12-20 2017-03-01 Shipley Company, L.L.C. Methode zum Elektroplattieren mit Umkehrpulsstrom
US20040154926A1 (en) * 2002-12-24 2004-08-12 Zhi-Wen Sun Multiple chemistry electrochemical plating method
JP2004311919A (ja) 2003-02-21 2004-11-04 Shinko Electric Ind Co Ltd スルーホールフィル方法
DE10311575B4 (de) * 2003-03-10 2007-03-22 Atotech Deutschland Gmbh Verfahren zum elektrolytischen Metallisieren von Werkstücken mit Bohrungen mit einem hohen Aspektverhältnis
DE10325101A1 (de) * 2003-06-03 2004-12-30 Atotech Deutschland Gmbh Verfahren zum Auffüllen von µ-Blind-Vias (µ-BVs)
JP4248353B2 (ja) * 2003-09-19 2009-04-02 新光電気工業株式会社 スルーホールの充填方法
US20050121214A1 (en) * 2003-12-04 2005-06-09 Gould Len C. Active electrical transmission system
JP4973829B2 (ja) * 2004-07-23 2012-07-11 上村工業株式会社 電気銅めっき浴及び電気銅めっき方法

Also Published As

Publication number Publication date
DE602005011662D1 (de) 2009-01-22
EP1810554A1 (de) 2007-07-25
US9445510B2 (en) 2016-09-13
US20090236230A1 (en) 2009-09-24
DE102004045451B4 (de) 2007-05-03
MY145344A (en) 2012-01-31
US9526183B2 (en) 2016-12-20
WO2006032346A1 (en) 2006-03-30
TWI370715B (en) 2012-08-11
KR101222627B1 (ko) 2013-01-16
JP5078142B2 (ja) 2012-11-21
KR20070053304A (ko) 2007-05-23
TW200623995A (en) 2006-07-01
DE102004045451A1 (de) 2006-03-30
CN101053286A (zh) 2007-10-10
US20160270241A1 (en) 2016-09-15
CN101053286B (zh) 2012-01-18
EP1810554B1 (de) 2008-12-10
JP2008513985A (ja) 2008-05-01

Similar Documents

Publication Publication Date Title
ATE417492T1 (de) Galvanischer prozess zur füllung von durchgangslöchern mit metallen, insbesondere von leiterplatten mit kupfer
ATE557576T1 (de) Leiterplatine mit elektronischem bauelement
EP1876266A4 (de) Elektrolytkupferfolie und verfahren zur herstellung von elektrolytkupferfolie, oberflächenbehandelte elektrolytkupferfolie unter verwendung der elektrolytkupferfolie und kupferummantelte laminatplatte und leiterplatte unter verwendung der oberflächenbehandelten elektrolytkupferfolie
EP1643817A4 (de) Ätzlösung, ätzverfahren und leiterplatte
DE602004012910D1 (de) Kupferfolie für gedruckte Leiterplatten mit feinen Strukturen und Herstellungsverfahren
WO2008153185A1 (ja) プリント配線板製造用の埋設銅めっき方法及びその埋設銅めっき方法を用いて得られるプリント配線板
EP2071907A4 (de) Flex-rigid-leiterplatte und verfahren zur herstellung der flex-rigid-leiterplatte
EP1698218A4 (de) Metallstruktur-erzeugungsverfahren, dadurch erhaltene metallstruktur, leiterplatte, verfahren zur erzeugung eines leitfähigen films und dadurch erhaltener leitfähiger film
TW200720483A (en) Method for improved adhesion of polymeric materials to copper or copper alloy surfaces
GB2422491B (en) Printed Circuit Board
EP1835792A4 (de) Verfahren zur herstellung einer leiterplatte
TW200735730A (en) Resin composite copper foil, printed wiring board, and production process thereof
TW200608465A (en) Advanced oriented assist features for integrated circuit hole patterns
TW200731885A (en) Rigid-flexible printed circuit board and method of manufacturing the same
SG108908A1 (en) Production method of printed circuit board
TW200520662A (en) Multi-layer printed circuit board and fabricating method thereof
ATE388614T1 (de) Verfahren zur herstellung einer doppelseitigen leiterplatte
DE60039407D1 (de) Verfahren zur Herstellung chrombeschichteten Kupfers für Leiterplatten
ATA7262003A (de) Verfahren zur beschichtung von rohlingen zur herstellung von gedruckten leiterplatten (pcb)
AU2003265371A8 (en) Method for the manufacture of printed circuit boards with integral plated resistors
ATE488122T1 (de) Verfahren zur herstellung einer leiterplatte mit einer kavität für die integration von bauteilen
ATE450633T1 (de) Elektrolytisch regenerierbare ätzlösung
TW200711543A (en) Reinforcing film for flexible printed circuit board
DE102006036888A1 (de) Regenerierbare Ätzlösung
HK1052254A1 (en) Manufacture of printed circuit board with test points.

Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification

Ref document number: 1810554

Country of ref document: EP