JP2008287873A5 - - Google Patents

Download PDF

Info

Publication number
JP2008287873A5
JP2008287873A5 JP2008185427A JP2008185427A JP2008287873A5 JP 2008287873 A5 JP2008287873 A5 JP 2008287873A5 JP 2008185427 A JP2008185427 A JP 2008185427A JP 2008185427 A JP2008185427 A JP 2008185427A JP 2008287873 A5 JP2008287873 A5 JP 2008287873A5
Authority
JP
Japan
Prior art keywords
signal
refresh
auto
state
command
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008185427A
Other languages
English (en)
Japanese (ja)
Other versions
JP4923193B2 (ja
JP2008287873A (ja
Filing date
Publication date
Priority claimed from US10/056,935 external-priority patent/US6771553B2/en
Application filed filed Critical
Publication of JP2008287873A publication Critical patent/JP2008287873A/ja
Publication of JP2008287873A5 publication Critical patent/JP2008287873A5/ja
Application granted granted Critical
Publication of JP4923193B2 publication Critical patent/JP4923193B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2008185427A 2001-10-18 2008-07-16 ダイナミックランダムアクセスメモリ用の低電力リフレッシュ回路および方法 Expired - Fee Related JP4923193B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/056,935 2001-10-18
US10/056,935 US6771553B2 (en) 2001-10-18 2001-10-18 Low power auto-refresh circuit and method for dynamic random access memories

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2003537075A Division JP2005506647A (ja) 2001-10-18 2002-10-16 ダイナミックランダムアクセスメモリ用の低電力自動リフレッシュ回路および方法

Publications (3)

Publication Number Publication Date
JP2008287873A JP2008287873A (ja) 2008-11-27
JP2008287873A5 true JP2008287873A5 (enExample) 2009-08-13
JP4923193B2 JP4923193B2 (ja) 2012-04-25

Family

ID=22007458

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2003537075A Pending JP2005506647A (ja) 2001-10-18 2002-10-16 ダイナミックランダムアクセスメモリ用の低電力自動リフレッシュ回路および方法
JP2008185427A Expired - Fee Related JP4923193B2 (ja) 2001-10-18 2008-07-16 ダイナミックランダムアクセスメモリ用の低電力リフレッシュ回路および方法

Family Applications Before (1)

Application Number Title Priority Date Filing Date
JP2003537075A Pending JP2005506647A (ja) 2001-10-18 2002-10-16 ダイナミックランダムアクセスメモリ用の低電力自動リフレッシュ回路および方法

Country Status (6)

Country Link
US (2) US6771553B2 (enExample)
EP (1) EP1446804B1 (enExample)
JP (2) JP2005506647A (enExample)
KR (1) KR100779871B1 (enExample)
CN (2) CN101714406A (enExample)
WO (1) WO2003034435A1 (enExample)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6771553B2 (en) * 2001-10-18 2004-08-03 Micron Technology, Inc. Low power auto-refresh circuit and method for dynamic random access memories
US6957307B2 (en) * 2002-03-22 2005-10-18 Intel Corporation Mapping data masks in hardware by controller programming
JP2003297083A (ja) * 2002-03-29 2003-10-17 Mitsubishi Electric Corp 半導体記憶装置
US6731548B2 (en) * 2002-06-07 2004-05-04 Micron Technology, Inc. Reduced power registered memory module and method
US7124260B2 (en) * 2002-08-26 2006-10-17 Micron Technology, Inc. Modified persistent auto precharge command protocol system and method for memory devices
US20050088894A1 (en) * 2003-10-23 2005-04-28 Brucke Paul E. Auto-refresh multiple row activation
KR100587077B1 (ko) * 2004-04-28 2006-06-08 주식회사 하이닉스반도체 메모리 장치에 사용되는 클락 인에이블 신호용 버퍼 장치
US20060218424A1 (en) * 2005-03-23 2006-09-28 Miron Abramovici Integrated circuit with autonomous power management
US7206234B2 (en) * 2005-06-21 2007-04-17 Micron Technology, Inc. Input buffer for low voltage operation
KR100819683B1 (ko) * 2005-07-04 2008-04-04 주식회사 하이닉스반도체 반도체 메모리 장치
US20070086261A1 (en) * 2005-10-17 2007-04-19 Freebern Margaret C Directed auto-refresh for a dynamic random access memory
US7433261B2 (en) * 2005-10-17 2008-10-07 Infineon Technologies Ag Directed auto-refresh for a dynamic random access memory
US7330391B2 (en) * 2005-10-17 2008-02-12 Infineon Technologies Ag Memory having directed auto-refresh
JP4916699B2 (ja) 2005-10-25 2012-04-18 エルピーダメモリ株式会社 Ｚｑキャリブレーション回路及びこれを備えた半導体装置
KR100810060B1 (ko) * 2006-04-14 2008-03-05 주식회사 하이닉스반도체 반도체 메모리 소자 및 그의 구동방법
JP4829029B2 (ja) 2006-08-02 2011-11-30 株式会社東芝 メモリシステム及びメモリチップ
US7733731B2 (en) 2007-03-05 2010-06-08 Micron Technology, Inc. Control of inputs to a memory device
US8874831B2 (en) 2007-06-01 2014-10-28 Netlist, Inc. Flash-DRAM hybrid memory module
US7961541B2 (en) * 2007-12-12 2011-06-14 Zmos Technology, Inc. Memory device with self-refresh operations
US8045416B2 (en) * 2008-03-05 2011-10-25 Micron Technology, Inc. Method and memory device providing reduced quantity of interconnections
US8369178B2 (en) 2010-03-08 2013-02-05 Micron Technology, Inc. System and method for managing self-refresh in a multi-rank memory
US8446793B2 (en) 2010-03-31 2013-05-21 Hynix Semiconductor Inc. Semiconductor memory device including clock control circuit and method for operating the same
KR20120070436A (ko) 2010-12-21 2012-06-29 에스케이하이닉스 주식회사 반도체 메모리 장치
JP5795513B2 (ja) * 2011-09-28 2015-10-14 ピーエスフォー ルクスコ エスエイアールエルＰＳ４ Ｌｕｘｃｏ Ｓ．ａ．ｒ．ｌ． 半導体装置
KR101878902B1 (ko) * 2011-10-04 2018-07-17 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그의 구동 방법
KR101980162B1 (ko) * 2012-06-28 2019-08-28 에스케이하이닉스 주식회사 메모리
US9251048B2 (en) 2012-10-19 2016-02-02 International Business Machines Corporation Memory page management
US9171605B1 (en) 2012-12-21 2015-10-27 Samsung Electronics Co., Ltd. Concentrated address detecting method of semiconductor device and concentrated address detecting circuit using the same
KR20140081288A (ko) * 2012-12-21 2014-07-01 삼성전자주식회사 메모리 장치의 커맨드 제어 회로 및 이를 포함하는 메모리 장치
TW201437805A (zh) * 2013-03-29 2014-10-01 Wistron Corp 電子裝置及其電源管理方法
KR102174818B1 (ko) * 2014-04-07 2020-11-06 에스케이하이닉스 주식회사 휘발성 메모리, 이를 포함하는 메모리 모듈 및 메모리 모듈의 동작 방법
KR20170045795A (ko) * 2015-10-20 2017-04-28 삼성전자주식회사 메모리 장치 및 이를 포함하는 메모리 시스템
EP3901952B1 (en) * 2016-10-31 2023-06-07 Intel Corporation Applying chip select for memory device identification and power management control
KR102717098B1 (ko) * 2016-11-01 2024-10-15 삼성전자주식회사 단계별 저전력 상태들을 갖는 메모리 장치
JP7536431B2 (ja) * 2019-09-20 2024-08-20 キヤノン株式会社 メモリ制御装置およびその制御方法
CN110821633A (zh) * 2019-10-28 2020-02-21 奇瑞汽车股份有限公司 一种无级风扇在发动机控制器更新软件过程中的控制方法
CN114721581B (zh) * 2021-01-04 2025-08-19 瑞昱半导体股份有限公司 用于同步动态随机存取内存的控制模块及其控制方法

Family Cites Families (53)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3359827A (en) 1964-09-14 1967-12-26 Gen Motors Corp Transmission
US5262998A (en) 1991-08-14 1993-11-16 Micron Technology, Inc. Dynamic random access memory with operational sleep mode
US5831467A (en) 1991-11-05 1998-11-03 Monolithic System Technology, Inc. Termination circuit with power-down mode for use in circuit module architecture
US5450364A (en) 1994-01-31 1995-09-12 Texas Instruments Incorporated Method and apparatus for production testing of self-refresh operations and a particular application to synchronous memory devices
US6175901B1 (en) 1994-04-15 2001-01-16 Micron Technology, Inc. Method for initializing and reprogramming a control operation feature of a memory device
US5400289A (en) 1994-07-15 1995-03-21 Micron Technology, Inc. Lockout circuit and method for preventing metastability during the termination of a refresh mode
US6094703A (en) 1995-02-21 2000-07-25 Micron Technology, Inc. Synchronous SRAM having pipelined memory access enable for a burst of addresses
US6205514B1 (en) 1995-02-21 2001-03-20 Micron Technology, Inc. Synchronous SRAM having global write enable
US5848431A (en) 1995-02-21 1998-12-08 Micron Technology, Inc. Synchronous SRAMs having multiple chip select inputs and a standby chip enable input
US5787489A (en) 1995-02-21 1998-07-28 Micron Technology, Inc. Synchronous SRAM having pipelined enable
US5636173A (en) 1995-06-07 1997-06-03 Micron Technology, Inc. Auto-precharge during bank selection
US6058448A (en) 1995-12-19 2000-05-02 Micron Technology, Inc. Circuit for preventing bus contention
JP3566429B2 (ja) * 1995-12-19 2004-09-15 株式会社ルネサステクノロジ 同期型半導体記憶装置
US5627791A (en) * 1996-02-16 1997-05-06 Micron Technology, Inc. Multiple bank memory with auto refresh to specified bank
JPH09288614A (ja) * 1996-04-22 1997-11-04 Mitsubishi Electric Corp 半導体集積回路装置、半導体記憶装置およびそのための制御回路
US6130602A (en) 1996-05-13 2000-10-10 Micron Technology, Inc. Radio frequency data communications device
JP4000206B2 (ja) 1996-08-29 2007-10-31 富士通株式会社 半導体記憶装置
US6172935B1 (en) 1997-04-25 2001-01-09 Micron Technology, Inc. Synchronous dynamic random access memory device
US6499073B1 (en) 1997-05-13 2002-12-24 Micron Electronics, Inc. System using programmable processor for selectively enabling or disabling power to adapter in response to respective request signals
JP4246812B2 (ja) * 1997-06-12 2009-04-02 パナソニック株式会社 半導体回路及びその制御方法
US5881016A (en) 1997-06-13 1999-03-09 Cirrus Logic, Inc. Method and apparatus for optimizing power consumption and memory bandwidth in a video controller using SGRAM and SDRAM power reduction modes
US5999481A (en) 1997-08-22 1999-12-07 Micron Technology, Inc. Method and apparatus for controlling the operation of an integrated circuit responsive to out-of-synchronism control signals
US5949657A (en) 1997-12-01 1999-09-07 Karabatsos; Chris Bottom or top jumpered foldable electronic assembly
US5959929A (en) 1997-12-29 1999-09-28 Micron Technology, Inc. Method for writing to multiple banks of a memory device
JPH11203866A (ja) 1998-01-16 1999-07-30 Mitsubishi Electric Corp 半導体記憶装置
US6370662B2 (en) 1998-03-16 2002-04-09 S3 Incorporated Modifying circuit designs running from both edges of clock to run from positive edge
US6253340B1 (en) 1998-06-08 2001-06-26 Micron Technology, Inc. Integrated circuit implementing internally generated commands
JP2000173263A (ja) 1998-12-04 2000-06-23 Mitsubishi Electric Corp 半導体記憶装置
US6115278A (en) 1999-02-09 2000-09-05 Silicon Graphics, Inc. Memory system with switching for data isolation
US6233199B1 (en) 1999-02-26 2001-05-15 Micron Technology, Inc. Full page increment/decrement burst for DDR SDRAM/SGRAM
JP4187346B2 (ja) 1999-03-31 2008-11-26 富士通マイクロエレクトロニクス株式会社 同期型半導体記憶装置
JP4056173B2 (ja) 1999-04-14 2008-03-05 富士通株式会社 半導体記憶装置および該半導体記憶装置のリフレッシュ方法
KR100324821B1 (ko) * 1999-06-29 2002-02-28 박종섭 반도체 메모리 소자의 자동 리프레쉬 방법 및 장치
JP2001014847A (ja) 1999-06-30 2001-01-19 Toshiba Corp クロック同期回路
JP4216415B2 (ja) * 1999-08-31 2009-01-28 株式会社ルネサステクノロジ 半導体装置
JP2001118383A (ja) 1999-10-20 2001-04-27 Fujitsu Ltd リフレッシュを自動で行うダイナミックメモリ回路
JP2001338489A (ja) 2000-05-24 2001-12-07 Mitsubishi Electric Corp 半導体装置
US6304497B1 (en) 2000-06-30 2001-10-16 Micron Technology, Inc. Synchronous memory status register
US6442076B1 (en) * 2000-06-30 2002-08-27 Micron Technology, Inc. Flash memory with multiple status reading capability
US6359827B1 (en) 2000-08-22 2002-03-19 Micron Technology, Inc. Method of constructing a very wide, very fast distributed memory
US6580659B1 (en) 2000-08-25 2003-06-17 Micron Technology, Inc. Burst read addressing in a non-volatile memory device
US6570804B1 (en) 2000-08-29 2003-05-27 Micron Technology, Inc. Fuse read sequence for auto refresh power reduction
US6304510B1 (en) 2000-08-31 2001-10-16 Micron Technology, Inc. Memory device address decoding
US6449203B1 (en) 2001-03-08 2002-09-10 Micron Technology, Inc. Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs
US6560158B2 (en) 2001-04-27 2003-05-06 Samsung Electronics Co., Ltd. Power down voltage control method and apparatus
JP2002367370A (ja) 2001-06-07 2002-12-20 Mitsubishi Electric Corp 半導体記憶装置
US6549479B2 (en) 2001-06-29 2003-04-15 Micron Technology, Inc. Memory device and method having reduced-power self-refresh mode
US6483347B1 (en) 2001-07-11 2002-11-19 Micron Technology, Inc. High speed digital signal buffer and method
US6552596B2 (en) 2001-08-10 2003-04-22 Micron Technology, Inc. Current saving mode for input buffers
US6510099B1 (en) 2001-09-28 2003-01-21 Intel Corporation Memory control with dynamic driver disabling
US6771553B2 (en) * 2001-10-18 2004-08-03 Micron Technology, Inc. Low power auto-refresh circuit and method for dynamic random access memories
US6552955B1 (en) 2001-10-30 2003-04-22 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device with reduced power consumption
US6731548B2 (en) * 2002-06-07 2004-05-04 Micron Technology, Inc. Reduced power registered memory module and method

Similar Documents

Publication Publication Date Title
JP2008287873A5 (enExample)
CN103000223B (zh) 伪静态随机存取记忆体的运作方法及相关记忆装置
KR100989287B1 (ko) 혼합 비동기식 동기식 메모리 동작용 검출 회로
KR100779871B1 (ko) 동적 랜덤 액세스 메모리용 저전력 오토-리프레쉬 회로 및방법
TWI559316B (zh) 半導體裝置
JP2009514128A5 (enExample)
JP2007226934A (ja) 向上されたリフレッシュメカニズムを有するダイナミック半導体メモリ
JP2005222581A5 (enExample)
TWI655632B (zh) 偽靜態隨機存取記憶體及其刷新的方法
JP2009176421A (ja) 半導体記憶装置
KR20250152104A (ko) 메모리에서의 향상된 데이터 클럭 동작들
TW201935477A (zh) 偽靜態隨機存取記憶體及其控制方法
CN101075474A (zh) 半导体存储器及其操作方法
US7894290B2 (en) Method and apparatus for performing internal hidden refreshes while latching read/write commands, address and data information for later operation
JP2006018797A (ja) 集積回路装置における待機電力を低減させる方法、集積回路のキャッシュ付きメモリアレイを動作させる方法、および集積回路装置
JP4275033B2 (ja) 半導体記憶装置とテスト回路及び方法
WO2011103824A2 (zh) 一种同步sram的时序处理方法和电路
JP2005339624A (ja) 半導体記憶装置および該半導体記憶装置の制御方法
JP4518563B2 (ja) 半導体記憶装置
JP5423483B2 (ja) データ転送制御装置
US6643732B1 (en) Delayed read/write scheme for SRAM interface compatible DRAM
JP2001332083A (ja) 半導体記憶装置およびそのアドレス制御方法
CN100416701C (zh) 相容于sram界面的dram的延迟读取/储存方法和电路
CN112927685B (zh) 动态语音辨识方法及其装置
JP2004280947A (ja) 半導体記憶装置