JP2005506647A - ダイナミックランダムアクセスメモリ用の低電力自動リフレッシュ回路および方法 - Google Patents

ダイナミックランダムアクセスメモリ用の低電力自動リフレッシュ回路および方法 Download PDF

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Publication number
JP2005506647A
JP2005506647A JP2003537075A JP2003537075A JP2005506647A JP 2005506647 A JP2005506647 A JP 2005506647A JP 2003537075 A JP2003537075 A JP 2003537075A JP 2003537075 A JP2003537075 A JP 2003537075A JP 2005506647 A JP2005506647 A JP 2005506647A
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Japan
Prior art keywords
refresh
signal
command
predetermined
decoder
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Pending
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JP2003537075A
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English (en)
Japanese (ja)
Inventor
ティモシー ビー． コーレス，
シャーリー，　ブライアン　エム．
グレッグ エー． ブロッドジェット，
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Micron Technology Inc
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Micron Technology Inc
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Publication of JP2005506647A publication Critical patent/JP2005506647A/ja
Pending legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40611—External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40615—Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4065—Low level details of refresh operations
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406—Refreshing of dynamic cells
    • G11C2211/4067—Refresh in standby or low power modes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
JP2003537075A 2001-10-18 2002-10-16 ダイナミックランダムアクセスメモリ用の低電力自動リフレッシュ回路および方法 Pending JP2005506647A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/056,935 US6771553B2 (en) 2001-10-18 2001-10-18 Low power auto-refresh circuit and method for dynamic random access memories
PCT/US2002/033147 WO2003034435A1 (en) 2001-10-18 2002-10-16 Low power auto-refresh circuit and method for dynamic random access memories

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008185427A Division JP4923193B2 (ja) 2001-10-18 2008-07-16 ダイナミックランダムアクセスメモリ用の低電力リフレッシュ回路および方法

Publications (1)

Publication Number Publication Date
JP2005506647A true JP2005506647A (ja) 2005-03-03

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JP2003537075A Pending JP2005506647A (ja) 2001-10-18 2002-10-16 ダイナミックランダムアクセスメモリ用の低電力自動リフレッシュ回路および方法
JP2008185427A Expired - Fee Related JP4923193B2 (ja) 2001-10-18 2008-07-16 ダイナミックランダムアクセスメモリ用の低電力リフレッシュ回路および方法

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JP2008185427A Expired - Fee Related JP4923193B2 (ja) 2001-10-18 2008-07-16 ダイナミックランダムアクセスメモリ用の低電力リフレッシュ回路および方法

Country Status (6)

Country Link
US (2) US6771553B2 (enExample)
EP (1) EP1446804B1 (enExample)
JP (2) JP2005506647A (enExample)
KR (1) KR100779871B1 (enExample)
CN (2) CN101714406A (enExample)
WO (1) WO2003034435A1 (enExample)

Cited By (1)

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US7839159B2 (en) 2005-10-25 2010-11-23 Elpida Memory, Inc. ZQ calibration circuit and a semiconductor device including a ZQ calibration circuit

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Also Published As

Publication number Publication date
KR20050036881A (ko) 2005-04-20
JP4923193B2 (ja) 2012-04-25
KR100779871B1 (ko) 2007-11-27
US7079439B2 (en) 2006-07-18
US20040268018A1 (en) 2004-12-30
WO2003034435A1 (en) 2003-04-24
JP2008287873A (ja) 2008-11-27
US6771553B2 (en) 2004-08-03
US20030076726A1 (en) 2003-04-24
CN101714406A (zh) 2010-05-26
EP1446804A4 (en) 2007-05-23
EP1446804A1 (en) 2004-08-18
CN100590730C (zh) 2010-02-17
EP1446804B1 (en) 2014-07-16
CN1605105A (zh) 2005-04-06

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