JP2007523481A - 埋め込みガードリング及び耐放射線性分離構造並びにその製造方法 - Google Patents
埋め込みガードリング及び耐放射線性分離構造並びにその製造方法 Download PDFInfo
- Publication number
- JP2007523481A JP2007523481A JP2006553340A JP2006553340A JP2007523481A JP 2007523481 A JP2007523481 A JP 2007523481A JP 2006553340 A JP2006553340 A JP 2006553340A JP 2006553340 A JP2006553340 A JP 2006553340A JP 2007523481 A JP2007523481 A JP 2007523481A
- Authority
- JP
- Japan
- Prior art keywords
- region
- substrate
- well
- semiconductor device
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/351—Substrate regions of field-effect devices
- H10D62/357—Substrate regions of field-effect devices of FETs
- H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
- H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/351—Substrate regions of field-effect devices
- H10D62/357—Substrate regions of field-effect devices of FETs
- H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
- H10D62/378—Contact regions to the substrate regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/854—Complementary IGFETs, e.g. CMOS comprising arrangements for preventing bipolar actions between the different IGFET regions, e.g. arrangements for latchup prevention
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Health & Medical Sciences (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US54527104P | 2004-02-17 | 2004-02-17 | |
| US10/951,283 US7304354B2 (en) | 2004-02-17 | 2004-09-27 | Buried guard ring and radiation hardened isolation structures and fabrication methods |
| PCT/US2005/004740 WO2005079400A2 (en) | 2004-02-17 | 2005-02-15 | Buried guard ring and radiation hardened isolation structures and fabrication methods |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012129441A Division JP5607111B2 (ja) | 2004-02-17 | 2012-06-07 | 埋め込みガードリング及び耐放射線性分離構造並びにその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007523481A true JP2007523481A (ja) | 2007-08-16 |
| JP2007523481A5 JP2007523481A5 (enExample) | 2008-04-03 |
Family
ID=34841218
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006553340A Pending JP2007523481A (ja) | 2004-02-17 | 2005-02-15 | 埋め込みガードリング及び耐放射線性分離構造並びにその製造方法 |
| JP2012129441A Expired - Lifetime JP5607111B2 (ja) | 2004-02-17 | 2012-06-07 | 埋め込みガードリング及び耐放射線性分離構造並びにその製造方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012129441A Expired - Lifetime JP5607111B2 (ja) | 2004-02-17 | 2012-06-07 | 埋め込みガードリング及び耐放射線性分離構造並びにその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (6) | US7304354B2 (enExample) |
| EP (1) | EP1716591A4 (enExample) |
| JP (2) | JP2007523481A (enExample) |
| WO (1) | WO2005079400A2 (enExample) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007115998A (ja) * | 2005-10-21 | 2007-05-10 | Seiko Epson Corp | 半導体装置 |
| JP2009158934A (ja) * | 2007-12-04 | 2009-07-16 | Nec Electronics Corp | 半導体集積装置とその製造方法 |
| JP2011238760A (ja) * | 2010-05-10 | 2011-11-24 | Denso Corp | 半導体装置 |
| JP2013033917A (ja) * | 2011-07-05 | 2013-02-14 | Denso Corp | 半導体装置 |
| JP2014146833A (ja) * | 2014-04-09 | 2014-08-14 | Denso Corp | 半導体装置 |
| JP2014170831A (ja) * | 2013-03-04 | 2014-09-18 | Seiko Epson Corp | 回路装置及び電子機器 |
| JP2016164989A (ja) * | 2008-02-14 | 2016-09-08 | アドバンスト・アナロジック・テクノロジーズ・インコーポレイテッドAdvanced Analogic Technologies Incorporated | 分離されたcmosおよびバイポーラトランジスタ、それらのための分離構造、ならびにその作製方法 |
| JP2016167613A (ja) * | 2007-03-28 | 2016-09-15 | アドバンスト・アナロジック・テクノロジーズ・インコーポレイテッドAdvanced Analogic Technologies Incorporated | 絶縁分離された集積回路装置 |
| JP2017139503A (ja) * | 2017-05-18 | 2017-08-10 | セイコーエプソン株式会社 | 回路装置及び電子機器 |
| US9905640B2 (en) | 2002-09-29 | 2018-02-27 | Skyworks Solutions (Hong Kong) Limited | Isolation structures for semiconductor devices including trenches containing conductive material |
Families Citing this family (102)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6804502B2 (en) | 2001-10-10 | 2004-10-12 | Peregrine Semiconductor Corporation | Switch circuit and method of switching radio frequency signals |
| US20080197408A1 (en) * | 2002-08-14 | 2008-08-21 | Advanced Analogic Technologies, Inc. | Isolated quasi-vertical DMOS transistor |
| US7667268B2 (en) | 2002-08-14 | 2010-02-23 | Advanced Analogic Technologies, Inc. | Isolated transistor |
| US8513087B2 (en) * | 2002-08-14 | 2013-08-20 | Advanced Analogic Technologies, Incorporated | Processes for forming isolation structures for integrated circuit devices |
| US7956391B2 (en) | 2002-08-14 | 2011-06-07 | Advanced Analogic Technologies, Inc. | Isolated junction field-effect transistor |
| US7834421B2 (en) * | 2002-08-14 | 2010-11-16 | Advanced Analogic Technologies, Inc. | Isolated diode |
| US7939420B2 (en) * | 2002-08-14 | 2011-05-10 | Advanced Analogic Technologies, Inc. | Processes for forming isolation structures for integrated circuit devices |
| US7902630B2 (en) * | 2002-08-14 | 2011-03-08 | Advanced Analogic Technologies, Inc. | Isolated bipolar transistor |
| US7304354B2 (en) | 2004-02-17 | 2007-12-04 | Silicon Space Technology Corp. | Buried guard ring and radiation hardened isolation structures and fabrication methods |
| US7169661B2 (en) * | 2004-04-12 | 2007-01-30 | System General Corp. | Process of fabricating high resistance CMOS resistor |
| KR100577312B1 (ko) * | 2004-07-05 | 2006-05-10 | 동부일렉트로닉스 주식회사 | 씨모스 이미지 센서의 포토트랜지스터 및 그 제조 방법 |
| KR100612418B1 (ko) * | 2004-09-24 | 2006-08-16 | 삼성전자주식회사 | 자기정렬 바디를 갖는 반도체 소자 및 그 제조방법 |
| US7234121B2 (en) * | 2005-01-06 | 2007-06-19 | Texas Instruments Incorporated | Method of fabricating an integrated circuit to improve soft error performance |
| US7605429B2 (en) * | 2005-04-15 | 2009-10-20 | International Business Machines Corporation | Hybrid crystal orientation CMOS structure for adaptive well biasing and for power and performance enhancement |
| USRE48965E1 (en) | 2005-07-11 | 2022-03-08 | Psemi Corporation | Method and apparatus improving gate oxide reliability by controlling accumulated charge |
| US20080076371A1 (en) | 2005-07-11 | 2008-03-27 | Alexander Dribinsky | Circuit and method for controlling charge injection in radio frequency switches |
| US9653601B2 (en) | 2005-07-11 | 2017-05-16 | Peregrine Semiconductor Corporation | Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction |
| US8461648B2 (en) | 2005-07-27 | 2013-06-11 | Infineon Technologies Austria Ag | Semiconductor component with a drift region and a drift control region |
| US8110868B2 (en) | 2005-07-27 | 2012-02-07 | Infineon Technologies Austria Ag | Power semiconductor component with a low on-state resistance |
| DE102005042868B4 (de) * | 2005-09-08 | 2009-07-23 | Infineon Technologies Ag | Feldeffektleistungsbauteil mit integrierter CMOS-Struktur und Verfahren zur Herstellung desselben |
| DE102005046624B3 (de) * | 2005-09-29 | 2007-03-22 | Atmel Germany Gmbh | Verfahren zur Herstellung einer Halbleiteranordnung |
| JP5036719B2 (ja) * | 2005-10-14 | 2012-09-26 | シリコン・スペース・テクノロジー・コーポレイション | 耐放射線性のあるアイソレーション構造及びその製造方法 |
| CN100416799C (zh) * | 2005-11-30 | 2008-09-03 | 奇景光电股份有限公司 | 三重工作电压元件 |
| US20070145367A1 (en) * | 2005-12-27 | 2007-06-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Three-dimensional integrated circuit structure |
| US7298010B1 (en) | 2006-02-21 | 2007-11-20 | Sandia Corporation | Radiation-hardened transistor and integrated circuit |
| US7736915B2 (en) * | 2006-02-21 | 2010-06-15 | International Business Machines Corporation | Method for neutralizing trapped charge in a charge accumulation layer of a semiconductor structure |
| WO2008019329A2 (en) * | 2006-08-04 | 2008-02-14 | Silicon Space Technology Corporation | Improved radiation immunity of integrated circuits using backside die contact and electrically conductive layers |
| US7772648B1 (en) * | 2006-09-13 | 2010-08-10 | Rf Micro Devices, Inc. | Performance enhanced silicon-on-insulator technology |
| US7666750B2 (en) * | 2006-09-13 | 2010-02-23 | Agere Systems Inc. | Bipolar device having improved capacitance |
| US20080077376A1 (en) * | 2006-09-25 | 2008-03-27 | Iroc Technologies | Apparatus and method for the determination of SEU and SET disruptions in a circuit caused by ionizing particle strikes |
| US7462885B2 (en) * | 2006-11-30 | 2008-12-09 | Taiwan Semiconductor Manufacturing Co. | ESD structure for high voltage ESD protection |
| US7521776B2 (en) * | 2006-12-29 | 2009-04-21 | International Business Machines Corporation | Soft error reduction of CMOS circuits on substrates with hybrid crystal orientation using buried recombination centers |
| JP4420042B2 (ja) * | 2007-02-28 | 2010-02-24 | セイコーエプソン株式会社 | 半導体装置 |
| US7795681B2 (en) * | 2007-03-28 | 2010-09-14 | Advanced Analogic Technologies, Inc. | Isolated lateral MOSFET in epi-less substrate |
| US8168466B2 (en) * | 2007-06-01 | 2012-05-01 | Semiconductor Components Industries, Llc | Schottky diode and method therefor |
| US20090072313A1 (en) * | 2007-09-19 | 2009-03-19 | International Business Machines Corporation | Hardened transistors in soi devices |
| US7888959B2 (en) * | 2007-09-19 | 2011-02-15 | International Business Machines Corporation | Apparatus and method for hardening latches in SOI CMOS devices |
| KR101418396B1 (ko) | 2007-11-19 | 2014-07-10 | 페어차일드코리아반도체 주식회사 | 전력 반도체 소자 |
| DE102008004682A1 (de) * | 2008-01-16 | 2009-09-10 | Infineon Technologies Ag | Integrierte Schaltungsanordnung mit einer Schutzstruktur zur Reduktion eines Minoritätsladungsträgerstromes |
| US7943960B2 (en) * | 2008-02-01 | 2011-05-17 | Infineon Technologies Ag | Integrated circuit arrangement including a protective structure |
| WO2009101870A1 (ja) * | 2008-02-12 | 2009-08-20 | Nec Corporation | 半導体装置 |
| US7786504B2 (en) * | 2008-03-20 | 2010-08-31 | Amazing Microelectronic Corp. | Bidirectional PNPN silicon-controlled rectifier |
| US7782050B2 (en) * | 2008-04-11 | 2010-08-24 | Infineon Technologies Ag | Hall effect device and method |
| US7919817B2 (en) * | 2008-05-16 | 2011-04-05 | Alpha & Omega Semiconductor Ltd. | Electrostatic discharge (ESD) protection applying high voltage lightly doped drain (LDD) CMOS technologies |
| US8445947B2 (en) * | 2008-07-04 | 2013-05-21 | Stmicroelectronics (Rousset) Sas | Electronic circuit having a diode-connected MOS transistor with an improved efficiency |
| US7842969B2 (en) * | 2008-07-10 | 2010-11-30 | Semiconductor Components Industries, Llc | Low clamp voltage ESD device and method therefor |
| US8131225B2 (en) * | 2008-12-23 | 2012-03-06 | International Business Machines Corporation | BIAS voltage generation circuit for an SOI radio frequency switch |
| US8890256B2 (en) * | 2009-03-20 | 2014-11-18 | International Business Machines Corporation | Structure for heavy ion tolerant device, method of manufacturing the same and structure thereof |
| US8133774B2 (en) * | 2009-03-26 | 2012-03-13 | International Business Machines Corporation | SOI radio frequency switch with enhanced electrical isolation |
| US7812642B1 (en) | 2009-05-12 | 2010-10-12 | Xilinx, Inc. | Pass gate with improved latchup immunity |
| JP5546191B2 (ja) * | 2009-09-25 | 2014-07-09 | セイコーインスツル株式会社 | 半導体装置 |
| US20110084324A1 (en) * | 2009-10-09 | 2011-04-14 | Texas Instruments Incorporated | Radiation hardened mos devices and methods of fabrication |
| CN101771088A (zh) * | 2010-01-21 | 2010-07-07 | 复旦大学 | Pn结和肖特基结混合式二极管及其制备方法 |
| US8796731B2 (en) | 2010-08-20 | 2014-08-05 | International Business Machines Corporation | Low leakage, low capacitance electrostatic discharge (ESD) silicon controlled recitifer (SCR), methods of manufacture and design structure |
| US8906751B2 (en) | 2011-01-06 | 2014-12-09 | International Business Machines Corporation | Silicon controlled rectifiers (SCR), methods of manufacture and design structures |
| US20120313173A1 (en) * | 2011-06-07 | 2012-12-13 | Rf Micro Devices, Inc. | Method for isolating rf functional blocks on silicon-on-insulator (soi) substrates |
| US8742481B2 (en) * | 2011-08-16 | 2014-06-03 | Micron Technology, Inc. | Apparatuses and methods comprising a channel region having different minority carrier lifetimes |
| US8530298B2 (en) | 2011-11-01 | 2013-09-10 | Texas Instruments Incorporated | Radiation hardened integrated circuit |
| US20130126508A1 (en) * | 2011-11-17 | 2013-05-23 | Texas Instruments Incorporated | Extending Radiation Tolerance By Localized Temperature Annealing Of Semiconductor Devices |
| WO2013078439A2 (en) * | 2011-11-22 | 2013-05-30 | Silicon Space Technology Corporation | Memory circuit incorporating radiation hardened memory scrub engine |
| US8614121B2 (en) | 2011-11-29 | 2013-12-24 | International Business Machines Corporation | Method of manufacturing back gate triggered silicon controlled rectifiers |
| US8723269B2 (en) | 2011-12-27 | 2014-05-13 | Leonard Richard Rockett | Buried power grid designs for improved radiation hardness in CMOS technologies |
| US8587071B2 (en) | 2012-04-23 | 2013-11-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | Electrostatic discharge (ESD) guard ring protective structure |
| JP2014120609A (ja) * | 2012-12-17 | 2014-06-30 | Fujitsu Semiconductor Ltd | 半導体装置及びその製造方法 |
| US9054155B2 (en) * | 2013-03-07 | 2015-06-09 | Freescale Semiconductor Inc. | Semiconductor dies having substrate shunts and related fabrication methods |
| US9268637B2 (en) | 2013-03-15 | 2016-02-23 | Silicon Space Technology Corporation | Memory circuit incorporating error detection and correction (EDAC), method of operation, and system |
| US9437771B2 (en) * | 2013-05-14 | 2016-09-06 | Fermi Research Alliance, Llc | Monolithic active pixel radiation detector with shielding techniques |
| RU2539869C1 (ru) * | 2013-12-24 | 2015-01-27 | Закрытое акционерное общество "Электронно-вычислительные информационные и инструментальные системы" (ЗАО "ЭЛВИИС") | Радиационно-стойкая библиотека элементов на комплементарных металл-окисел-полупроводник транзисторах |
| US9882600B2 (en) * | 2014-02-05 | 2018-01-30 | Infineon Technologies Ag | Switching device, a communication device, and a method for processing a carrier |
| WO2015168273A1 (en) * | 2014-05-02 | 2015-11-05 | Synopsys, Inc. | 3d tcad simulation |
| US9202859B1 (en) * | 2014-05-27 | 2015-12-01 | Texas Instruments Incorporated | Well resistors and polysilicon resistors |
| TWI527241B (zh) * | 2014-06-11 | 2016-03-21 | 新唐科技股份有限公司 | 半導體裝置 |
| US9507897B2 (en) * | 2014-06-14 | 2016-11-29 | Taiwan Semiconductor Manufacturing Company Limited | Circuit arrangement for modeling transistor layout characteristics |
| US9702925B2 (en) | 2014-10-15 | 2017-07-11 | Nxp Usa, Inc. | Semiconductor device with upset event detection and method of making |
| US9899376B2 (en) * | 2016-03-04 | 2018-02-20 | Texas Instruments Incorporated | MOSFET transistors with robust subthreshold operations |
| KR101905445B1 (ko) | 2016-04-27 | 2018-10-10 | 한국과학기술원 | 트랜지스터 손상 치료 방법 및 이를 이용한 디스플레이 장치 |
| US10038058B2 (en) | 2016-05-07 | 2018-07-31 | Silicon Space Technology Corporation | FinFET device structure and method for forming same |
| KR101801548B1 (ko) * | 2016-06-16 | 2017-11-27 | 한국과학기술원 | 방사선 손상에 대해 자가복구가 가능한 전계효과 트랜지스터 및 그의 손상복구 시스템 |
| US10204906B2 (en) * | 2016-12-16 | 2019-02-12 | Intel Corporation | Memory with single-event latchup prevention circuitry |
| US10276457B2 (en) * | 2017-03-29 | 2019-04-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for measuring charge accumulation in fabrication process of semiconductor device and method for fabricating semiconductor device |
| US10290631B2 (en) * | 2017-05-05 | 2019-05-14 | Newport Fab, Llc | Linearity and lateral isolation in a BiCMOS process through counter-doping of epitaxial silicon region |
| US10319716B2 (en) | 2017-05-05 | 2019-06-11 | Newport Fab, Llc | Substrate isolation for low-loss radio frequency (RF) circuits |
| US10186514B1 (en) | 2017-09-06 | 2019-01-22 | Qualcomm Incorporated | Bi-stable static random access memory (SRAM) bit cells formed from III-V compounds and configured to achieve higher operating speeds |
| US10312244B2 (en) * | 2017-09-19 | 2019-06-04 | Qualcomm Incorporated | Bi-stable static random access memory (SRAM) bit cells that facilitate direct writing for storage |
| US10510855B2 (en) | 2017-11-14 | 2019-12-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Transistor layout to reduce kink effect |
| DE102018114750A1 (de) | 2017-11-14 | 2019-05-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Transistor-layout zum reduzieren des kink-effekts |
| US10468410B2 (en) | 2017-11-15 | 2019-11-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Metal gate modulation to improve kink effect |
| US10418402B2 (en) * | 2017-11-30 | 2019-09-17 | Stmicroelectronics (Research & Development) Limited | Near ultraviolet photocell |
| RU2674935C1 (ru) * | 2018-02-27 | 2018-12-13 | Акционерное общество Научно-производственный центр "Электронные вычислительно-информационные системы" (АО НПЦ "ЭЛВИС") | Радиационно-стойкий элемент памяти для статических оперативных запоминающих устройств на комплементарных металл-окисел-полупроводник транзисторах |
| RU2692307C1 (ru) * | 2018-07-24 | 2019-06-24 | Акционерное общество Научно-производственный центр "Электронные вычислительно-информационные системы" (АО НПЦ "ЭЛВИС") | Радиационно-стойкий элемент памяти для статических оперативных запоминающих устройств на комплементарных металл-окисел-полупроводник транзисторах |
| US11239313B2 (en) | 2018-10-30 | 2022-02-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated chip and method of forming thereof |
| US10825715B2 (en) | 2018-11-08 | 2020-11-03 | Silicon Space Technologies Corporation | Structures for improving radiation hardness and eliminating latch-up in integrated circuits |
| KR102633136B1 (ko) * | 2019-01-10 | 2024-02-02 | 삼성전자주식회사 | 집적회로 칩과 이를 포함하는 집적회로 패키지 및 디스플레이 장치 |
| US11461531B2 (en) | 2019-04-29 | 2022-10-04 | Silicon Space Technology Corporation | Learning-based analyzer for mitigating latch-up in integrated circuits |
| KR102233049B1 (ko) | 2019-07-24 | 2021-03-26 | 주식회사 키 파운드리 | 채널 길이 조정이 용이한 반도체 소자 및 그 제조방법 |
| DE102020202038A1 (de) * | 2020-02-18 | 2021-08-19 | Robert Bosch Gesellschaft mit beschränkter Haftung | Vertikaler Fin-Feldeffekttransistor, vertikaler Fin-Feldeffekttransistor-Anordnung und Verfahren zum Bilden eines vertikalen Fin-Feldeffekttransistors |
| CN111739838B (zh) * | 2020-06-23 | 2023-10-31 | 中国科学院上海微系统与信息技术研究所 | 一种抗辐射的soi材料的制备方法 |
| TWI756005B (zh) * | 2021-01-04 | 2022-02-21 | 力晶積成電子製造股份有限公司 | 半導體裝置及其製造方法 |
| US12100733B2 (en) * | 2021-09-02 | 2024-09-24 | Nanya Technology Corporation | Semiconductor device with leakage current guide path and method for fabricating the same |
| US11784250B1 (en) | 2023-02-02 | 2023-10-10 | Apogee Semiconductor, Inc. | Devices and methods for compact radiation-hardened integrated circuits |
| CN116113309B (zh) * | 2023-04-13 | 2023-07-25 | 南京邮电大学 | 一种采用双保护环的低失调霍尔器件及其使用方法 |
| WO2025083086A1 (en) * | 2023-10-20 | 2025-04-24 | Melexis Technologies Sa | Semiconductor hall sensor structure |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57143843A (en) * | 1981-01-27 | 1982-09-06 | Thomson Csf | Transistor structure and method of producing same |
| JPS61240671A (ja) * | 1985-04-17 | 1986-10-25 | Sony Corp | 相補型電界効果トランジスタの製法 |
| JPS62250671A (ja) * | 1986-04-24 | 1987-10-31 | Agency Of Ind Science & Technol | 半導体装置 |
| JPH01265555A (ja) * | 1988-04-15 | 1989-10-23 | Ricoh Co Ltd | ラッチアップ防止手段をもつ半導体装置 |
| JPH0399464A (ja) * | 1989-09-12 | 1991-04-24 | Mitsubishi Electric Corp | 相補型mos半導体装置 |
| JPH043920A (ja) * | 1990-01-11 | 1992-01-08 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JPH04139758A (ja) * | 1990-10-01 | 1992-05-13 | Toshiba Corp | 半導体装置およびその製造方法 |
| JPH1070272A (ja) * | 1996-06-29 | 1998-03-10 | Hyundai Electron Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2000049237A (ja) * | 1998-07-28 | 2000-02-18 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP2002158293A (ja) * | 2000-11-16 | 2002-05-31 | Sharp Corp | 半導体装置及び携帯電子機器 |
Family Cites Families (97)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US1435A (en) * | 1839-12-18 | George smith | ||
| US4054894A (en) * | 1975-05-27 | 1977-10-18 | Rca Corporation | Edgeless transistor |
| US4203126A (en) | 1975-11-13 | 1980-05-13 | Siliconix, Inc. | CMOS structure and method utilizing retarded electric field for minimum latch-up |
| JPS5943545A (ja) * | 1982-09-06 | 1984-03-10 | Hitachi Ltd | 半導体集積回路装置 |
| US4639761A (en) | 1983-12-16 | 1987-01-27 | North American Philips Corporation | Combined bipolar-field effect transistor resurf devices |
| US6740958B2 (en) * | 1985-09-25 | 2004-05-25 | Renesas Technology Corp. | Semiconductor memory device |
| JPH0793383B2 (ja) * | 1985-11-15 | 1995-10-09 | 株式会社日立製作所 | 半導体装置 |
| US4936928A (en) * | 1985-11-27 | 1990-06-26 | Raytheon Company | Semiconductor device |
| GB2186117B (en) * | 1986-01-30 | 1989-11-01 | Sgs Microelettronica Spa | Monolithically integrated semiconductor device containing bipolar junction,cmosand dmos transistors and low leakage diodes and a method for its fabrication |
| US4980747A (en) | 1986-12-22 | 1990-12-25 | Texas Instruments Inc. | Deep trench isolation with surface contact to substrate |
| JPH01273346A (ja) | 1988-04-25 | 1989-11-01 | Nec Kansai Ltd | 半導体装置 |
| US5192993A (en) * | 1988-09-27 | 1993-03-09 | Kabushiki Kaisha Toshiba | Semiconductor device having improved element isolation area |
| US5138420A (en) | 1989-11-24 | 1992-08-11 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device having first and second type field effect transistors separated by a barrier |
| JPH0567753A (ja) | 1991-04-17 | 1993-03-19 | Mitsubishi Electric Corp | 二重構造ウエルを有する半導体装置およびその製造方法 |
| US5386136A (en) * | 1991-05-06 | 1995-01-31 | Siliconix Incorporated | Lightly-doped drain MOSFET with improved breakdown characteristics |
| USH1435H (en) | 1991-10-21 | 1995-05-02 | Cherne Richard D | SOI CMOS device having body extension for providing sidewall channel stop and bodytie |
| US5376816A (en) * | 1992-06-24 | 1994-12-27 | Nec Corporation | Bi-cmos integrated circuit device having buried region use in common for bipolar and mos transistors |
| US5220192A (en) | 1992-07-10 | 1993-06-15 | Lsi Logic | Radiation hardened CMOS structure using an implanted P guard structure and method for the manufacture thereof |
| JP3285435B2 (ja) * | 1993-07-07 | 2002-05-27 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
| WO1994025988A1 (en) | 1993-04-28 | 1994-11-10 | Seh America, Inc. | Epitaxial semiconductor wafer for cmos integrated circuits |
| JPH07169922A (ja) | 1993-09-29 | 1995-07-04 | At & T Global Inf Solutions Internatl Inc | シリコン制御整流器 |
| JP2800702B2 (ja) * | 1994-10-31 | 1998-09-21 | 日本電気株式会社 | 半導体装置 |
| US5501993A (en) | 1994-11-22 | 1996-03-26 | Genus, Inc. | Method of constructing CMOS vertically modulated wells (VMW) by clustered MeV BILLI (buried implanted layer for lateral isolation) implantation |
| JP3400181B2 (ja) * | 1995-04-25 | 2003-04-28 | ローム株式会社 | 半導体装置およびその製造方法 |
| US5719733A (en) | 1995-11-13 | 1998-02-17 | Lsi Logic Corporation | ESD protection for deep submicron CMOS devices with minimum tradeoff for latchup behavior |
| US5904551A (en) | 1996-04-12 | 1999-05-18 | Lsi Logic Corporation | Process for low energy implantation of semiconductor substrate using channeling to form retrograde wells |
| US5966599A (en) | 1996-05-21 | 1999-10-12 | Lsi Logic Corporation | Method for fabricating a low trigger voltage silicon controlled rectifier and thick field device |
| JP3077592B2 (ja) | 1996-06-27 | 2000-08-14 | 日本電気株式会社 | デジタル回路とアナログ回路が混在する半導体集積回路装置およびその製造方法 |
| KR100374737B1 (ko) * | 1996-06-28 | 2003-07-16 | 세이코 엡슨 가부시키가이샤 | 트랜지스터형성방법,그트랜지스터를포함하는회로,액티브매트릭스기판의제조방법,표시장치의제조방법,및프로젝터및전자기기 |
| US7195960B2 (en) * | 1996-06-28 | 2007-03-27 | Seiko Epson Corporation | Thin film transistor, manufacturing method thereof, and circuit and liquid crystal display device using the thin film transistor |
| KR0184158B1 (ko) | 1996-07-13 | 1999-04-15 | 문정환 | 반도체장치의 자기 정합정 금속 배선 형성 방법 |
| US5728612A (en) | 1996-07-19 | 1998-03-17 | Lsi Logic Corporation | Method for forming minimum area structures for sub-micron CMOS ESD protection in integrated circuit structures without extra implant and mask steps, and articles formed thereby |
| JPH1065020A (ja) * | 1996-08-21 | 1998-03-06 | Oki Electric Ind Co Ltd | 半導体装置 |
| US5835986A (en) | 1996-09-06 | 1998-11-10 | Lsi Logic Corporation | Electrostatic discharge (ESD) structure and buffer driver structure for providing ESD and latchup protection for integrated circuit structures in minimized I/O space |
| US5880515A (en) | 1996-09-30 | 1999-03-09 | Lsi Logic Corporation | Circuit isolation utilizing MeV implantation |
| US5821572A (en) | 1996-12-17 | 1998-10-13 | Symbios, Inc. | Simple BICMOS process for creation of low trigger voltage SCR and zener diode pad protection |
| US5963801A (en) | 1996-12-19 | 1999-10-05 | Lsi Logic Corporation | Method of forming retrograde well structures and punch-through barriers using low energy implants |
| US5858828A (en) | 1997-02-18 | 1999-01-12 | Symbios, Inc. | Use of MEV implantation to form vertically modulated N+ buried layer in an NPN bipolar transistor |
| SE512813C2 (sv) * | 1997-05-23 | 2000-05-15 | Ericsson Telefon Ab L M | Förfarande för framställning av en integrerad krets innefattande en dislokationsfri kollektorplugg förbunden med en begravd kollektor i en halvledarkomponent, som är omgiven av en dislokationsfri trench samt integrerad krets framställd enligt förfarandet |
| JP3003632B2 (ja) * | 1997-06-27 | 2000-01-31 | 日本電気株式会社 | 半導体集積回路およびその製造方法 |
| JP3528554B2 (ja) * | 1997-12-04 | 2004-05-17 | セイコーエプソン株式会社 | 半導体装置 |
| US6165821A (en) | 1998-02-09 | 2000-12-26 | International Rectifier Corp. | P channel radhard device with boron diffused P-type polysilicon gate |
| US6137142A (en) | 1998-02-24 | 2000-10-24 | Sun Microsystems, Inc. | MOS device structure and method for reducing PN junction leakage |
| US6136672A (en) | 1998-04-17 | 2000-10-24 | Lucent Technologies Inc. | Process for device fabrication using a high-energy boron implant |
| DE19821726C1 (de) * | 1998-05-14 | 1999-09-09 | Texas Instruments Deutschland | Ingegrierte CMOS-Schaltung für die Verwendung bei hohen Frequenzen |
| US6455893B1 (en) * | 1998-06-26 | 2002-09-24 | Elmos Semiconductor Ag | MOS transistor with high voltage sustaining capability and low on-state resistance |
| US5985705A (en) | 1998-06-30 | 1999-11-16 | Lsi Logic Corporation | Low threshold voltage MOS transistor and method of manufacture |
| TW417307B (en) * | 1998-09-23 | 2001-01-01 | Koninkl Philips Electronics Nv | Semiconductor device |
| US6211555B1 (en) | 1998-09-29 | 2001-04-03 | Lsi Logic Corporation | Semiconductor device with a pair of transistors having dual work function gate electrodes |
| US6069048A (en) | 1998-09-30 | 2000-05-30 | Lsi Logic Corporation | Reduction of silicon defect induced failures as a result of implants in CMOS and other integrated circuits |
| US6225207B1 (en) | 1998-10-01 | 2001-05-01 | Applied Materials, Inc. | Techniques for triple and quadruple damascene fabrication |
| US6395611B1 (en) | 1998-11-04 | 2002-05-28 | Agere Systems Guardian Corp. | Inductor or low loss interconnect and a method of manufacturing an inductor or low loss interconnect in an integrated circuit |
| US6144076A (en) | 1998-12-08 | 2000-11-07 | Lsi Logic Corporation | Well formation For CMOS devices integrated circuit structures |
| US6232165B1 (en) | 1998-12-09 | 2001-05-15 | Winbond Electronics Corporation | Buried guard rings and method for forming the same |
| KR100275962B1 (ko) | 1998-12-30 | 2001-02-01 | 김영환 | 반도체장치 및 그의 제조방법_ |
| KR100284746B1 (ko) * | 1999-01-15 | 2001-03-15 | 김덕중 | 소스 영역 하부의 바디 저항이 감소된 전력용 디모스 트랜지스터 |
| US6063672A (en) | 1999-02-05 | 2000-05-16 | Lsi Logic Corporation | NMOS electrostatic discharge protection device and method for CMOS integrated circuit |
| US6262472B1 (en) * | 1999-05-17 | 2001-07-17 | National Semiconductor Corporation | Bipolar transistor compatible with CMOS utilizing tilted ion implanted base |
| US6365932B1 (en) * | 1999-08-20 | 2002-04-02 | Denso Corporation | Power MOS transistor |
| DE19946201C1 (de) * | 1999-09-27 | 2000-12-14 | Infineon Technologies Ag | Anordnung zur Spannungspufferung bei dynamischen Speichern in CMOS-Technologie |
| KR100350648B1 (ko) * | 2000-01-17 | 2002-08-28 | 페어차일드코리아반도체 주식회사 | 모스 트랜지스터 및 그 제조 방법 |
| US7575969B2 (en) | 2000-03-02 | 2009-08-18 | Texas Instruments Incorporated | Buried layer and method |
| US6762128B2 (en) | 2000-06-09 | 2004-07-13 | Bae Systems | Apparatus and method for manufacturing a semiconductor circuit |
| US6355960B1 (en) * | 2000-09-18 | 2002-03-12 | Vanguard International Semiconductor Corporation | ESD protection for open drain I/O pad in integrated circuit with parasitic field FET devices |
| US6472715B1 (en) | 2000-09-28 | 2002-10-29 | Lsi Logic Corporation | Reduced soft error rate (SER) construction for integrated circuit structures |
| US6492270B1 (en) | 2001-03-19 | 2002-12-10 | Taiwan Semiconductor Manufacturing Company | Method for forming copper dual damascene |
| JP4236848B2 (ja) * | 2001-03-28 | 2009-03-11 | セイコーインスツル株式会社 | 半導体集積回路装置の製造方法 |
| US20020149067A1 (en) * | 2001-04-12 | 2002-10-17 | Mitros Jozef C. | Isolated high voltage MOS transistor |
| US6770952B2 (en) * | 2001-04-30 | 2004-08-03 | Texas Instruments Incorporated | Integrated process for high voltage and high performance silicon-on-insulator bipolar devices |
| US6909150B2 (en) * | 2001-07-23 | 2005-06-21 | Agere Systems Inc. | Mixed signal integrated circuit with improved isolation |
| US6593621B2 (en) * | 2001-08-23 | 2003-07-15 | Micrel, Inc. | LDMOS field effect transistor with improved ruggedness in narrow curved areas |
| FR2830123A1 (fr) * | 2001-09-26 | 2003-03-28 | St Microelectronics Sa | Peripherie haute tension |
| US6706583B1 (en) | 2001-10-19 | 2004-03-16 | Lsi Logic Corporation | High speed low noise transistor |
| US6521952B1 (en) * | 2001-10-22 | 2003-02-18 | United Microelectronics Corp. | Method of forming a silicon controlled rectifier devices in SOI CMOS process for on-chip ESD protection |
| US6818528B2 (en) | 2001-10-24 | 2004-11-16 | International Business Machines Corporation | Method for multi-depth trench isolation |
| US6657255B2 (en) * | 2001-10-30 | 2003-12-02 | General Semiconductor, Inc. | Trench DMOS device with improved drain contact |
| US6885078B2 (en) | 2001-11-09 | 2005-04-26 | Lsi Logic Corporation | Circuit isolation utilizing MeV implantation |
| US6664608B1 (en) | 2001-11-30 | 2003-12-16 | Sun Microsystems, Inc. | Back-biased MOS device |
| JP2003197792A (ja) * | 2001-12-28 | 2003-07-11 | Sanyo Electric Co Ltd | 半導体装置 |
| JP2003197790A (ja) * | 2001-12-28 | 2003-07-11 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
| US6673635B1 (en) | 2002-06-28 | 2004-01-06 | Advanced Micro Devices, Inc. | Method for alignment mark formation for a shallow trench isolation process |
| US6894328B2 (en) * | 2002-08-13 | 2005-05-17 | Newport Fab, Llc | Self-aligned bipolar transistor having recessed spacers and method for fabricating same |
| FR2845522A1 (fr) * | 2002-10-03 | 2004-04-09 | St Microelectronics Sa | Circuit integre a couche enterree fortement conductrice |
| US6787858B2 (en) * | 2002-10-16 | 2004-09-07 | Freescale Semiconductor, Inc. | Carrier injection protection structure |
| US7067877B2 (en) * | 2003-03-10 | 2006-06-27 | Fuji Electric Device Technology Co., Ltd. | MIS-type semiconductor device |
| US6919598B2 (en) * | 2003-03-10 | 2005-07-19 | Zia Hossain | LDMOS transistor with enhanced termination region for high breakdown voltage with low on-resistance |
| KR100948139B1 (ko) * | 2003-04-09 | 2010-03-18 | 페어차일드코리아반도체 주식회사 | 높은 브레이크다운 전압 및 낮은 온 저항을 위한 다중전류 이동 경로를 갖는 수평형 이중-확산 모스 트랜지스터 |
| US6847065B1 (en) | 2003-04-16 | 2005-01-25 | Raytheon Company | Radiation-hardened transistor fabricated by modified CMOS process |
| US6710416B1 (en) * | 2003-05-16 | 2004-03-23 | Agere Systems Inc. | Split-gate metal-oxide-semiconductor device |
| US6864152B1 (en) | 2003-05-20 | 2005-03-08 | Lsi Logic Corporation | Fabrication of trenches with multiple depths on the same substrate |
| US6940131B2 (en) * | 2003-06-30 | 2005-09-06 | Texas Instruments Incorporated | MOS ESD CDM clamp with integral substrate injection guardring and method for fabrication |
| US6927453B2 (en) * | 2003-09-30 | 2005-08-09 | Agere Systems Inc. | Metal-oxide-semiconductor device including a buried lightly-doped drain region |
| US6924531B2 (en) * | 2003-10-01 | 2005-08-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | LDMOS device with isolation guard rings |
| US7304354B2 (en) | 2004-02-17 | 2007-12-04 | Silicon Space Technology Corp. | Buried guard ring and radiation hardened isolation structures and fabrication methods |
| JP2005353703A (ja) | 2004-06-08 | 2005-12-22 | Nec Compound Semiconductor Devices Ltd | 電界効果型トランジスタ |
| JP5036719B2 (ja) | 2005-10-14 | 2012-09-26 | シリコン・スペース・テクノロジー・コーポレイション | 耐放射線性のあるアイソレーション構造及びその製造方法 |
| WO2008019329A2 (en) | 2006-08-04 | 2008-02-14 | Silicon Space Technology Corporation | Improved radiation immunity of integrated circuits using backside die contact and electrically conductive layers |
-
2004
- 2004-09-27 US US10/951,283 patent/US7304354B2/en not_active Expired - Lifetime
-
2005
- 2005-02-15 EP EP05713574A patent/EP1716591A4/en not_active Withdrawn
- 2005-02-15 WO PCT/US2005/004740 patent/WO2005079400A2/en not_active Ceased
- 2005-02-15 JP JP2006553340A patent/JP2007523481A/ja active Pending
-
2006
- 2006-07-13 US US11/486,347 patent/US7804138B2/en active Active
-
2007
- 2007-12-03 US US11/949,654 patent/US7629654B2/en not_active Expired - Lifetime
- 2007-12-03 US US11/949,708 patent/US8093145B2/en active Active
-
2012
- 2012-01-09 US US13/346,319 patent/US8497195B2/en not_active Expired - Fee Related
- 2012-06-07 JP JP2012129441A patent/JP5607111B2/ja not_active Expired - Lifetime
-
2013
- 2013-07-29 US US13/953,625 patent/US8729640B2/en not_active Expired - Lifetime
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57143843A (en) * | 1981-01-27 | 1982-09-06 | Thomson Csf | Transistor structure and method of producing same |
| JPS61240671A (ja) * | 1985-04-17 | 1986-10-25 | Sony Corp | 相補型電界効果トランジスタの製法 |
| JPS62250671A (ja) * | 1986-04-24 | 1987-10-31 | Agency Of Ind Science & Technol | 半導体装置 |
| JPH01265555A (ja) * | 1988-04-15 | 1989-10-23 | Ricoh Co Ltd | ラッチアップ防止手段をもつ半導体装置 |
| JPH0399464A (ja) * | 1989-09-12 | 1991-04-24 | Mitsubishi Electric Corp | 相補型mos半導体装置 |
| JPH043920A (ja) * | 1990-01-11 | 1992-01-08 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JPH04139758A (ja) * | 1990-10-01 | 1992-05-13 | Toshiba Corp | 半導体装置およびその製造方法 |
| JPH1070272A (ja) * | 1996-06-29 | 1998-03-10 | Hyundai Electron Ind Co Ltd | 半導体装置及びその製造方法 |
| JP2000049237A (ja) * | 1998-07-28 | 2000-02-18 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP2002158293A (ja) * | 2000-11-16 | 2002-05-31 | Sharp Corp | 半導体装置及び携帯電子機器 |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9905640B2 (en) | 2002-09-29 | 2018-02-27 | Skyworks Solutions (Hong Kong) Limited | Isolation structures for semiconductor devices including trenches containing conductive material |
| US10074716B2 (en) | 2002-09-29 | 2018-09-11 | Skyworks Solutions (Hong Kong) Limited | Saucer-shaped isolation structures for semiconductor devices |
| JP2007115998A (ja) * | 2005-10-21 | 2007-05-10 | Seiko Epson Corp | 半導体装置 |
| JP2016167613A (ja) * | 2007-03-28 | 2016-09-15 | アドバンスト・アナロジック・テクノロジーズ・インコーポレイテッドAdvanced Analogic Technologies Incorporated | 絶縁分離された集積回路装置 |
| JP2009158934A (ja) * | 2007-12-04 | 2009-07-16 | Nec Electronics Corp | 半導体集積装置とその製造方法 |
| JP2016164989A (ja) * | 2008-02-14 | 2016-09-08 | アドバンスト・アナロジック・テクノロジーズ・インコーポレイテッドAdvanced Analogic Technologies Incorporated | 分離されたcmosおよびバイポーラトランジスタ、それらのための分離構造、ならびにその作製方法 |
| JP2011238760A (ja) * | 2010-05-10 | 2011-11-24 | Denso Corp | 半導体装置 |
| JP2013033917A (ja) * | 2011-07-05 | 2013-02-14 | Denso Corp | 半導体装置 |
| JP2014170831A (ja) * | 2013-03-04 | 2014-09-18 | Seiko Epson Corp | 回路装置及び電子機器 |
| US11037927B2 (en) | 2013-03-04 | 2021-06-15 | Seiko Epson Corporation | Circuit device and electronic apparatus |
| JP2014146833A (ja) * | 2014-04-09 | 2014-08-14 | Denso Corp | 半導体装置 |
| JP2017139503A (ja) * | 2017-05-18 | 2017-08-10 | セイコーエプソン株式会社 | 回路装置及び電子機器 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20050179093A1 (en) | 2005-08-18 |
| US8497195B2 (en) | 2013-07-30 |
| US7804138B2 (en) | 2010-09-28 |
| US7304354B2 (en) | 2007-12-04 |
| US20080188045A1 (en) | 2008-08-07 |
| US8093145B2 (en) | 2012-01-10 |
| US20080073725A1 (en) | 2008-03-27 |
| US20130313620A1 (en) | 2013-11-28 |
| EP1716591A2 (en) | 2006-11-02 |
| US20060249759A1 (en) | 2006-11-09 |
| WO2005079400A3 (en) | 2005-12-15 |
| WO2005079400A2 (en) | 2005-09-01 |
| EP1716591A4 (en) | 2010-10-20 |
| JP2012195604A (ja) | 2012-10-11 |
| US8729640B2 (en) | 2014-05-20 |
| US7629654B2 (en) | 2009-12-08 |
| US20120108045A1 (en) | 2012-05-03 |
| JP5607111B2 (ja) | 2014-10-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5607111B2 (ja) | 埋め込みガードリング及び耐放射線性分離構造並びにその製造方法 | |
| US8252642B2 (en) | Fabrication methods for radiation hardened isolation structures | |
| US20080142899A1 (en) | Radiation immunity of integrated circuits using backside die contact and electrically conductive layers | |
| US10615260B1 (en) | Method for forming FinFET device structure | |
| US8536648B2 (en) | Drain extended field effect transistors and methods of formation thereof | |
| US11587822B2 (en) | Structures for improving radiation hardness and eliminating latch-up in integrated circuits | |
| CN105556667A (zh) | 用于高hbm esd保护能力的横向二极管和垂直scr混合结构 | |
| CN101326640A (zh) | 软差错率为零的cmos器件 | |
| US8598625B2 (en) | ESD protection device with tunable design windows | |
| CN113594256A (zh) | 一种高压抗单粒子辐照的psoi ldmos器件结构 | |
| US20030205765A1 (en) | Semiconductor device and method for manufacturing the same | |
| US20070170517A1 (en) | CMOS devices adapted to reduce latchup and methods of manufacturing the same | |
| Wu et al. | Single event transient analysis of isolation problems for the high side devices in a 0.18 μm BCD Process | |
| Puchner et al. | An advanced well structure to improve latch-up immunity for CMOS technology | |
| KR20100001856A (ko) | 정전기 방전 회로 및 그의 형성방법 | |
| KR19980078231A (ko) | 상보형 전계효과 트랜지스터 및 그의 웰 형성방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080214 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20080214 |
|
| RD01 | Notification of change of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7426 Effective date: 20080916 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20080916 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20101015 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20101026 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20110126 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20110202 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20110224 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20110303 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20110323 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20110330 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110425 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110621 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20110912 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20110920 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20111020 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20111027 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20111116 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20111124 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20111221 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20120207 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120607 |
|
| A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20120614 |
|
| A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20120706 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20121128 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20121203 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20121228 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20130108 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20130128 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20130131 |