JP5036719B2 - 耐放射線性のあるアイソレーション構造及びその製造方法 - Google Patents
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Description
Claims (17)
- 半導体デバイスであって、
上面及び底面を有し、第1の導電型を有する基板と、
前記基板の前記上面に近接して形成された複数のトランジスタであって、前記複数のトランジスタは、前記第1の導電型を有する第1のウェルに配置された第1トランジスタと、前記第1の導電型とは異なる第2の導電型を有する第2のウェルに配置された第2トランジスタとを含む、該複数のトランジスタと、
イオン注入によって前記第1及び第2のウェルの下方にそれらから垂直に離隔して形成され、かつ前記複数のトランジスタの下方でかつ前記第1及び第2のウェルの少なくとも一部分の下方において連続的に延在するようにして形成された、前記第1の導電型を有し、かつ不純物濃度が前記基板の不純物濃度よりも高い埋め込み層と、
前記埋め込み層からデバイスパッケージのコンタクトへ電流を伝導するように構成された、前記基板の前記底面の導電性面とを含み、
前記埋め込み層と前記底面の導電性面との間に前記基板の一部分があることを特徴とする半導体デバイス。 - 前記基板の抵抗率が、20Ω・cm未満であることを特徴とする請求項1に記載の半導体デバイス。
- 前記基板が、前記第1の導電型を有するバルクシリコンウェハから形成されることを特徴とする請求項1に記載の半導体デバイス。
- 前記基板の前記上面の上に形成されたエピタキシャル層をさらに含み、
前記複数のトランジスタが、前記エピタキシャル層内に形成された複数のソース領域及びドレイン領域をさらに含むことを特徴とする請求項1に記載の半導体デバイス。 - 前記エピタキシャル層が、前記第1の導電型を有していることを特徴とする請求項4に記載の半導体デバイス。
- 前記エピタキシャル層の不純物濃度が、前記基板の前記不純物濃度よりも低いことを特徴とする請求項4に記載の半導体デバイス。
- 前記複数のトランジスタのうちの少なくとも1つが電界効果トランジスタであり、
前記電界効果トランジスタが、
第1の幅を有するソース領域と、
第2の幅を有するドレイン領域と、
前記ソース領域及び前記ドレイン領域の間に配置されたチャネル領域とを備え、
前記チャネル領域が、或るチャネル長さを有し、かつ前記第1の幅及び前記第2の幅のそれぞれよりも広い幅の第3の幅を有し、それにより、少なくとも1つのチャネル拡張部を形成し、
前記少なくとも1つのチャネル拡張部が、前記ソース領域及び前記ドレイン領域の間で、前記チャネル長さよりも長い、ネットチャネルエッジ長さを有することを特徴とする請求項1に記載の半導体デバイス。 - 前記少なくとも1つのチャネル拡張部が、
前記ソース領域及び前記ドレイン領域から離隔して、前記少なくとも1つのチャネル拡張部の長さ方向に沿って配置されたチャネル拡張部不純物領域をさらに含み、
前記チャネル拡張部不純物領域が、少なくとも1つの前記ソース領域及び前記ドレイン領域の深さよりも深い深さまで延在していることを特徴とする請求項7に記載の半導体デバイス。 - 前記埋め込み層が、少なくとも、前記第1及び第2のウェル内に配置された各トランジスタの活性化デバイス領域の下に延在していることを特徴とする請求項1に記載の半導体デバイス。
- 前記埋め込み層が、前記第2のウェルのカウンタードーピングを回避するために十分に前記第2のウェルから下方に離隔して設けられることを特徴とする請求項1に記載の半導体デバイス。
- 上面及び底面を有し、第1の導電型を有するウェハを供給するステップと、
前記ウェハへイオンを注入して、前記第1の導電型を有し、かつ不純物濃度が前記ウェハの不純物濃度よりも高い埋め込み層を、前記ウェハ内に連続的に形成するステップと、
前記第1の導電型を有する第1のウェル及び前記第1の導電型とは異なる第2の導電型を有する第2のウェルを形成するステップと、
前記ウェハの前記上面に近接して複数のトランジスタを形成するステップであって、前記複数のトランジスタは、前記第1の導電型を有する前記第1のウェルに配置された第1トランジスタと、前記第1の導電型とは異なる前記第2の導電型を有する前記第2のウェルに配置された第2トランジスタとを含み、前記埋め込み層が、前記第1及び第2のウェルの下方にそれらから垂直に離隔し、かつ前記複数のトランジスタの下方でかつ前記第1及び第2のウェルの少なくとも一部分の下方において延在する、該ステップと、
前記ウェハの前記底面に導電性層を形成するステップとを含み、
前記埋め込み層が、該埋め込み層と前記底面との間に前記ウェハの一部分があるように構成されており、
前記導電性層が、前記埋め込み層からデバイスパッケージのコンタクトへ電流を伝導するように構成されていることを特徴とする方法。 - 前記ウェハの抵抗率が、20Ω・cm未満であることを特徴とする請求項11に記載の方法。
- 前記ウェハが、
基板と、
前記基板上に形成された半導体のエピタキシャル層とを含むことを特徴とする請求項11に記載の方法。 - 前記複数のトランジスタを形成するステップが、
第1のウェル領域内に、第1の幅を有するソース領域を形成するステップと、
前記第1のウェル領域内に、第2の幅を有するドレイン領域を形成するステップと、
前記第1のウェル領域内にチャネル領域を形成するステップとをさらに含み、
前記チャネル領域が、前記ソース領域及び前記ドレイン領域の間に配置され、
前記チャネル領域が、或るチャネル長さを有し、前記第1の幅及び前記第2の幅のそれぞれよりも広い幅の第3の幅を有し、それによって、少なくとも1つのチャネル拡張部を形成し、
前記少なくとも1つのチャネル拡張部が、前記ソース領域及び前記ドレイン領域の間で、前記チャネル長さよりも長い、ネットチャネルエッジ長さを有していることを特徴とする請求項11に記載の方法。 - 前記チャネル領域を形成するステップが、
前記ソース領域及びドレイン領域から離隔して、前記少なくとも1つのチャネル拡張部の長さ方向に沿って配置されるようにチャネル拡張部不純物領域を形成するために、イオンを注入するステップをさらに含むことを特徴とする請求項14に記載の方法。 - 前記チャネル拡張部不純物領域が、前記ソース領域及び前記ドレイン領域の少なくとも1つの深さよりも深い深さまで延在することを特徴とする請求項15に記載の方法。
- 前記チャネル拡張部不純物領域が、前記ウェハの前記不純物濃度よりも高い不純物濃度を有することを特徴とする請求項15に記載の方法。
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US11/581,561 | 2006-10-16 | ||
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US20100267212A1 (en) | 2010-10-21 |
US8252642B2 (en) | 2012-08-28 |
EP1949425A4 (en) | 2010-08-18 |
WO2007061531A3 (en) | 2009-04-30 |
US20130059421A1 (en) | 2013-03-07 |
US8278719B2 (en) | 2012-10-02 |
US20070141794A1 (en) | 2007-06-21 |
JP2009516361A (ja) | 2009-04-16 |
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