JP2005252078A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP2005252078A JP2005252078A JP2004062323A JP2004062323A JP2005252078A JP 2005252078 A JP2005252078 A JP 2005252078A JP 2004062323 A JP2004062323 A JP 2004062323A JP 2004062323 A JP2004062323 A JP 2004062323A JP 2005252078 A JP2005252078 A JP 2005252078A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 41
- 238000005520 cutting process Methods 0.000 claims abstract description 66
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- 229910052782 aluminium Inorganic materials 0.000 description 1
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Abstract
【解決手段】 本発明は、ガラス基板14が貼り合された半導体ウェハ10を、ダイシング領域60に沿ってブレードを移動させながら切削する工程を含む半導体装置の製造方法であって、以下の特徴を有する。即ち、半導体ウェハ10上のダイシング領域60の両側に、互いに対向する1対のアラインメントマーク51a,51bを形成する。そして、切削工程において、ダイシング領域60の中心、即ちセンターライン61に回転ブレードの位置を合わせる際、アラインメントマーク51a,51bの位置を認識カメラにより検出し、その検出結果に基づいてセンターライン61を求め、当該センターライン61上に回転ブレードの位置を合わせて切削を行うものである。
【選択図】 図1
Description
04bの間に、半導体チップ101が樹脂105a、105bを介して封止されている。第2のガラス基板104bの一主面上、即ちBGA型の半導体装置100の裏面上には、ボール状の端子(以下、導電端子111と称す)が格子状に複数配置されている。この導電端子111は、第2の配線109を介して半導体チップ101へと接続される。複数の第2の配線109には、それぞれ半導体チップ101の内部から引き出されたアルミニウム配線が接続されており、各導電端子111と半導体チップ101との電気的接続がなされている。
9と接続されている。この第2の配線109は、第1の配線103の一端から第2のガラス基板104bの表面に延在している。そして、第2のガラス基板104b上に延在した第2の配線109上には、ボール状の導電端子111が形成されている。
4bが接着された半導体ウェハをダイシングラインに沿って個々の半導体チップに分割する際、切削のためのダイシングブレードを、ダイシングラインの中心に位置合せする。しかしながら、従来より、そのような位置合せを正確に行うことは困難であった。その結果ダイシングの際の切削精度が低下するという問題が生じていた。
ットエッチング(もしくはディップエッチング)を行う。
ータとのずれ量を補正して算出される)に基づいて決定される。もしくは、センターライン61,62の位置は、1本のダイシング領域60上の複数箇所におけるアラインメントマークの位置の平均値を取った検出結果(予め不図示の記憶手段が持っている初期値データとのずれ量を補正して算出される)に基づいて決定される。
20を形成する。ここで、例えば、半導体ウェハ10の裏面を上方に向けた後、有機樹脂の回転塗布により、切削溝40内を含む半導体ウェハ10の裏面全体に、当該有機樹脂を行きわたらせる。これにより、切削溝40内に露出する全ての層、即ち、第2の絶縁膜16、半導体ウェハ10、第1の絶縁膜12、樹脂15及びガラス基板14の露出面が保護膜20によって覆われる。
12 第1の絶縁膜 14 ガラス基板 15 樹脂
16 第2の絶縁膜 17 緩衝部材
18,18a,18b 第2の配線 8a,8b 端部
19 メッキ膜 20 保護膜 21 導電端子
30 ウィンドウ 40 切削溝
51a,51b,52a,52c アラインメントマーク
60 ダイシング領域 61,62 センターライン
Claims (9)
- 半導体ウェハの表面に画定されたダイシング領域に沿って1対のパッドが配置され、かつ前記半導体ウェハの表面に支持体が貼り付けられて成る積層体を、前記ダイシング領域に沿ってブレードを移動させながら、前記半導体ウェハの表面から前記支持体の厚さ方向の途中まで達するように切削して、当該積層体に切削溝を形成する半導体装置の製造方法であって、
前記半導体ウェハの裏面における前記ダイシング領域の両側に、当該ダイシング領域を挟むようにして互いに対向する1対のアラインメントマークを形成し、当該1対のアラインメントマークの位置を認識手段により検出し、当該検出結果に基づいて前記ダイシング領域のセンターラインを求め、当該センターライン上にブレードの位置を合わせて切削を行うことを特徴とする半導体装置の製造方法。 - 前記切削溝を形成した後の工程において、
前記1対のアラインメントマークの位置を認識手段により検出し、当該検出結果に基づいて前記ダイシング領域のセンターラインを求め、当該センターライン上にブレードの位置を合わせて、前記半導体ウェハの表面から切削を行うことにより、前記積層体を個々の半導体チップに分離することを特徴とする請求項1記載の半導体装置の製造方法。 - 前記半導体ウェハの裏面において前記1対のパッドに対応する位置に限り、当該1対のパッドを露出し得るように開口されたウィンドウが形成されていることを特徴とする請求項1または請求項2に記載の半導体装置の製造方法。
- 前記アラインメントマークは、半導体装置の製造工程で用いられる材料により形成されることを特徴とする請求項1,2,3のうちいずれか1項に記載の半導体装置の製造方法。
- 前記アラインメントマークは、エッチングによって形成される窪みであることを特徴とする請求項1,2,3のうちいずれか1項に記載の半導体装置の製造方法。
- 半導体チップの表面に画定されたダイシング領域に沿って配置されたパッドと、
前記半導体チップの表面に貼り付けられた支持体と、
前記半導体チップの裏面における前記ダイシング領域に沿って形成されたアラインメントマークと、を有することを特徴とする半導体装置。 - 前記半導体チップの裏面において前記パッドに対応する位置に限り、当該半導体チップを開口するウィンドウが形成されていることを特徴とする請求項6記載の半導体装置。
- 前記アラインメントマークは、半導体装置の製造工程で用いられる材料により形成されることを特徴とする請求項6または請求項7に記載の半導体装置。
- 前記アラインメントマークは、エッチングによって形成される窪みであることを特徴とする請求項6,7,8のうちいずれか1項に記載の半導体装置。
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US11/069,061 US7456083B2 (en) | 2004-03-05 | 2005-03-02 | Semiconductor device and manufacturing method of the same |
CNB2005100530225A CN100446187C (zh) | 2004-03-05 | 2005-03-04 | 半导体装置及其制造方法 |
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Also Published As
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US7456083B2 (en) | 2008-11-25 |
KR100682003B1 (ko) | 2007-02-15 |
EP1575086A3 (en) | 2006-06-14 |
CN100446187C (zh) | 2008-12-24 |
JP4753170B2 (ja) | 2011-08-24 |
TW200535941A (en) | 2005-11-01 |
TWI288956B (en) | 2007-10-21 |
CN1664991A (zh) | 2005-09-07 |
US20050208735A1 (en) | 2005-09-22 |
KR20060043788A (ko) | 2006-05-15 |
SG114787A1 (en) | 2005-09-28 |
EP1575086A2 (en) | 2005-09-14 |
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