JP2005026711A - 埋設導電層を備えた高電圧トランジスタ - Google Patents
埋設導電層を備えた高電圧トランジスタ Download PDFInfo
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- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 5
- 229910052796 boron Inorganic materials 0.000 claims description 5
- 238000002513 implantation Methods 0.000 claims description 3
- 238000009792 diffusion process Methods 0.000 abstract description 41
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- 230000015556 catabolic process Effects 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
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- 230000000593 degrading effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
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- 230000003071 parasitic effect Effects 0.000 description 1
- 230000035945 sensitivity Effects 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
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Abstract
【解決手段】P−型基板に形成されたN−ウエル内にP−型埋設層領域を設け、これをN−ウエル領域に形成された第1のP−型ドレイン拡散領域によってドレイン電極に接続すると共に、PMOSゲート領域の一端で表面から下方に延びる第2のP−型ドレイン拡散領域にも接続し、ソース電極に接続されるP−型ソース拡散領域でゲート領域の他端を定めるようにする。
【選択図】図1
Description
12 N−型ウエル領域
14、14a〜14c P−型埋設領域
16 P−型拡散領域
17 P−型拡散領域
18 P+ドレイン拡散領域
19 N+ソース拡散領域
20 N+拡散領域
22 ゲート
23 ポリシリコン電界板部材
28 ドレイン電極
29 ソース電極
30 ゲート絶縁層
31 IGEFTチャンネル領域
52 N−ウエル
69 P+領域
70 N+領域
74 埋設層
80 ゲート酸化物領域
Claims (22)
- 第1の導電型の基板に高電圧トランジスタを製造する方法であって、
基板に第2の導電型のウエル領域を形成する段階と、
ウエル領域に第1の導電型の第1および第2のドレイン領域を形成し、第1のドレイン領域を第2のドレイン領域から隔置する段階と、
第1のドレイン領域から分離されたウエル領域に第1の導電型のソース領域を形成する段階と、
第1の導電型のドーパントをウエル領域に打ち込み、第1および第2のドレイン領域に接続された第1の埋設層を形成する段階と、
ソース領域から第1のドレイン領域に延びる絶縁ゲートを形成する段階と、
を含む前記方法。 - 請求項1記載の方法であって、第1の導電型は、P型であり、第2の導電型は、N型である前記方法。
- 請求項2記載の方法であって、ドーパントは、ホウ素である前記方法。
- 請求項1記載の方法であって、さらに、
1またはそれ以上の追加の埋設層を形成する段階を含み、1またはそれ以上の追加の埋設層は、それぞれ第1の埋設層と平行に配置され、かつ、ウエル領域内で異なる深さで配置される前記方法。 - 請求項4記載の方法であって、1またはそれ以上の追加の埋設層は、それぞれ第1および第2のドレイン領域に接続される前記方法。
- 高電圧トランジスタを製造する方法であって、
第1の導電型の第1および第2のドレイン領域を第2の導電型の基板に形成し、第1のドレイン領域を第2のドレイン領域から隔置する段階と、
第1の導電型のソース領域を基板に形成し、ソース領域を第1のドレイン領域から隔置する段階と、
第1の導電型のドーパントを基板に打ち込み、第1および第2のドレイン領域に接続された埋設層を形成する段階と、
ソース領域から第1のドレイン領域に延びる絶縁ゲートを形成する段階と、
を含む前記方法。 - 請求項6記載の方法であって、さらに、ソース領域および第2のドレイン領域にそれぞれ接続されたソース電極およびドレイン電極を形成する段階を含む前記方法。
- 請求項7記載の方法であって、ソース電極は、絶縁ゲートを覆って延びる部分を含む前記方法。
- 請求項6記載の方法であって、第1の導電型は、P型であり、第2の導電型は、N型である前記方法。
- 請求項6記載の方法であって、さらに、
1またはそれ以上の追加の埋設層を形成する段階を含み、1またはそれ以上の追加の埋設層は、それぞれ埋設層と平行に配置され、かつ、ウエル領域内で異なる深さで配置される前記方法。 - 請求項10記載の方法であって、1またはそれ以上の追加の埋設層は、それぞれ、第1および第2のドレイン領域に接続される前記方法。
- 請求項6記載の方法であって、第1のドレイン領域は、ソース領域と第2のドレイン領域の間に配置される前記方法。
- 第1の導電型の基板に高電圧電界効果トランジスタ(HVEFT)を製造する方法において、
基板に第1の導電型と反対の第2の導電型のウエルを形成する段階と、
第1の導電型のドーパントをウエルに打ち込み、ウエル内に第1の導電型の横方向に延びた埋設層領域を形成する段階と、
ウエルの上方に絶縁ゲートを形成する段階と、
ウエル領域で隔置された第1の導電型の第1のドレイン領域と第1の導電型のソース領域を形成する段階と、
第1のドレイン領域と隔置され、かつ、第1のドレイン領域とソース領域の間に位置する第1の導電型の第2のドレイン領域を形成し、ソース領域と第2のドレイン領域との間で絶縁ゲートの下方にチャンネル領域をウエルに定める段階と、
を含み、第1および第2のドレイン領域は、ウエルを通って垂直方向下方に延び埋設層領域と接触し、埋設層領域は、HVEFTがオン状態にあるとき電流が横方向に流れるように導通路を与える前記方法。 - 請求項13記載の方法において、第1の導電型は、P−型であり、ドーパントは、ホウ素からなる前記方法。
- 請求項13記載の方法において、埋設層領域は、ウエル内で異なる深さに配置された複数の並列の隔置された埋設層を含む前記方法。
- 請求項13記載の方法において、ウエル内に埋設層領域を形成するためにドーパントを打ち込むことにより、基板に配置された相補型HVEFTの第1の導電型の他の埋設層領域をも形成する前記方法。
- 請求項13記載の方法において、さらに、
第1のドレイン領域に接続されたソース電極を形成する段階と、
ソース領域に接続されたドレイン電極を形成する段階と、
を含む前記方法。 - 請求項13記載の方法において、第1の導電型は、P−型であり、第2の導電型は、N−型であり、第1のドレイン領域を形成する段階は、さらに、
ドレイン電極に接続されたP+領域を形成する段階と、
P+領域から埋設層領域に下方に延びる追加のP−型領域を形成する段階とを含む前記方法。 - 第1の導電型の基板に相補型高電圧電界効果トランジスタ(HVFET)を製造する方法であって、
第1の導電型と反対の第2の導電型の第1および第2のウエル領域を基板に形成する段階と、
第1および第2の横方向に延びる埋設層領域を第1および第2のウエル領域内にそれぞれ形成するために第1および第2のウエル領域に第1の導電型のドーパントを打ち込む段階と、
第1のウエル領域の上方に第1の絶縁ゲートを形成し、基板の上方で第2のウエル領域に近接して第2の絶縁ゲートを形成する段階と、
第1のウエル領域で隔置された第1の導電型の第1のドレイン領域および第1のソース領域を形成し、第1のドレイン領域および第1のソース領域は、第1のHVFETに関連する段階と、
第1のドレイン領域から隔置され、かつ、第1のドレイン領域と第1のソース領域との間に位置して第1のウエル領域に第1の導電型の追加のドレイン領域を形成し、第1の絶縁ゲートの下方に追加のドレイン領域と第1のソース領域との間で第1のウエル領域に第1のチャンネル領域を定める段階と、
第2のウエル領域に第2の導電型の第2のドレイン領域を形成し、かつ、第2のウエル領域から隔置された第2の導電型の第2のソース領域を形成し、第2のドレイン領域および第2のソース領域は、第2のHVFETと関連し、第2の絶縁ゲートの下方で第2のソース領域と第2のウエル領域との間で第2のチャンネル領域が定められる段階とを含み、
第1のドレイン領域および追加のドレイン領域は、第1のウエル領域を通って垂直方向下方に延びて第1の横方向に延びた埋設層領域に接続され、第1のHVFETがオン状態のときに第1の横方向に延びた埋設層領域によって電流が横方向に流れるように導電路が与えられ、第2のHVFETがオン状態のときに第2の横方向に延びた埋設層領域によって対応するJFET導通路が第2のウエル領域に定められる前記方法。 - 請求項19記載の方法において、第1の導電型は、P−型であり、ドーパントは、ホウ素からなる前記方法。
- 請求項19記載の方法において、第1および第2の横方向に延びた埋設層領域は、それぞれ第1および第2のウエル領域内の異なる深さに配置された複数の平行な隔置された埋設層領域を含む前記方法。
- 請求項19記載の方法において、第1および第2の横方向に延びた埋設層領域は、打ち込みによって同時に形成される前記方法。
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Also Published As
Publication number | Publication date |
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US20020153561A1 (en) | 2002-10-24 |
JP4663028B2 (ja) | 2011-03-30 |
JP4512460B2 (ja) | 2010-07-28 |
EP1227523A3 (en) | 2008-07-09 |
EP1524701A2 (en) | 2005-04-20 |
EP1524701A3 (en) | 2008-07-09 |
US20020149052A1 (en) | 2002-10-17 |
US6818490B2 (en) | 2004-11-16 |
JP2005026710A (ja) | 2005-01-27 |
US6563171B2 (en) | 2003-05-13 |
US6504209B2 (en) | 2003-01-07 |
JP2006019759A (ja) | 2006-01-19 |
EP1521298A2 (en) | 2005-04-06 |
JP2002319675A (ja) | 2002-10-31 |
US6501130B2 (en) | 2002-12-31 |
JP2010103557A (ja) | 2010-05-06 |
US20030178646A1 (en) | 2003-09-25 |
US20020153560A1 (en) | 2002-10-24 |
US6465291B1 (en) | 2002-10-15 |
US6730585B2 (en) | 2004-05-04 |
US6424007B1 (en) | 2002-07-23 |
EP1521298A3 (en) | 2008-07-09 |
JP4512534B2 (ja) | 2010-07-28 |
US20030062548A1 (en) | 2003-04-03 |
EP1227523A2 (en) | 2002-07-31 |
JP4512459B2 (ja) | 2010-07-28 |
US20040036115A1 (en) | 2004-02-26 |
US20020096691A1 (en) | 2002-07-25 |
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