JP4928947B2 - 超接合デバイスの製造方法 - Google Patents
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Description
本発明は、また、そのような部分的に製造された半導体デバイスの形成方法と、この方法から形成される半導体からなる。
Claims (11)
- 半導体デバイスの製造方法であって、
相互に対向する第1主表面と第2主表面とを有する半導体基板を設け、この半導体基板は、その第2主表面に、第1導電型の強くドープされた領域と、その第1主表面に上記第1導電型の軽くドープされた領域とを有し、
第1導電型の軽くドープされた領域の露出面を酸化し、
複数個の第1溝と、少なくとも1つの第2溝と、台地とを半導体基板内に設け、各第1溝は、強くドープされた領域に向け第1主表面から第1深さ位置まで伸びる第1延長部分を有し、少なくとも1つの第2溝は、強くドープされた領域に向け、第1表面から第2深さ位置まで伸びる第2延長部分を有し、各台地は側壁面を備え、複数個の第1溝の各々と少なくとも1つの第2溝とは、隣接する溝から台地の1つにより離されており、少なくとも1つの第2溝は、複数個の第1溝の各々より深くて、広く、少なくとも1つの第2溝は、作動領域と端子領域との間の境界に位置し、作動領域とは、その上に半導体デバイスが形成される領域であって、端子領域とは、作動デバイスのセル同士間を遮断するものであり、
化学蒸着法(CVD)工程を行って、複数個の第1溝の各々の頂部と、少なくとも1つの第2溝の頂部とを酸化物でシールし、複数個の第1溝の各々と、少なくとも1つの第2溝とに空洞を生じさせて、各台地の頂部を被覆し、
フォトレジスト、窒化物、金属およびポリシリコンを含むグループから選ばれた材料の層を、縁部端子領域上と、作動領域と縁部端子領域との境界の第2溝上の1部分とに沈着させ、
乾式酸化物エッチング工程を行い、複数個の第1溝と少なくとも1つの第2溝上との酸化物を除去し、
湿式酸化物エッチング工程を行い、CVD工程後、複数個の第1溝と少なくとも1つの第2溝内に残存している酸化物および、最初の酸化で残存している台地上の酸化物を除去し、フォトレジスト、窒化物、金属ないしポリシリコン材料の庇部分を、作動領域と端子領域との間の境界の少なくとも1つの第2溝上に形成し、
複数個の第1溝の隣接対のもの同士間の半導体基板の少なくとも1つの台地に、1つの溝の側壁面で、第1導電型のドーパントを打込み、上記の1つの溝の側壁面に、強くドープされた領域よりも低いドープ濃度を有する第1導電型の第1ドープ領域を形成し、上記庇部分は、作動領域と端子領域との間の境界の少なくとも1つの第2溝の底部にドーパントが打込まれることを阻止し、
第1導電型のドーパントを打込んだ側壁に対向する側壁面で、少なくとも1つの台地に第2導電型のドーパントを打込んで、第1導電型のドーパントを打込んだ側壁に対向する側壁面に第2導電型の第2ドープ領域を設け、
上記複数個の第1溝に遮断材料を再充填し、
デバイスの表面を平坦化すること。 - 請求項1に記載した半導体デバイスの製造方法であって、
更に、生じた構造体に超接合デバイスを形成することからなるもの。 - 請求項1に記載した半導体デバイスの製造方法であって、
更に、第2ドープ領域と電気的に接続する、第2導電型の第3ド−プ領域を、第1および第2ドープ領域の第1主表面に設け、
第1導電型の第4ドープ領域を、この領域が、第3ドープ領域を介在させて、第1ドープ領域に対向するよう、上記の1つの溝の第1主表面あるいは側壁面に設け、
第3ドープ領域の上方、第1ドープ領域と第4ドープ領域との間に、ゲート遮断層を介在させてゲート電極層を設けることからなるもの。 - 請求項3に記載した半導体デバイスの製造方法であって、ゲート電極層を少なくとも1つの溝に形成することからなるもの。
- 請求項3に記載した半導体デバイスの製造方法であって、ゲート電極層を第1主表面上に形成することからなるもの。
- 請求項1に記載した半導体デバイスの製造方法であって、
更に第2ドープ領域に電気的に接続する第2導電型の第3ドープ領域を第1および第2ド−プ領域の第1主表面に設けることからなるもの。 - 請求項1に記載した半導体デバイスの製造方法であって、
更に、電極層を第1ドープ領域にショトキー接触させることからなるもの。 - 請求項1に記載した半導体デバイスの製造方法において、各台地の側壁面が第1主表面に対し、所定の傾斜角度を維持するもの。
- 請求項1に記載した半導体デバイスの製造方法であって、上記のシールが、複数個の第1溝および少なくとも1つの第2溝に如何なる物質も沈着させないもの。
- 請求項1に記載した半導体デバイスの製造方法であって、第1導電型のドーパントが第1所定打込み角度で打込まれるもの。
- 請求項1に記載した半導体デバイスの製造方法であって、第2導電型のドーパントが第2所定打込み角度で打込まれるもの
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PCT/US2004/042014 WO2005065179A2 (en) | 2003-12-19 | 2004-12-15 | Method of manufacturing a superjunction device |
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EP1706899A4 (en) * | 2003-12-19 | 2008-11-26 | Third Dimension 3D Sc Inc | PLANARIZATION PROCESS FOR MANUFACTURING SUPERJUNCTION DEVICE |
US6982193B2 (en) * | 2004-05-10 | 2006-01-03 | Semiconductor Components Industries, L.L.C. | Method of forming a super-junction semiconductor device |
US7423315B2 (en) * | 2004-11-05 | 2008-09-09 | Kabushiki Kaisha Toshiba | Semiconductor device and method for manufacturing the same |
TWI401749B (zh) * | 2004-12-27 | 2013-07-11 | Third Dimension 3D Sc Inc | 用於高電壓超接面終止之方法 |
US7439583B2 (en) * | 2004-12-27 | 2008-10-21 | Third Dimension (3D) Semiconductor, Inc. | Tungsten plug drain extension |
WO2006116219A1 (en) * | 2005-04-22 | 2006-11-02 | Icemos Technology Corporation | Superjunction device having oxide lined trenches and method for manufacturing a superjunction device having oxide lined trenches |
US7446018B2 (en) | 2005-08-22 | 2008-11-04 | Icemos Technology Corporation | Bonded-wafer superjunction semiconductor device |
JP5015488B2 (ja) * | 2005-09-07 | 2012-08-29 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7659588B2 (en) * | 2006-01-26 | 2010-02-09 | Siliconix Technology C. V. | Termination for a superjunction device |
US7491618B2 (en) * | 2006-01-26 | 2009-02-17 | International Business Machines Corporation | Methods and semiconductor structures for latch-up suppression using a conductive region |
US8564057B1 (en) | 2007-01-09 | 2013-10-22 | Maxpower Semiconductor, Inc. | Power devices, structures, components, and methods using lateral drift, fixed net charge, and shield |
KR20090116702A (ko) * | 2007-01-09 | 2009-11-11 | 맥스파워 세미컨덕터 인크. | 반도체 디바이스 |
US7948033B2 (en) | 2007-02-06 | 2011-05-24 | Semiconductor Components Industries, Llc | Semiconductor device having trench edge termination structure |
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- 2004-12-15 EP EP04814224A patent/EP1721344A4/en not_active Withdrawn
- 2004-12-15 JP JP2006545356A patent/JP4928947B2/ja not_active Expired - Fee Related
- 2004-12-15 KR KR1020067014536A patent/KR20070038945A/ko not_active Application Discontinuation
- 2004-12-15 WO PCT/US2004/042014 patent/WO2005065179A2/en active Application Filing
- 2004-12-17 TW TW093139472A patent/TWI358089B/zh not_active IP Right Cessation
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JP2007515070A (ja) | 2007-06-07 |
JP2012069991A (ja) | 2012-04-05 |
US20050181577A1 (en) | 2005-08-18 |
EP1721344A2 (en) | 2006-11-15 |
TWI358089B (en) | 2012-02-11 |
US20060252219A1 (en) | 2006-11-09 |
US7410891B2 (en) | 2008-08-12 |
TW200531175A (en) | 2005-09-16 |
WO2005065179B1 (en) | 2006-07-06 |
US7109110B2 (en) | 2006-09-19 |
WO2005065179A2 (en) | 2005-07-21 |
WO2005065179A3 (en) | 2006-04-27 |
KR20070038945A (ko) | 2007-04-11 |
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