JP2004513517A - ターゲット基板に結合される少なくとも一の薄層を備えた積層構造の作製方法 - Google Patents

ターゲット基板に結合される少なくとも一の薄層を備えた積層構造の作製方法 Download PDF

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Publication number
JP2004513517A
JP2004513517A JP2002540206A JP2002540206A JP2004513517A JP 2004513517 A JP2004513517 A JP 2004513517A JP 2002540206 A JP2002540206 A JP 2002540206A JP 2002540206 A JP2002540206 A JP 2002540206A JP 2004513517 A JP2004513517 A JP 2004513517A
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substrate
contact surface
target substrate
layer
thin layer
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Japanese (ja)
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JP2004513517A5 (https=
Inventor
ユベール・モリソー
ベルナール・アスパール
エリック・ジャラギュイアー
ファブリース・ルタール
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コミツサリア　タ　レネルジー　アトミーク
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Publication of JP2004513517A publication Critical patent/JP2004513517A/ja
Publication of JP2004513517A5 publication Critical patent/JP2004513517A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1922—Preparing SOI wafers using silicon etch back techniques, e.g. BESOI or ELTRAN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

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  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
JP2002540206A 2000-11-06 2001-11-05 ターゲット基板に結合される少なくとも一の薄層を備えた積層構造の作製方法 Pending JP2004513517A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0014170A FR2816445B1 (fr) 2000-11-06 2000-11-06 Procede de fabrication d'une structure empilee comprenant une couche mince adherant a un substrat cible
PCT/FR2001/003401 WO2002037556A1 (fr) 2000-11-06 2001-11-05 Procede de fabrication d'une structure empilee comprenant une couche mince adherant a un substrat cible

Related Child Applications (1)

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JP2009013500A Division JP5528711B2 (ja) 2000-11-06 2009-01-23 ターゲット基板に結合される少なくとも一の薄層を備えた積層構造の作製方法

Publications (2)

Publication Number Publication Date
JP2004513517A true JP2004513517A (ja) 2004-04-30
JP2004513517A5 JP2004513517A5 (https=) 2008-06-05

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ID=8856075

Family Applications (3)

Application Number Title Priority Date Filing Date
JP2002540206A Pending JP2004513517A (ja) 2000-11-06 2001-11-05 ターゲット基板に結合される少なくとも一の薄層を備えた積層構造の作製方法
JP2009013500A Expired - Lifetime JP5528711B2 (ja) 2000-11-06 2009-01-23 ターゲット基板に結合される少なくとも一の薄層を備えた積層構造の作製方法
JP2013044223A Expired - Lifetime JP5770767B2 (ja) 2000-11-06 2013-03-06 ターゲット基板に結合される少なくとも一の薄層を備えた積層構造の作製方法

Family Applications After (2)

Application Number Title Priority Date Filing Date
JP2009013500A Expired - Lifetime JP5528711B2 (ja) 2000-11-06 2009-01-23 ターゲット基板に結合される少なくとも一の薄層を備えた積層構造の作製方法
JP2013044223A Expired - Lifetime JP5770767B2 (ja) 2000-11-06 2013-03-06 ターゲット基板に結合される少なくとも一の薄層を備えた積層構造の作製方法

Country Status (9)

Country Link
US (3) US6974759B2 (https=)
EP (1) EP1344249B1 (https=)
JP (3) JP2004513517A (https=)
KR (1) KR100855083B1 (https=)
CN (1) CN1327505C (https=)
AU (1) AU2002223735A1 (https=)
FR (1) FR2816445B1 (https=)
TW (1) TW513752B (https=)
WO (1) WO2002037556A1 (https=)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009033131A (ja) * 2007-06-25 2009-02-12 Semiconductor Energy Lab Co Ltd 半導体基板の製造方法及び半導体装置
JP2009044136A (ja) * 2007-07-13 2009-02-26 Semiconductor Energy Lab Co Ltd 半導体基板の作製方法
JP2009094490A (ja) * 2007-09-21 2009-04-30 Semiconductor Energy Lab Co Ltd Ｓｏｉ基板の作製方法
JP2009212387A (ja) * 2008-03-05 2009-09-17 Semiconductor Energy Lab Co Ltd 半導体基板の製造方法
JP2010517259A (ja) * 2007-01-22 2010-05-20 エス． オー． アイ． テック シリコン オン インシュレーター テクノロジーズ 粗面化処理方法
WO2010067794A1 (ja) * 2008-12-10 2010-06-17 株式会社村田製作所 圧電性複合基板の製造方法、および圧電素子の製造方法
WO2010082396A1 (ja) * 2009-01-16 2010-07-22 住友電気工業株式会社 発光素子用基板
JP2010278339A (ja) * 2009-05-29 2010-12-09 Shin-Etsu Chemical Co Ltd 貼り合わせｓｏｉ基板の製造方法
JP2013175787A (ja) * 2009-12-30 2013-09-05 Memc Electron Materials Inc 多層結晶構造体の製造方法
WO2014178356A1 (ja) * 2013-05-01 2014-11-06 信越化学工業株式会社 ハイブリッド基板の製造方法及びハイブリッド基板
JP2021518320A (ja) * 2018-03-28 2021-08-02 ソイテックＳｏｉｔｅｃ ＧａＡｓ材料の単結晶層を製造するための方法、及びＧａＡｓ材料の単結晶層をエピタキシャル成長させるための基板

Families Citing this family (294)

* Cited by examiner, † Cited by third party
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JP4277481B2 (ja) * 2002-05-08 2009-06-10 日本電気株式会社 半導体基板の製造方法、半導体装置の製造方法
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US8481409B2 (en) 2013-07-09
US20130230967A1 (en) 2013-09-05
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US6974759B2 (en) 2005-12-13
US8679946B2 (en) 2014-03-25
FR2816445B1 (fr) 2003-07-25
US20060079071A1 (en) 2006-04-13
US20040014299A1 (en) 2004-01-22
TW513752B (en) 2002-12-11
CN1473361A (zh) 2004-02-04
JP5770767B2 (ja) 2015-08-26
EP1344249B1 (fr) 2017-01-18
KR100855083B1 (ko) 2008-08-29
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WO2002037556A1 (fr) 2002-05-10
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