JP2002164428A5 - - Google Patents

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Publication number
JP2002164428A5
JP2002164428A5 JP2000362462A JP2000362462A JP2002164428A5 JP 2002164428 A5 JP2002164428 A5 JP 2002164428A5 JP 2000362462 A JP2000362462 A JP 2000362462A JP 2000362462 A JP2000362462 A JP 2000362462A JP 2002164428 A5 JP2002164428 A5 JP 2002164428A5
Authority
JP
Japan
Prior art keywords
insulating layer
semiconductor device
wiring
young
modulus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000362462A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002164428A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2000362462A priority Critical patent/JP2002164428A/ja
Priority claimed from JP2000362462A external-priority patent/JP2002164428A/ja
Priority to TW090128124A priority patent/TW541657B/zh
Priority to US09/987,914 priority patent/US6812127B2/en
Priority to KR1020010074455A priority patent/KR100830666B1/ko
Publication of JP2002164428A publication Critical patent/JP2002164428A/ja
Publication of JP2002164428A5 publication Critical patent/JP2002164428A5/ja
Pending legal-status Critical Current

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JP2000362462A 2000-11-29 2000-11-29 半導体装置およびその製造方法 Pending JP2002164428A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2000362462A JP2002164428A (ja) 2000-11-29 2000-11-29 半導体装置およびその製造方法
TW090128124A TW541657B (en) 2000-11-29 2001-11-13 Semiconductor device and its fabrication method
US09/987,914 US6812127B2 (en) 2000-11-29 2001-11-16 Method of forming semiconductor device including silicon oxide with fluorine, embedded wiring layer, via holes, and wiring grooves
KR1020010074455A KR100830666B1 (ko) 2000-11-29 2001-11-28 반도체장치 및 그 제조방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000362462A JP2002164428A (ja) 2000-11-29 2000-11-29 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2002164428A JP2002164428A (ja) 2002-06-07
JP2002164428A5 true JP2002164428A5 (enExample) 2005-02-03

Family

ID=18833731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000362462A Pending JP2002164428A (ja) 2000-11-29 2000-11-29 半導体装置およびその製造方法

Country Status (4)

Country Link
US (1) US6812127B2 (enExample)
JP (1) JP2002164428A (enExample)
KR (1) KR100830666B1 (enExample)
TW (1) TW541657B (enExample)

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JP2006210508A (ja) * 2005-01-26 2006-08-10 Sony Corp 半導体装置およびその製造方法
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JP2007123509A (ja) * 2005-10-27 2007-05-17 Seiko Epson Corp 半導体装置およびその製造方法
US20070096170A1 (en) * 2005-11-02 2007-05-03 International Business Machines Corporation Low modulus spacers for channel stress enhancement
US7670927B2 (en) * 2006-05-16 2010-03-02 International Business Machines Corporation Double-sided integrated circuit chips
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US7602027B2 (en) * 2006-12-29 2009-10-13 Semiconductor Components Industries, L.L.C. Semiconductor component and method of manufacture
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US20090079072A1 (en) * 2007-09-21 2009-03-26 Casio Computer Co., Ltd. Semiconductor device having low dielectric insulating film and manufacturing method of the same
US8587124B2 (en) * 2007-09-21 2013-11-19 Teramikros, Inc. Semiconductor device having low dielectric insulating film and manufacturing method of the same
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JP4666028B2 (ja) * 2008-03-31 2011-04-06 カシオ計算機株式会社 半導体装置
WO2010125682A1 (ja) * 2009-04-30 2010-11-04 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US8304863B2 (en) 2010-02-09 2012-11-06 International Business Machines Corporation Electromigration immune through-substrate vias
US8354339B2 (en) * 2010-07-20 2013-01-15 International Business Machines Corporation Methods to form self-aligned permanent on-chip interconnect structures
US8642460B2 (en) * 2011-06-08 2014-02-04 International Business Machines Corporation Semiconductor switching device and method of making the same
CN102332425A (zh) * 2011-09-23 2012-01-25 复旦大学 一种提升铜互连技术中抗电迁移特性的方法
US8640072B1 (en) 2012-07-31 2014-01-28 Freescale Semiconductor, Inc. Method for forming an electrical connection between metal layers
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TWI613709B (zh) * 2013-02-20 2018-02-01 財團法人工業技術研究院 半導體元件結構及其製造方法與應用其之畫素結構
US10541204B2 (en) * 2015-10-20 2020-01-21 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnection structure and method of forming the same
TWI590350B (zh) * 2016-06-30 2017-07-01 欣興電子股份有限公司 線路重分佈結構的製造方法與線路重分佈結構單元
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JP4460669B2 (ja) * 1999-03-19 2010-05-12 株式会社東芝 半導体装置
US6211063B1 (en) * 1999-05-25 2001-04-03 Taiwan Semiconductor Manufacturing Company Method to fabricate self-aligned dual damascene structures
JP4108228B2 (ja) * 1999-07-15 2008-06-25 富士通株式会社 半導体装置の製造方法
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US6284644B1 (en) * 2000-10-10 2001-09-04 Chartered Semiconductor Manufacturing Ltd. IMD scheme by post-plasma treatment of FSG and TEOS oxide capping layer

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