DE69827824D1 - Kontrolle der verspannungsdichte durch verwendung von gradientenschichten und durch planarisierung - Google Patents
Kontrolle der verspannungsdichte durch verwendung von gradientenschichten und durch planarisierungInfo
- Publication number
- DE69827824D1 DE69827824D1 DE69827824T DE69827824T DE69827824D1 DE 69827824 D1 DE69827824 D1 DE 69827824D1 DE 69827824 T DE69827824 T DE 69827824T DE 69827824 T DE69827824 T DE 69827824T DE 69827824 D1 DE69827824 D1 DE 69827824D1
- Authority
- DE
- Germany
- Prior art keywords
- layer
- substrate
- structure including
- semiconductor structure
- graded region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000758 substrate Substances 0.000 abstract 8
- 239000004065 semiconductor Substances 0.000 abstract 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052710 silicon Inorganic materials 0.000 abstract 2
- 239000010703 silicon Substances 0.000 abstract 2
- 238000004519 manufacturing process Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02433—Crystal orientation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02502—Layer structure consisting of two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/0251—Graded layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/933—Germanium or silicon or Ge-Si on III-V
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Recrystallisation Techniques (AREA)
- Magnetic Record Carriers (AREA)
- Gears, Cams (AREA)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US5060297P | 1997-06-24 | 1997-06-24 | |
US50602P | 1997-06-24 | ||
US5976597P | 1997-09-16 | 1997-09-16 | |
US59765P | 1997-09-16 | ||
PCT/US1998/013076 WO1998059365A1 (en) | 1997-06-24 | 1998-06-23 | CONTROLLING THREADING DISLOCATION DENSITIES IN Ge ON Si USING GRADED GeSi LAYERS AND PLANARIZATION |
Publications (3)
Publication Number | Publication Date |
---|---|
DE69827824D1 true DE69827824D1 (de) | 2004-12-30 |
DE69827824T2 DE69827824T2 (de) | 2005-11-24 |
DE69827824T3 DE69827824T3 (de) | 2009-09-03 |
Family
ID=26728449
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69827824T Expired - Fee Related DE69827824T3 (de) | 1997-06-24 | 1998-06-23 | Kontrolle der verspannungsdichte durch verwendung von gradientenschichten und durch planarisierung |
Country Status (8)
Country | Link |
---|---|
US (5) | US6107653A (de) |
EP (1) | EP1016129B2 (de) |
JP (1) | JP3535527B2 (de) |
KR (1) | KR100400808B1 (de) |
AT (1) | ATE283549T1 (de) |
CA (1) | CA2295069A1 (de) |
DE (1) | DE69827824T3 (de) |
WO (1) | WO1998059365A1 (de) |
Families Citing this family (235)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6245161B1 (en) | 1997-05-12 | 2001-06-12 | Silicon Genesis Corporation | Economical silicon-on-silicon hybrid wafer assembly |
US20070122997A1 (en) | 1998-02-19 | 2007-05-31 | Silicon Genesis Corporation | Controlled process and resulting device |
JP3535527B2 (ja) | 1997-06-24 | 2004-06-07 | マサチューセッツ インスティテュート オブ テクノロジー | 傾斜GeSi層と平坦化を用いたゲルマニウム・オン・シリコンの貫通転位の制御 |
US7227176B2 (en) * | 1998-04-10 | 2007-06-05 | Massachusetts Institute Of Technology | Etch stop layer system |
US6750130B1 (en) | 2000-01-20 | 2004-06-15 | Amberwave Systems Corporation | Heterointegration of materials using deposition and bonding |
US6602613B1 (en) | 2000-01-20 | 2003-08-05 | Amberwave Systems Corporation | Heterointegration of materials using deposition and bonding |
EP1249036A1 (de) | 2000-01-20 | 2002-10-16 | Amberwave Systems Corporation | Entspannte fehlangepasste epitaxialschichten mit niedriger verspannungsdichte ohne hochtemperatur-wachstum |
US6392257B1 (en) | 2000-02-10 | 2002-05-21 | Motorola Inc. | Semiconductor structure, semiconductor device, communicating device, integrated circuit, and process for fabricating the same |
US6693033B2 (en) | 2000-02-10 | 2004-02-17 | Motorola, Inc. | Method of removing an amorphous oxide from a monocrystalline surface |
US6969875B2 (en) | 2000-05-26 | 2005-11-29 | Amberwave Systems Corporation | Buried channel strained silicon FET using a supply layer created through ion implantation |
US6427066B1 (en) | 2000-06-30 | 2002-07-30 | Motorola, Inc. | Apparatus and method for effecting communications among a plurality of remote stations |
US6477285B1 (en) | 2000-06-30 | 2002-11-05 | Motorola, Inc. | Integrated circuits with optical signal propagation |
US6410941B1 (en) | 2000-06-30 | 2002-06-25 | Motorola, Inc. | Reconfigurable systems using hybrid integrated circuits with optical ports |
US6501973B1 (en) | 2000-06-30 | 2002-12-31 | Motorola, Inc. | Apparatus and method for measuring selected physical condition of an animate subject |
US6555946B1 (en) | 2000-07-24 | 2003-04-29 | Motorola, Inc. | Acoustic wave device and process for forming the same |
JP2003158075A (ja) * | 2001-08-23 | 2003-05-30 | Sumitomo Mitsubishi Silicon Corp | 半導体基板の製造方法及び電界効果型トランジスタの製造方法並びに半導体基板及び電界効果型トランジスタ |
JP4207548B2 (ja) * | 2002-11-28 | 2009-01-14 | 株式会社Sumco | 半導体基板の製造方法及び電界効果型トランジスタの製造方法並びに半導体基板及び電界効果型トランジスタ |
US6645829B2 (en) | 2000-08-04 | 2003-11-11 | Amberwave Systems Corporation | Silicon wafer with embedded optoelectronic material for monolithic OEIC |
US6583015B2 (en) * | 2000-08-07 | 2003-06-24 | Amberwave Systems Corporation | Gate technology for strained surface channel and strained buried channel MOSFET devices |
EP1309989B1 (de) | 2000-08-16 | 2007-01-10 | Massachusetts Institute Of Technology | Verfahren für die herstellung eines halbleiterartikels mittels graduellem epitaktischen wachsen |
WO2003003431A1 (en) * | 2000-09-05 | 2003-01-09 | The Regents Of The University Of California | Relaxed sige films by surfactant mediation |
US6475072B1 (en) * | 2000-09-29 | 2002-11-05 | International Business Machines Corporation | Method of wafer smoothing for bonding using chemo-mechanical polishing (CMP) |
US6524935B1 (en) * | 2000-09-29 | 2003-02-25 | International Business Machines Corporation | Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique |
US6638838B1 (en) | 2000-10-02 | 2003-10-28 | Motorola, Inc. | Semiconductor structure including a partially annealed layer and method of forming the same |
US6583034B2 (en) * | 2000-11-22 | 2003-06-24 | Motorola, Inc. | Semiconductor structure including a compliant substrate having a graded monocrystalline layer and methods for fabricating the structure and semiconductor devices including the structure |
US6649480B2 (en) | 2000-12-04 | 2003-11-18 | Amberwave Systems Corporation | Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
US20020100942A1 (en) * | 2000-12-04 | 2002-08-01 | Fitzgerald Eugene A. | CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
US6563118B2 (en) | 2000-12-08 | 2003-05-13 | Motorola, Inc. | Pyroelectric device on a monocrystalline semiconductor substrate and process for fabricating same |
US6594293B1 (en) * | 2001-02-08 | 2003-07-15 | Amberwave Systems Corporation | Relaxed InxGa1-xAs layers integrated with Si |
US6673646B2 (en) | 2001-02-28 | 2004-01-06 | Motorola, Inc. | Growth of compound semiconductor structures on patterned oxide films and process for fabricating same |
US6703688B1 (en) * | 2001-03-02 | 2004-03-09 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6830976B2 (en) | 2001-03-02 | 2004-12-14 | Amberwave Systems Corproation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6900103B2 (en) | 2001-03-02 | 2005-05-31 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
WO2002071491A1 (en) * | 2001-03-02 | 2002-09-12 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed cmos electronics and high speed analog circuits |
US6723661B2 (en) * | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6593641B1 (en) | 2001-03-02 | 2003-07-15 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6724008B2 (en) | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US7046719B2 (en) | 2001-03-08 | 2006-05-16 | Motorola, Inc. | Soft handoff between cellular systems employing different encoding rates |
US6940089B2 (en) | 2001-04-04 | 2005-09-06 | Massachusetts Institute Of Technology | Semiconductor device structure |
AU2002322105A1 (en) * | 2001-06-14 | 2003-01-02 | Amberware Systems Corporation | Method of selective removal of sige alloys |
US7301180B2 (en) | 2001-06-18 | 2007-11-27 | Massachusetts Institute Of Technology | Structure and method for a high-speed semiconductor device having a Ge channel layer |
WO2002103801A1 (en) * | 2001-06-18 | 2002-12-27 | Massachusetts Institute Of Technology | Structures and methods for a high-speed semiconductor device |
US6916727B2 (en) * | 2001-06-21 | 2005-07-12 | Massachusetts Institute Of Technology | Enhancement of P-type metal-oxide-semiconductor field effect transistors |
US6709989B2 (en) | 2001-06-21 | 2004-03-23 | Motorola, Inc. | Method for fabricating a semiconductor structure including a metal oxide interface with silicon |
US6646293B2 (en) | 2001-07-18 | 2003-11-11 | Motorola, Inc. | Structure for fabricating high electron mobility transistors utilizing the formation of complaint substrates |
US6693298B2 (en) | 2001-07-20 | 2004-02-17 | Motorola, Inc. | Structure and method for fabricating epitaxial semiconductor on insulator (SOI) structures and devices utilizing the formation of a compliant substrate for materials used to form same |
US6472694B1 (en) | 2001-07-23 | 2002-10-29 | Motorola, Inc. | Microprocessor structure having a compound semiconductor layer |
US6667196B2 (en) | 2001-07-25 | 2003-12-23 | Motorola, Inc. | Method for real-time monitoring and controlling perovskite oxide film growth and semiconductor structure formed using the method |
US6594414B2 (en) | 2001-07-25 | 2003-07-15 | Motorola, Inc. | Structure and method of fabrication for an optical switch |
US6585424B2 (en) | 2001-07-25 | 2003-07-01 | Motorola, Inc. | Structure and method for fabricating an electro-rheological lens |
WO2003015142A2 (en) * | 2001-08-06 | 2003-02-20 | Massachusetts Institute Of Technology | Formation of planar strained layers |
US6462360B1 (en) | 2001-08-06 | 2002-10-08 | Motorola, Inc. | Integrated gallium arsenide communications systems |
US6639249B2 (en) | 2001-08-06 | 2003-10-28 | Motorola, Inc. | Structure and method for fabrication for a solid-state lighting device |
US6589856B2 (en) | 2001-08-06 | 2003-07-08 | Motorola, Inc. | Method and apparatus for controlling anti-phase domains in semiconductor structures and devices |
US7138649B2 (en) * | 2001-08-09 | 2006-11-21 | Amberwave Systems Corporation | Dual-channel CMOS transistors with differentially strained channels |
US6974735B2 (en) * | 2001-08-09 | 2005-12-13 | Amberwave Systems Corporation | Dual layer Semiconductor Devices |
US6673667B2 (en) | 2001-08-15 | 2004-01-06 | Motorola, Inc. | Method for manufacturing a substantially integral monolithic apparatus including a plurality of semiconductor materials |
JP2003101740A (ja) * | 2001-09-20 | 2003-04-04 | Ricoh Co Ltd | 画像データ記憶装置 |
JP2005504436A (ja) | 2001-09-21 | 2005-02-10 | アンバーウェーブ システムズ コーポレイション | 画定された不純物勾配を有するひずみ材料層を使用する半導体構造、およびその構造を製作するための方法。 |
AU2002341803A1 (en) | 2001-09-24 | 2003-04-07 | Amberwave Systems Corporation | Rf circuits including transistors having strained material layers |
US7202139B2 (en) | 2002-02-07 | 2007-04-10 | Taiwan Semiconductor Manufacturing Company , Ltd. | MOSFET device with a strained channel |
US6492216B1 (en) | 2002-02-07 | 2002-12-10 | Taiwan Semiconductor Manufacturing Company | Method of forming a transistor with a strained channel |
US6649492B2 (en) * | 2002-02-11 | 2003-11-18 | International Business Machines Corporation | Strained Si based layer made by UHV-CVD, and devices therein |
US7060632B2 (en) | 2002-03-14 | 2006-06-13 | Amberwave Systems Corporation | Methods for fabricating strained layers on semiconductor substrates |
GB0212616D0 (en) * | 2002-05-31 | 2002-07-10 | Univ Warwick | Formation of lattice-tuning semiconductor substrates |
JP2003347229A (ja) | 2002-05-31 | 2003-12-05 | Renesas Technology Corp | 半導体装置の製造方法および半導体装置 |
AU2003238963A1 (en) * | 2002-06-07 | 2003-12-22 | Amberwave Systems Corporation | Semiconductor devices having strained dual channel layers |
US7307273B2 (en) | 2002-06-07 | 2007-12-11 | Amberwave Systems Corporation | Control of strain in device layers by selective relaxation |
US20030227057A1 (en) | 2002-06-07 | 2003-12-11 | Lochtefeld Anthony J. | Strained-semiconductor-on-insulator device structures |
US7335545B2 (en) | 2002-06-07 | 2008-02-26 | Amberwave Systems Corporation | Control of strain in device layers by prevention of relaxation |
US6995430B2 (en) | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
US7615829B2 (en) | 2002-06-07 | 2009-11-10 | Amberwave Systems Corporation | Elevated source and drain elements for strained-channel heterojuntion field-effect transistors |
US7074623B2 (en) | 2002-06-07 | 2006-07-11 | Amberwave Systems Corporation | Methods of forming strained-semiconductor-on-insulator finFET device structures |
WO2003105206A1 (en) * | 2002-06-10 | 2003-12-18 | Amberwave Systems Corporation | Growing source and drain elements by selecive epitaxy |
US6900521B2 (en) * | 2002-06-10 | 2005-05-31 | Micron Technology, Inc. | Vertical transistors and output prediction logic circuits containing same |
US7157119B2 (en) * | 2002-06-25 | 2007-01-02 | Ppg Industries Ohio, Inc. | Method and compositions for applying multiple overlying organic pigmented decorations on ceramic substrates |
US6982474B2 (en) | 2002-06-25 | 2006-01-03 | Amberwave Systems Corporation | Reacted conductive gate electrodes |
US6936869B2 (en) | 2002-07-09 | 2005-08-30 | International Rectifier Corporation | Heterojunction field effect transistors using silicon-germanium and silicon-carbon alloys |
US7018910B2 (en) * | 2002-07-09 | 2006-03-28 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Transfer of a thin layer from a wafer comprising a buffer layer |
US6884144B2 (en) | 2002-08-16 | 2005-04-26 | Micron Technology, Inc. | Methods and systems for planarizing microelectronic devices with Ge-Se-Ag layers |
EP2267762A3 (de) * | 2002-08-23 | 2012-08-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Halbleiter-Heterostrukturen mit reduzierter Anhäufung von Versetzungen und entsprechende Herstellungsverfahren |
US6878610B1 (en) * | 2002-08-27 | 2005-04-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Relaxed silicon germanium substrate with low defect density |
US7594967B2 (en) * | 2002-08-30 | 2009-09-29 | Amberwave Systems Corporation | Reduction of dislocation pile-up formation during relaxed lattice-mismatched epitaxy |
GB2409340B (en) * | 2002-10-04 | 2006-05-10 | Silicon Genesis Corp | Method for treating semiconductor material |
US8187377B2 (en) | 2002-10-04 | 2012-05-29 | Silicon Genesis Corporation | Non-contact etch annealing of strained layers |
JP4949628B2 (ja) * | 2002-10-30 | 2012-06-13 | 台湾積體電路製造股▲ふん▼有限公司 | Cmosプロセス中に歪み半導基板層を保護する方法 |
US6812116B2 (en) * | 2002-12-13 | 2004-11-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating a wafer with strained channel layers for increased electron and hole mobility for improving device performance |
WO2004068556A2 (en) | 2003-01-27 | 2004-08-12 | Amberwave Systems Corporation | Semiconductor structures with structural homogeneity |
US6995427B2 (en) | 2003-01-29 | 2006-02-07 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Semiconductor structure for providing strained crystalline layer on insulator and method for fabricating same |
JP4306266B2 (ja) * | 2003-02-04 | 2009-07-29 | 株式会社Sumco | 半導体基板の製造方法 |
US7399681B2 (en) | 2003-02-18 | 2008-07-15 | Corning Incorporated | Glass-based SOI structures |
US7176528B2 (en) * | 2003-02-18 | 2007-02-13 | Corning Incorporated | Glass-based SOI structures |
US6911379B2 (en) * | 2003-03-05 | 2005-06-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming strained silicon on insulator substrate |
US6955952B2 (en) * | 2003-03-07 | 2005-10-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strain balanced structure with a tensile strained silicon channel and a compressive strained silicon-germanium channel for CMOS performance enhancement |
US6949451B2 (en) * | 2003-03-10 | 2005-09-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | SOI chip with recess-resistant buried insulator and method of manufacturing the same |
US7238595B2 (en) | 2003-03-13 | 2007-07-03 | Asm America, Inc. | Epitaxial semiconductor deposition methods and structures |
US7682947B2 (en) * | 2003-03-13 | 2010-03-23 | Asm America, Inc. | Epitaxial semiconductor deposition methods and structures |
US20060225642A1 (en) * | 2003-03-31 | 2006-10-12 | Yoshihiko Kanzawa | Method of forming semiconductor crystal |
US6900502B2 (en) * | 2003-04-03 | 2005-05-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained channel on insulator device |
US6902962B2 (en) * | 2003-04-04 | 2005-06-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Silicon-on-insulator chip with multiple crystal orientations |
US6882025B2 (en) * | 2003-04-25 | 2005-04-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained-channel transistor and methods of manufacture |
US20050285140A1 (en) * | 2004-06-23 | 2005-12-29 | Chih-Hsin Ko | Isolation structure for strained channel transistors |
US6867433B2 (en) | 2003-04-30 | 2005-03-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors |
US20040224469A1 (en) * | 2003-05-08 | 2004-11-11 | The Board Of Trustees Of The University Of Illinois | Method for forming a strained semiconductor substrate |
US6864149B2 (en) * | 2003-05-09 | 2005-03-08 | Taiwan Semiconductor Manufacturing Company | SOI chip with mesa isolation and recess resistant regions |
US20050012087A1 (en) * | 2003-07-15 | 2005-01-20 | Yi-Ming Sheu | Self-aligned MOSFET having an oxide region below the channel |
US6936881B2 (en) * | 2003-07-25 | 2005-08-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Capacitor that includes high permittivity capacitor dielectric |
US6940705B2 (en) * | 2003-07-25 | 2005-09-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Capacitor with enhanced performance and method of manufacture |
US7078742B2 (en) | 2003-07-25 | 2006-07-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Strained-channel semiconductor structure and method of fabricating the same |
US7259084B2 (en) * | 2003-07-28 | 2007-08-21 | National Chiao-Tung University | Growth of GaAs epitaxial layers on Si substrate by using a novel GeSi buffer layer |
KR20060039915A (ko) * | 2003-07-30 | 2006-05-09 | 에이에스엠 아메리카, 인코포레이티드 | 완화된 실리콘 게르마늄 층의 에피택셜 성장 |
KR100605504B1 (ko) * | 2003-07-30 | 2006-07-28 | 삼성전자주식회사 | 저전위밀도를 갖는 에피텍셜층을 포함하는 반도체 소자 및 상기 반도체 소자의 제조방법 |
US7045836B2 (en) * | 2003-07-31 | 2006-05-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure having a strained region and a method of fabricating same |
US7301206B2 (en) * | 2003-08-01 | 2007-11-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors |
US7101742B2 (en) * | 2003-08-12 | 2006-09-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained channel complementary field-effect transistors and methods of manufacture |
US7112495B2 (en) * | 2003-08-15 | 2006-09-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit |
US6974755B2 (en) * | 2003-08-15 | 2005-12-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Isolation structure with nitrogen-containing liner and methods of manufacture |
US20050035369A1 (en) * | 2003-08-15 | 2005-02-17 | Chun-Chieh Lin | Structure and method of forming integrated circuits utilizing strained channel transistors |
US7071052B2 (en) | 2003-08-18 | 2006-07-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Resistor with reduced leakage |
US7495267B2 (en) * | 2003-09-08 | 2009-02-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure having a strained region and a method of fabricating same |
US7157379B2 (en) * | 2003-09-23 | 2007-01-02 | Intel Corporation | Strained semiconductor structures |
TW200512836A (en) * | 2003-09-30 | 2005-04-01 | Ind Tech Res Inst | Method for manufacturing strain relaxed silicon-germanium crystallizing layer |
US6902965B2 (en) * | 2003-10-31 | 2005-06-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained silicon structure |
US7888201B2 (en) * | 2003-11-04 | 2011-02-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor-on-insulator SRAM configured using partially-depleted and fully-depleted transistors |
US20050132952A1 (en) * | 2003-12-17 | 2005-06-23 | Michael Ward | Semiconductor alloy with low surface roughness, and method of making the same |
US20050196925A1 (en) * | 2003-12-22 | 2005-09-08 | Kim Sang H. | Method of forming stress-relaxed SiGe buffer layer |
US7166522B2 (en) * | 2004-01-23 | 2007-01-23 | Chartered Semiconductor Manufacturing Ltd. | Method of forming a relaxed semiconductor buffer layer on a substrate with a large lattice mismatch |
TWI239569B (en) * | 2004-02-06 | 2005-09-11 | Ind Tech Res Inst | Method of making strain relaxation SiGe epitaxial pattern layer to control the threading dislocation density |
TWI263709B (en) * | 2004-02-17 | 2006-10-11 | Ind Tech Res Inst | Structure of strain relaxed thin Si/Ge epitaxial layer and fabricating method thereof |
US20050186722A1 (en) * | 2004-02-25 | 2005-08-25 | Kuan-Lun Cheng | Method and structure for CMOS device with stress relaxed by ion implantation of carbon or oxygen containing ions |
US7329593B2 (en) * | 2004-02-27 | 2008-02-12 | Asm America, Inc. | Germanium deposition |
JP3884439B2 (ja) * | 2004-03-02 | 2007-02-21 | 株式会社東芝 | 半導体装置 |
US7390724B2 (en) * | 2004-04-12 | 2008-06-24 | Silicon Genesis Corporation | Method and system for lattice space engineering |
TWI246116B (en) * | 2004-04-14 | 2005-12-21 | Witty Mate Corp | Process for growing ZnSe Epitaxy layer on Si substrate and semiconductor structure thereby |
US8882909B2 (en) * | 2004-04-30 | 2014-11-11 | Dichroic Cell S.R.L. | Method for producing virtual Ge substrates for III/V-integration on Si(001) |
US20050266632A1 (en) * | 2004-05-26 | 2005-12-01 | Yun-Hsiu Chen | Integrated circuit with strained and non-strained transistors, and method of forming thereof |
WO2005120775A1 (en) | 2004-06-08 | 2005-12-22 | S.O.I. Tec Silicon On Insulator Technologies | Planarization of a heteroepitaxial layer |
JP2006027929A (ja) * | 2004-07-13 | 2006-02-02 | Toshiba Ceramics Co Ltd | 電気光学的単結晶薄膜成長用基板及びその製造方法 |
US7094666B2 (en) * | 2004-07-29 | 2006-08-22 | Silicon Genesis Corporation | Method and system for fabricating strained layers for the manufacture of integrated circuits |
JP2008510315A (ja) * | 2004-08-18 | 2008-04-03 | コーニング インコーポレイテッド | 絶縁体上歪半導体構造及び絶縁体上歪半導体構造を作成する方法 |
DE102004048096A1 (de) * | 2004-09-30 | 2006-04-27 | Forschungszentrum Jülich GmbH | Verfahren zur Herstellung einer verspannten Schicht auf einem Substrat und Schichtstruktur |
US7335929B2 (en) * | 2004-10-18 | 2008-02-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Transistor with a strained region and method of manufacture |
DE102004053307B4 (de) * | 2004-11-04 | 2010-01-07 | Siltronic Ag | Mehrschichtenstruktur umfassend ein Substrat und eine darauf heteroepitaktisch abgeschiedene Schicht aus Silicium und Germanium und ein Verfahren zu deren Herstellung |
US7682952B2 (en) | 2004-11-30 | 2010-03-23 | Massachusetts Institute Of Technology | Method for forming low defect density alloy graded layers and structure containing such layers |
US7393733B2 (en) | 2004-12-01 | 2008-07-01 | Amberwave Systems Corporation | Methods of forming hybrid fin field-effect transistor structures |
US20060113603A1 (en) * | 2004-12-01 | 2006-06-01 | Amberwave Systems Corporation | Hybrid semiconductor-on-insulator structures and related methods |
DE102005000826A1 (de) | 2005-01-05 | 2006-07-20 | Siltronic Ag | Halbleiterscheibe mit Silicium-Germanium-Schicht und Verfahren zu deren Herstellung |
CN1808268B (zh) * | 2005-01-18 | 2010-10-06 | 中芯国际集成电路制造(上海)有限公司 | 用于应变硅mos晶体管的金属硬掩模方法和结构 |
JP4837295B2 (ja) * | 2005-03-02 | 2011-12-14 | 株式会社沖データ | 半導体装置、led装置、ledヘッド、及び画像形成装置 |
US9153645B2 (en) | 2005-05-17 | 2015-10-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication |
JP5063594B2 (ja) * | 2005-05-17 | 2012-10-31 | 台湾積體電路製造股▲ふん▼有限公司 | 転位欠陥密度の低い格子不整合半導体構造およびこれに関連するデバイス製造方法 |
US8324660B2 (en) | 2005-05-17 | 2012-12-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication |
US20070054467A1 (en) * | 2005-09-07 | 2007-03-08 | Amberwave Systems Corporation | Methods for integrating lattice-mismatched semiconductor structure on insulators |
CN100536090C (zh) * | 2005-09-19 | 2009-09-02 | 中芯国际集成电路制造(上海)有限公司 | 形成cmos半导体器件的方法 |
CN1941296A (zh) * | 2005-09-28 | 2007-04-04 | 中芯国际集成电路制造(上海)有限公司 | 应变硅cmos晶体管的原位掺杂硅锗与碳化硅源漏极区 |
CN100442476C (zh) * | 2005-09-29 | 2008-12-10 | 中芯国际集成电路制造(上海)有限公司 | 用于cmos技术的应变感应迁移率增强纳米器件及工艺 |
KR101316947B1 (ko) | 2005-11-01 | 2013-10-15 | 메사추세츠 인스티튜트 오브 테크놀로지 | 모놀리식 집적 반도체 재료 및 소자 |
KR100685130B1 (ko) * | 2005-11-04 | 2007-02-22 | 동부일렉트로닉스 주식회사 | 반도체 소자의 제조 방법 |
US8530934B2 (en) | 2005-11-07 | 2013-09-10 | Atmel Corporation | Integrated circuit structures containing a strain-compensated compound semiconductor layer and methods and systems related thereto |
US20070102834A1 (en) * | 2005-11-07 | 2007-05-10 | Enicks Darwin G | Strain-compensated metastable compound base heterojunction bipolar transistor |
JP2007142291A (ja) * | 2005-11-21 | 2007-06-07 | Canon Anelva Corp | 半導体構造およびその成長方法 |
WO2007067589A2 (en) * | 2005-12-05 | 2007-06-14 | Massachusetts Institute Of Technology | Insulated gate devices and method of making same |
US20070148890A1 (en) * | 2005-12-27 | 2007-06-28 | Enicks Darwin G | Oxygen enhanced metastable silicon germanium film layer |
WO2007112066A2 (en) | 2006-03-24 | 2007-10-04 | Amberwave Systems Corporation | Lattice-mismatched semiconductor structures and related methods for device fabrication |
US20070262296A1 (en) * | 2006-05-11 | 2007-11-15 | Matthias Bauer | Photodetectors employing germanium layers |
US20070264796A1 (en) * | 2006-05-12 | 2007-11-15 | Stocker Mark A | Method for forming a semiconductor on insulator structure |
US8063397B2 (en) * | 2006-06-28 | 2011-11-22 | Massachusetts Institute Of Technology | Semiconductor light-emitting structure and graded-composition substrate providing yellow-green light emission |
JP4894390B2 (ja) | 2006-07-25 | 2012-03-14 | 信越半導体株式会社 | 半導体基板の製造方法 |
WO2008030574A1 (en) | 2006-09-07 | 2008-03-13 | Amberwave Systems Corporation | Defect reduction using aspect ratio trapping |
US8993410B2 (en) | 2006-09-08 | 2015-03-31 | Silicon Genesis Corporation | Substrate cleaving under controlled stress conditions |
US8293619B2 (en) | 2008-08-28 | 2012-10-23 | Silicon Genesis Corporation | Layer transfer of films utilizing controlled propagation |
US7811900B2 (en) | 2006-09-08 | 2010-10-12 | Silicon Genesis Corporation | Method and structure for fabricating solar cells using a thick layer transfer process |
US9362439B2 (en) | 2008-05-07 | 2016-06-07 | Silicon Genesis Corporation | Layer transfer of films utilizing controlled shear region |
WO2008039495A1 (en) * | 2006-09-27 | 2008-04-03 | Amberwave Systems Corporation | Tri-gate field-effect transistors formed by aspect ratio trapping |
WO2008039534A2 (en) | 2006-09-27 | 2008-04-03 | Amberwave Systems Corporation | Quantum tunneling devices and circuits with lattice- mismatched semiconductor structures |
WO2008051503A2 (en) | 2006-10-19 | 2008-05-02 | Amberwave Systems Corporation | Light-emitter-based devices with lattice-mismatched semiconductor structures |
US7550758B2 (en) | 2006-10-31 | 2009-06-23 | Atmel Corporation | Method for providing a nanoscale, high electron mobility transistor (HEMT) on insulator |
JP5018066B2 (ja) | 2006-12-19 | 2012-09-05 | 信越半導体株式会社 | 歪Si基板の製造方法 |
US8558278B2 (en) | 2007-01-16 | 2013-10-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained transistor with optimized drive current and method of forming |
CN101226899A (zh) * | 2007-01-19 | 2008-07-23 | 中芯国际集成电路制造(上海)有限公司 | 在硅凹陷中后续外延生长应变硅mos晶片管的方法和结构 |
US7825328B2 (en) | 2007-04-09 | 2010-11-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Nitride-based multi-junction solar cell modules and methods for making the same |
US8237151B2 (en) | 2009-01-09 | 2012-08-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Diode-based devices and methods for making the same |
US9508890B2 (en) | 2007-04-09 | 2016-11-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Photovoltaics on silicon |
US8304805B2 (en) | 2009-01-09 | 2012-11-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor diodes fabricated by aspect ratio trapping with coalesced films |
US7923373B2 (en) | 2007-06-04 | 2011-04-12 | Micron Technology, Inc. | Pitch multiplication using self-assembling materials |
US8329541B2 (en) | 2007-06-15 | 2012-12-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | InP-based transistor fabrication |
CN101364545B (zh) | 2007-08-10 | 2010-12-22 | 中芯国际集成电路制造(上海)有限公司 | 应变硅晶体管的锗硅和多晶硅栅极结构 |
US20110017127A1 (en) * | 2007-08-17 | 2011-01-27 | Epispeed Sa | Apparatus and method for producing epitaxial layers |
US7791063B2 (en) * | 2007-08-30 | 2010-09-07 | Intel Corporation | High hole mobility p-channel Ge transistor structure on Si substrate |
CN101884117B (zh) | 2007-09-07 | 2013-10-02 | 台湾积体电路制造股份有限公司 | 多结太阳能电池 |
FR2921515B1 (fr) * | 2007-09-25 | 2010-07-30 | Commissariat Energie Atomique | Procede de fabrication de structures semiconductrices utiles pour la realisation de substrats semiconducteur- sur-isolant, et ses applications. |
KR100927661B1 (ko) * | 2007-11-05 | 2009-11-20 | 한국전자통신연구원 | 광신호를 전기적 신호로 변환시키는 수광 소자 |
US7998835B2 (en) * | 2008-01-15 | 2011-08-16 | Globalfoundries Singapore Pte. Ltd. | Strain-direct-on-insulator (SDOI) substrate and method of forming |
US7943961B2 (en) | 2008-03-13 | 2011-05-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strain bars in stressed layers of MOS devices |
EP2104135B1 (de) * | 2008-03-20 | 2013-06-12 | Siltronic AG | Halbleiterwafer mit Heteroepitaxialschicht und Verfahren zur Herstellung des Wafers |
US8115195B2 (en) * | 2008-03-20 | 2012-02-14 | Siltronic Ag | Semiconductor wafer with a heteroepitaxial layer and a method for producing the wafer |
JP5553135B2 (ja) * | 2008-05-09 | 2014-07-16 | 国立大学法人名古屋大学 | 多層膜構造体の形成方法 |
US8183667B2 (en) | 2008-06-03 | 2012-05-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Epitaxial growth of crystalline material |
US8274097B2 (en) | 2008-07-01 | 2012-09-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reduction of edge effects from aspect ratio trapping |
US8981427B2 (en) | 2008-07-15 | 2015-03-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Polishing of small composite semiconductor materials |
US8330126B2 (en) | 2008-08-25 | 2012-12-11 | Silicon Genesis Corporation | Race track configuration and method for wafering silicon solar substrates |
US8034697B2 (en) | 2008-09-19 | 2011-10-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Formation of devices by epitaxial layer overgrowth |
US20100072515A1 (en) | 2008-09-19 | 2010-03-25 | Amberwave Systems Corporation | Fabrication and structures of crystalline material |
US8253211B2 (en) | 2008-09-24 | 2012-08-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor sensor structures with reduced dislocation defect densities |
US7808051B2 (en) | 2008-09-29 | 2010-10-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Standard cell without OD space effect in Y-direction |
US20100187572A1 (en) * | 2009-01-26 | 2010-07-29 | Cho Hans S | Suspended mono-crystalline structure and method of fabrication from a heteroepitaxial layer |
US8053304B2 (en) * | 2009-02-24 | 2011-11-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming high-mobility devices including epitaxially growing a semiconductor layer on a dislocation-blocking layer in a recess formed in a semiconductor substrate |
WO2010114956A1 (en) | 2009-04-02 | 2010-10-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Devices formed from a non-polar plane of a crystalline material and method of making the same |
US8329557B2 (en) | 2009-05-13 | 2012-12-11 | Silicon Genesis Corporation | Techniques for forming thin films by implantation with reduced channeling |
DE102009030296B4 (de) * | 2009-06-24 | 2013-05-08 | Siltronic Ag | Verfahren zur Herstellung einer epitaxierten Siliciumscheibe |
CN102024761A (zh) * | 2009-09-18 | 2011-04-20 | 中芯国际集成电路制造(上海)有限公司 | 用于形成半导体集成电路器件的方法 |
GB201103342D0 (en) * | 2011-02-26 | 2011-04-13 | Ucl Business | Semiconductor device fabrication |
FR2977073B1 (fr) * | 2011-06-23 | 2014-02-07 | Soitec Silicon On Insulator | Procede de transfert d'une couche de semi-conducteur, et substrat comprenant une structure de confinement |
US10490697B2 (en) | 2011-12-03 | 2019-11-26 | Sensor Electronic Technology, Inc. | Epitaxy technique for growing semiconductor compounds |
WO2013082592A1 (en) | 2011-12-03 | 2013-06-06 | Sensor Electronic Technology, Inc. | Epitaxy technique for growing semiconductor compounds |
US10158044B2 (en) | 2011-12-03 | 2018-12-18 | Sensor Electronic Technology, Inc. | Epitaxy technique for growing semiconductor compounds |
DE112013000798T8 (de) | 2012-02-01 | 2014-12-18 | Sensor Electronic Technology, Inc. | Epitaktische Technik zum Reduzieren von Schraubenversetzungen in unter Spannung befindlichen Halbleiterverbundstoffen |
US9653639B2 (en) * | 2012-02-07 | 2017-05-16 | Apic Corporation | Laser using locally strained germanium on silicon for opto-electronic applications |
US9127345B2 (en) | 2012-03-06 | 2015-09-08 | Asm America, Inc. | Methods for depositing an epitaxial silicon germanium layer having a germanium to silicon ratio greater than 1:1 using silylgermane and a diluent |
US8853750B2 (en) | 2012-04-27 | 2014-10-07 | International Business Machines Corporation | FinFET with enhanced embedded stressor |
KR101441634B1 (ko) | 2012-05-30 | 2014-09-24 | (재)한국나노기술원 | 격자 불일치 전위 극복 광소자 및 그 제조방법 |
US9171715B2 (en) | 2012-09-05 | 2015-10-27 | Asm Ip Holding B.V. | Atomic layer deposition of GeO2 |
KR102104062B1 (ko) | 2013-10-31 | 2020-04-23 | 삼성전자 주식회사 | 기판 구조체, 이를 포함한 cmos 소자 및 cmos 소자 제조 방법 |
US9218963B2 (en) | 2013-12-19 | 2015-12-22 | Asm Ip Holding B.V. | Cyclical deposition of germanium |
US9806122B2 (en) | 2014-07-25 | 2017-10-31 | Omnivision Technologies, Inc. | Visible and infrared image sensor |
KR102257423B1 (ko) | 2015-01-23 | 2021-05-31 | 삼성전자주식회사 | 반도체 기판 및 이를 포함하는 반도체 장치 |
WO2017065692A1 (en) * | 2015-10-13 | 2017-04-20 | Nanyang Technological University | Method of manufacturing a germanium-on-insulator substrate |
US9570297B1 (en) * | 2015-12-09 | 2017-02-14 | International Business Machines Corporation | Elimination of defects in long aspect ratio trapping trench structures |
EP3785289A1 (de) | 2018-04-22 | 2021-03-03 | Epinovatech AB | Verstärktes dünnschichtbauelement |
EP3813240A1 (de) | 2019-10-25 | 2021-04-28 | Epinovatech AB | Gleichstrom-wechselstrom-umrichterschaltung |
EP3836227A1 (de) | 2019-12-11 | 2021-06-16 | Epinovatech AB | Halbleiterschichtstruktur |
EP3866189B1 (de) | 2020-02-14 | 2022-09-28 | Epinovatech AB | Mmic-frontend-modul |
EP3879706A1 (de) | 2020-03-13 | 2021-09-15 | Epinovatech AB | Feldprogrammierbare gate-array-vorrichtung |
EP4101945B1 (de) | 2021-06-09 | 2024-05-15 | Epinovatech AB | Vorrichtung zur durchführung von wasserelektrolyse und system dafür |
WO2023172950A2 (en) * | 2022-03-09 | 2023-09-14 | Sierra Nevada Corporation | Compositionally graded buffer for thermo-photovoltaic systems |
Family Cites Families (180)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US213262A (en) * | 1879-03-11 | Improvement in expansible and contractible cores for rolls of paper | ||
US215244A (en) * | 1879-05-13 | Improvement in elevators | ||
US48239A (en) * | 1865-06-13 | Improved water-proof collar and cuff | ||
US199169A (en) * | 1878-01-15 | Improvement in chandeliers for oil-burners | ||
US54338A (en) * | 1866-05-01 | Broom-head | ||
US227783A (en) * | 1880-05-18 | Thomas | ||
US1022482A (en) * | 1907-08-07 | 1912-04-09 | Gen Electric | Filament connection. |
US1020900A (en) * | 1910-06-20 | 1912-03-19 | Artemus N Hadley | Oblique-angled gearing. |
US1174928A (en) * | 1914-07-17 | 1916-03-07 | Stafford Co | Warp stop-motion for looms. |
US2071491A (en) * | 1934-06-27 | 1937-02-23 | Nat Malleable & Steel Castings | Centralizing and controlling mechanism for car couplers |
US2071488A (en) * | 1934-09-26 | 1937-02-23 | Standard Oil Dev Co | Antifreeze lubricating grease |
US2071495A (en) * | 1935-09-03 | 1937-02-23 | Brunner Herman | Sand spreader |
US2082514A (en) * | 1936-01-06 | 1937-06-01 | Robinson Ivan Chance | Carburetor |
US2342777A (en) * | 1942-09-17 | 1944-02-29 | Douglas & Lomason Co | Nail |
US4010045A (en) | 1973-12-13 | 1977-03-01 | Ruehrwein Robert A | Process for production of III-V compound crystals |
JPH0656887B2 (ja) * | 1982-02-03 | 1994-07-27 | 株式会社日立製作所 | 半導体装置およびその製法 |
DE3542482A1 (de) | 1985-11-30 | 1987-06-04 | Licentia Gmbh | Modulationsdotierter feldeffekttransistor |
US5298452A (en) * | 1986-09-12 | 1994-03-29 | International Business Machines Corporation | Method and apparatus for low temperature, low pressure chemical vapor deposition of epitaxial silicon layers |
US4987462A (en) | 1987-01-06 | 1991-01-22 | Texas Instruments Incorporated | Power MISFET |
JPH0637025B2 (ja) | 1987-09-14 | 1994-05-18 | スピードファム株式会社 | ウエハの鏡面加工装置 |
US4900372A (en) | 1987-11-13 | 1990-02-13 | Kopin Corporation | III-V on Si heterostructure using a thermal strain layer |
US5130269A (en) | 1988-04-27 | 1992-07-14 | Fujitsu Limited | Hetero-epitaxially grown compound semiconductor substrate and a method of growing the same |
DE3816358A1 (de) | 1988-05-13 | 1989-11-23 | Eurosil Electronic Gmbh | Nichtfluechtige speicherzelle und verfahren zur herstellung |
US5250445A (en) * | 1988-12-20 | 1993-10-05 | Texas Instruments Incorporated | Discretionary gettering of semiconductor circuits |
US5241197A (en) | 1989-01-25 | 1993-08-31 | Hitachi, Ltd. | Transistor provided with strained germanium layer |
US4997776A (en) * | 1989-03-06 | 1991-03-05 | International Business Machines Corp. | Complementary bipolar transistor structure and method for manufacture |
GB8905511D0 (en) | 1989-03-10 | 1989-04-19 | British Telecomm | Preparing substrates |
US5210052A (en) | 1989-05-18 | 1993-05-11 | Fujitsu Limited | Method for fabricating a semiconductor substrate |
US5013681A (en) | 1989-09-29 | 1991-05-07 | The United States Of America As Represented By The Secretary Of The Navy | Method of producing a thin silicon-on-insulator layer |
US5202284A (en) | 1989-12-01 | 1993-04-13 | Hewlett-Packard Company | Selective and non-selective deposition of Si1-x Gex on a Si subsrate that is partially masked with SiO2 |
DE69032597T2 (de) * | 1990-02-20 | 1999-03-25 | Toshiba Kawasaki Kk | Bipolartransistor mit Heteroübergang |
US5164359A (en) | 1990-04-20 | 1992-11-17 | Eaton Corporation | Monolithic integrated circuit having compound semiconductor layer epitaxially grown on ceramic substrate |
US5316958A (en) | 1990-05-31 | 1994-05-31 | International Business Machines Corporation | Method of dopant enhancement in an epitaxial silicon layer by using germanium |
US5158907A (en) | 1990-08-02 | 1992-10-27 | At&T Bell Laboratories | Method for making semiconductor devices with low dislocation defects |
US5155571A (en) | 1990-08-06 | 1992-10-13 | The Regents Of The University Of California | Complementary field effect transistors having strained superlattice structure |
JPH04198095A (ja) | 1990-11-28 | 1992-07-17 | Fujitsu Ltd | 化合物半導体薄膜成長方法 |
US5240876A (en) | 1991-02-22 | 1993-08-31 | Harris Corporation | Method of fabricating SOI wafer with SiGe as an etchback film in a BESOI process |
US5091767A (en) | 1991-03-18 | 1992-02-25 | At&T Bell Laboratories | Article comprising a lattice-mismatched semiconductor heterostructure |
US5442205A (en) † | 1991-04-24 | 1995-08-15 | At&T Corp. | Semiconductor heterostructure devices with strained semiconductor layers |
US5221413A (en) * | 1991-04-24 | 1993-06-22 | At&T Bell Laboratories | Method for making low defect density semiconductor heterostructure and devices made thereby |
CA2062134C (en) * | 1991-05-31 | 1997-03-25 | Ibm | Heteroepitaxial layers with low defect density and arbitrary network parameter |
JPH07187892A (ja) | 1991-06-28 | 1995-07-25 | Internatl Business Mach Corp <Ibm> | シリコン及びその形成方法 |
SG67879A1 (en) | 1991-08-22 | 1999-10-19 | At & T Corp | Removal of substrate perimeter material |
US5166084A (en) | 1991-09-03 | 1992-11-24 | Motorola, Inc. | Process for fabricating a silicon on insulator field effect transistor |
US5291439A (en) | 1991-09-12 | 1994-03-01 | International Business Machines Corporation | Semiconductor memory cell and memory array with inversion layer |
FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
JP3243303B2 (ja) * | 1991-10-28 | 2002-01-07 | ゼロックス・コーポレーション | 量子閉じ込め半導体発光素子及びその製造方法 |
US5208182A (en) | 1991-11-12 | 1993-05-04 | Kopin Corporation | Dislocation density reduction in gallium arsenide on silicon heterostructures |
US5207864A (en) | 1991-12-30 | 1993-05-04 | Bell Communications Research | Low-temperature fusion of dissimilar semiconductors |
JP3191972B2 (ja) | 1992-01-31 | 2001-07-23 | キヤノン株式会社 | 半導体基板の作製方法及び半導体基板 |
US5467305A (en) | 1992-03-12 | 1995-11-14 | International Business Machines Corporation | Three-dimensional direct-write EEPROM arrays and fabrication methods |
US5426069A (en) | 1992-04-09 | 1995-06-20 | Dalsa Inc. | Method for making silicon-germanium devices using germanium implantation |
US5212110A (en) | 1992-05-26 | 1993-05-18 | Motorola, Inc. | Method for forming isolation regions in a semiconductor device |
US5461250A (en) | 1992-08-10 | 1995-10-24 | International Business Machines Corporation | SiGe thin film or SOI MOSFET and method for making the same |
JPH06140624A (ja) | 1992-10-22 | 1994-05-20 | Furukawa Electric Co Ltd:The | ショットキー接合素子 |
US5386132A (en) | 1992-11-02 | 1995-01-31 | Wong; Chun C. D. | Multimedia storage system with highly compact memory device |
US5418743A (en) | 1992-12-07 | 1995-05-23 | Nippon Steel Corporation | Method of writing into non-volatile semiconductor memory |
US5523243A (en) | 1992-12-21 | 1996-06-04 | International Business Machines Corporation | Method of fabricating a triple heterojunction bipolar transistor |
US5523592A (en) | 1993-02-03 | 1996-06-04 | Hitachi, Ltd. | Semiconductor optical device, manufacturing method for the same, and opto-electronic integrated circuit using the same |
JP3093904B2 (ja) * | 1993-02-16 | 2000-10-03 | 富士通株式会社 | 化合物半導体結晶の成長方法 |
US5308444A (en) | 1993-05-28 | 1994-05-03 | At&T Bell Laboratories | Method of making semiconductor heterostructures of gallium arsenide on germanium |
US5346848A (en) | 1993-06-01 | 1994-09-13 | Motorola, Inc. | Method of bonding silicon and III-V semiconductor materials |
US5413679A (en) | 1993-06-30 | 1995-05-09 | The United States Of America As Represented By The Secretary Of The Navy | Method of producing a silicon membrane using a silicon alloy etch stop layer |
US5310451A (en) | 1993-08-19 | 1994-05-10 | International Business Machines Corporation | Method of forming an ultra-uniform silicon-on-insulator layer |
US5792679A (en) | 1993-08-30 | 1998-08-11 | Sharp Microelectronics Technology, Inc. | Method for forming silicon-germanium/Si/silicon dioxide heterostructure using germanium implant |
JPH0794420A (ja) | 1993-09-20 | 1995-04-07 | Fujitsu Ltd | 化合物半導体結晶基板の製造方法 |
US5461243A (en) | 1993-10-29 | 1995-10-24 | International Business Machines Corporation | Substrate for tensilely strained semiconductor |
JP2980497B2 (ja) | 1993-11-15 | 1999-11-22 | 株式会社東芝 | 誘電体分離型バイポーラトランジスタの製造方法 |
KR0123434B1 (ko) | 1994-02-07 | 1997-11-26 | 천성순 | 실리콘 웨이퍼에서의 부정합전위의 발생을 억제화하기 위한 링패턴 형성방법 및 그 구조 |
JP2669368B2 (ja) | 1994-03-16 | 1997-10-27 | 日本電気株式会社 | Si基板上化合物半導体積層構造の製造方法 |
US5534713A (en) * | 1994-05-20 | 1996-07-09 | International Business Machines Corporation | Complementary metal-oxide semiconductor transistor logic using strained SI/SIGE heterostructure layers |
US5479033A (en) | 1994-05-27 | 1995-12-26 | Sandia Corporation | Complementary junction heterostructure field-effect transistor |
JP3116731B2 (ja) | 1994-07-25 | 2000-12-11 | 株式会社日立製作所 | 格子不整合系積層結晶構造およびそれを用いた半導体装置 |
US6218677B1 (en) * | 1994-08-15 | 2001-04-17 | Texas Instruments Incorporated | III-V nitride resonant tunneling |
JP3361922B2 (ja) | 1994-09-13 | 2003-01-07 | 株式会社東芝 | 半導体装置 |
US5561302A (en) | 1994-09-26 | 1996-10-01 | Motorola, Inc. | Enhanced mobility MOSFET device and method |
WO1996015550A1 (en) | 1994-11-10 | 1996-05-23 | Lawrence Semiconductor Research Laboratory, Inc. | Silicon-germanium-carbon compositions and processes thereof |
US5548128A (en) | 1994-12-14 | 1996-08-20 | The United States Of America As Represented By The Secretary Of The Air Force | Direct-gap germanium-tin multiple-quantum-well electro-optical devices on silicon or germanium substrates |
US5937274A (en) * | 1995-01-31 | 1999-08-10 | Hitachi, Ltd. | Fabrication method for AlGaIn NPAsSb based devices |
US5539214A (en) * | 1995-02-06 | 1996-07-23 | Regents Of The University Of California | Quantum bridges fabricated by selective etching of superlattice structures |
US5777347A (en) | 1995-03-07 | 1998-07-07 | Hewlett-Packard Company | Vertical CMOS digital multi-valued restoring logic device |
US5920088A (en) * | 1995-06-16 | 1999-07-06 | Interuniversitair Micro-Electronica Centrum (Imec Vzw) | Vertical MISFET devices |
US6010937A (en) | 1995-09-05 | 2000-01-04 | Spire Corporation | Reduction of dislocations in a heteroepitaxial semiconductor structure |
JP3403877B2 (ja) | 1995-10-25 | 2003-05-06 | 三菱電機株式会社 | 半導体記憶装置とその製造方法 |
JPH11500873A (ja) | 1995-12-15 | 1999-01-19 | フィリップス エレクトロニクス ネムローゼ フェンノートシャップ | SiGe層を具えた半導体電界効果デバイス |
JP3659528B2 (ja) * | 1996-01-08 | 2005-06-15 | キヤノン株式会社 | テレビ会議システム |
US6403975B1 (en) * | 1996-04-09 | 2002-06-11 | Max-Planck Gesellschaft Zur Forderung Der Wissenschafteneev | Semiconductor components, in particular photodetectors, light emitting diodes, optical modulators and waveguides with multilayer structures grown on silicon substrates |
US5943560A (en) | 1996-04-19 | 1999-08-24 | National Science Council | Method to fabricate the thin film transistor |
US6039803A (en) | 1996-06-28 | 2000-03-21 | Massachusetts Institute Of Technology | Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon |
JP3217015B2 (ja) | 1996-07-18 | 2001-10-09 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 電界効果トランジスタの形成方法 |
JPH1041400A (ja) | 1996-07-26 | 1998-02-13 | Sony Corp | 半導体装置およびその製造方法 |
US6191432B1 (en) * | 1996-09-02 | 2001-02-20 | Kabushiki Kaisha Toshiba | Semiconductor device and memory device |
US6399970B2 (en) * | 1996-09-17 | 2002-06-04 | Matsushita Electric Industrial Co., Ltd. | FET having a Si/SiGeC heterojunction channel |
US5847419A (en) | 1996-09-17 | 1998-12-08 | Kabushiki Kaisha Toshiba | Si-SiGe semiconductor device and method of fabricating the same |
DE59707274D1 (de) | 1996-09-27 | 2002-06-20 | Infineon Technologies Ag | Integrierte CMOS-Schaltungsanordnung und Verfahren zu deren Herstellung |
US5859864A (en) | 1996-10-28 | 1999-01-12 | Picolight Incorporated | Extended wavelength lasers having a restricted growth surface and graded lattice mismatch |
US6140687A (en) | 1996-11-28 | 2000-10-31 | Matsushita Electric Industrial Co., Ltd. | High frequency ring gate MOSFET |
US5808344A (en) | 1996-12-13 | 1998-09-15 | International Business Machines Corporation | Single-transistor logic and CMOS inverters |
KR100212693B1 (ko) | 1996-12-14 | 1999-08-02 | 권혁준 | 규소/규소게르마늄 모스 전계 트랜지스터 및 그 제조방법 |
US5714777A (en) * | 1997-02-19 | 1998-02-03 | International Business Machines Corporation | Si/SiGe vertical junction field effect transistor |
EP0867701A1 (de) * | 1997-03-28 | 1998-09-30 | Interuniversitair Microelektronica Centrum Vzw | Herstellungsverfahren eines infrarotempfindlichen Strahlungsdetektors, insbesondere eines infrarotempfindlichen Bolometers |
US5891769A (en) * | 1997-04-07 | 1999-04-06 | Motorola, Inc. | Method for forming a semiconductor device having a heteroepitaxial layer |
US5786614A (en) | 1997-04-08 | 1998-07-28 | Taiwan Semiconductor Manufacturing Co., Ltd. | Separated floating gate for EEPROM application |
US6191007B1 (en) * | 1997-04-28 | 2001-02-20 | Denso Corporation | Method for manufacturing a semiconductor substrate |
US5906951A (en) | 1997-04-30 | 1999-05-25 | International Business Machines Corporation | Strained Si/SiGe layers on insulator |
US6033974A (en) | 1997-05-12 | 2000-03-07 | Silicon Genesis Corporation | Method for controlled cleaving process |
DE19720008A1 (de) | 1997-05-13 | 1998-11-19 | Siemens Ag | Integrierte CMOS-Schaltungsanordnung und Verfahren zu deren Herstellung |
US5877070A (en) | 1997-05-31 | 1999-03-02 | Max-Planck Society | Method for the transfer of thin layers of monocrystalline material to a desirable substrate |
JP3535527B2 (ja) * | 1997-06-24 | 2004-06-07 | マサチューセッツ インスティテュート オブ テクノロジー | 傾斜GeSi層と平坦化を用いたゲルマニウム・オン・シリコンの貫通転位の制御 |
US5936274A (en) | 1997-07-08 | 1999-08-10 | Micron Technology, Inc. | High density flash memory |
US6051511A (en) * | 1997-07-31 | 2000-04-18 | Micron Technology, Inc. | Method and apparatus for reducing isolation stress in integrated circuits |
US6160303A (en) | 1997-08-29 | 2000-12-12 | Texas Instruments Incorporated | Monolithic inductor with guard rings |
US6033995A (en) | 1997-09-16 | 2000-03-07 | Trw Inc. | Inverted layer epitaxial liftoff process |
US5966622A (en) | 1997-10-08 | 1999-10-12 | Lucent Technologies Inc. | Process for bonding crystalline substrates with different crystal lattices |
US5963817A (en) | 1997-10-16 | 1999-10-05 | International Business Machines Corporation | Bulk and strained silicon on insulator using local selective oxidation |
US6232138B1 (en) * | 1997-12-01 | 2001-05-15 | Massachusetts Institute Of Technology | Relaxed InxGa(1-x)as buffers |
US6154475A (en) | 1997-12-04 | 2000-11-28 | The United States Of America As Represented By The Secretary Of The Air Force | Silicon-based strain-symmetrized GE-SI quantum lasers |
JP3447939B2 (ja) | 1997-12-10 | 2003-09-16 | 株式会社東芝 | 不揮発性半導体メモリ及びデータ読み出し方法 |
FR2773177B1 (fr) | 1997-12-29 | 2000-03-17 | France Telecom | Procede d'obtention d'une couche de germanium ou silicium monocristallin sur un substrat de silicium ou germanium monocristallin, respectivement, et produits multicouches obtenus |
US6013134A (en) | 1998-02-18 | 2000-01-11 | International Business Machines Corporation | Advance integrated chemical vapor deposition (AICVD) for semiconductor devices |
US6153495A (en) | 1998-03-09 | 2000-11-28 | Intersil Corporation | Advanced methods for making semiconductor devices by low temperature direct bonding |
US6521041B2 (en) * | 1998-04-10 | 2003-02-18 | Massachusetts Institute Of Technology | Etch stop layer system |
JP4258034B2 (ja) * | 1998-05-27 | 2009-04-30 | ソニー株式会社 | 半導体装置及び半導体装置の製造方法 |
US6372356B1 (en) * | 1998-06-04 | 2002-04-16 | Xerox Corporation | Compliant substrates for growing lattice mismatched films |
US6291326B1 (en) * | 1998-06-23 | 2001-09-18 | Silicon Genesis Corporation | Pre-semiconductor process implant and post-process film separation |
JP3403076B2 (ja) * | 1998-06-30 | 2003-05-06 | 株式会社東芝 | 半導体装置及びその製造方法 |
US6335546B1 (en) * | 1998-07-31 | 2002-01-01 | Sharp Kabushiki Kaisha | Nitride semiconductor structure, method for producing a nitride semiconductor structure, and light emitting device |
US6368733B1 (en) * | 1998-08-06 | 2002-04-09 | Showa Denko K.K. | ELO semiconductor substrate |
US20010047751A1 (en) * | 1998-11-24 | 2001-12-06 | Andrew Y. Kim | Method of producing device quality (a1) ingap alloys on lattice-mismatched substrates |
DE19859429A1 (de) | 1998-12-22 | 2000-06-29 | Daimler Chrysler Ag | Verfahren zur Herstellung epitaktischer Silizium-Germaniumschichten |
JP2000186000A (ja) * | 1998-12-22 | 2000-07-04 | Speedfam-Ipec Co Ltd | シリコンウェーハ加工方法およびその装置 |
US6130453A (en) | 1999-01-04 | 2000-10-10 | International Business Machines Corporation | Flash memory structure with floating gate in vertical trench |
US6162688A (en) | 1999-01-14 | 2000-12-19 | Advanced Micro Devices, Inc. | Method of fabricating a transistor with a dielectric underlayer and device incorporating same |
DE60042666D1 (de) * | 1999-01-14 | 2009-09-17 | Panasonic Corp | Halbleiterbauelement und Verfahren zu dessen Herstellung |
EP1173893A4 (de) * | 1999-01-15 | 2007-08-01 | Univ California | Polykristalline silizium-germanium-filme zur herstellung mikroelektrochemischer systeme |
US6074919A (en) | 1999-01-20 | 2000-06-13 | Advanced Micro Devices, Inc. | Method of forming an ultrathin gate dielectric |
US6133799A (en) | 1999-02-25 | 2000-10-17 | International Business Machines Corporation | Voltage controlled oscillator utilizing threshold voltage control of silicon on insulator MOSFETS |
US6350993B1 (en) * | 1999-03-12 | 2002-02-26 | International Business Machines Corporation | High speed composite p-channel Si/SiGe heterostructure for field effect devices |
US6103559A (en) | 1999-03-30 | 2000-08-15 | Amd, Inc. (Advanced Micro Devices) | Method of making disposable channel masking for both source/drain and LDD implant and subsequent gate fabrication |
US6251755B1 (en) * | 1999-04-22 | 2001-06-26 | International Business Machines Corporation | High resolution dopant/impurity incorporation in semiconductors via a scanned atomic force probe |
EP1965431A2 (de) * | 1999-06-22 | 2008-09-03 | Matsushita Electric Industrial Co., Ltd. | Heteroübergangsbipolartransistor und Verfahren zu dessen Herstellung |
US6151248A (en) | 1999-06-30 | 2000-11-21 | Sandisk Corporation | Dual floating gate EEPROM cell array with steering gates shared by adjacent cells |
JP2001036054A (ja) * | 1999-07-19 | 2001-02-09 | Mitsubishi Electric Corp | Soi基板の製造方法 |
US6512385B1 (en) * | 1999-07-26 | 2003-01-28 | Paul Pfaff | Method for testing a device under test including the interference of two beams |
US6242324B1 (en) * | 1999-08-10 | 2001-06-05 | The United States Of America As Represented By The Secretary Of The Navy | Method for fabricating singe crystal materials over CMOS devices |
US6204529B1 (en) * | 1999-08-27 | 2001-03-20 | Hsing Lan Lung | 8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate |
US6235567B1 (en) * | 1999-08-31 | 2001-05-22 | International Business Machines Corporation | Silicon-germanium bicmos on soi |
US6339232B1 (en) * | 1999-09-20 | 2002-01-15 | Kabushika Kaisha Toshiba | Semiconductor device |
US6249022B1 (en) * | 1999-10-22 | 2001-06-19 | United Microelectronics Corp. | Trench flash memory with nitride spacers for electron trapping |
US6591321B1 (en) * | 1999-11-09 | 2003-07-08 | International Business Machines Corporation | Multiprocessor system bus protocol with group addresses, responses, and priorities |
US6352909B1 (en) * | 2000-01-06 | 2002-03-05 | Silicon Wafer Technologies, Inc. | Process for lift-off of a layer from a substrate |
US6271726B1 (en) | 2000-01-10 | 2001-08-07 | Conexant Systems, Inc. | Wideband, variable gain amplifier |
US6602613B1 (en) * | 2000-01-20 | 2003-08-05 | Amberwave Systems Corporation | Heterointegration of materials using deposition and bonding |
US6750130B1 (en) * | 2000-01-20 | 2004-06-15 | Amberwave Systems Corporation | Heterointegration of materials using deposition and bonding |
US6261929B1 (en) | 2000-02-24 | 2001-07-17 | North Carolina State University | Methods of forming a plurality of semiconductor layers using spaced trench arrays |
US6969875B2 (en) * | 2000-05-26 | 2005-11-29 | Amberwave Systems Corporation | Buried channel strained silicon FET using a supply layer created through ion implantation |
US7503975B2 (en) * | 2000-06-27 | 2009-03-17 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and fabrication method therefor |
US6583015B2 (en) * | 2000-08-07 | 2003-06-24 | Amberwave Systems Corporation | Gate technology for strained surface channel and strained buried channel MOSFET devices |
EP1309989B1 (de) * | 2000-08-16 | 2007-01-10 | Massachusetts Institute Of Technology | Verfahren für die herstellung eines halbleiterartikels mittels graduellem epitaktischen wachsen |
US6524935B1 (en) * | 2000-09-29 | 2003-02-25 | International Business Machines Corporation | Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique |
US6649480B2 (en) * | 2000-12-04 | 2003-11-18 | Amberwave Systems Corporation | Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
US20020100942A1 (en) * | 2000-12-04 | 2002-08-01 | Fitzgerald Eugene A. | CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs |
US6703688B1 (en) * | 2001-03-02 | 2004-03-09 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6724008B2 (en) * | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
US6677192B1 (en) * | 2001-03-02 | 2004-01-13 | Amberwave Systems Corporation | Method of fabricating a relaxed silicon germanium platform having planarizing for high speed CMOS electronics and high speed analog circuits |
US6723661B2 (en) * | 2001-03-02 | 2004-04-20 | Amberwave Systems Corporation | Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits |
AU2002322105A1 (en) * | 2001-06-14 | 2003-01-02 | Amberware Systems Corporation | Method of selective removal of sige alloys |
US6717213B2 (en) * | 2001-06-29 | 2004-04-06 | Intel Corporation | Creation of high mobility channels in thin-body SOI devices |
WO2003015142A2 (en) * | 2001-08-06 | 2003-02-20 | Massachusetts Institute Of Technology | Formation of planar strained layers |
US6974735B2 (en) * | 2001-08-09 | 2005-12-13 | Amberwave Systems Corporation | Dual layer Semiconductor Devices |
US6784101B1 (en) * | 2002-05-16 | 2004-08-31 | Advanced Micro Devices Inc | Formation of high-k gate dielectric layers for MOS devices fabricated on strained lattice semiconductor substrates with minimized stress relaxation |
US6689671B1 (en) * | 2002-05-22 | 2004-02-10 | Advanced Micro Devices, Inc. | Low temperature solid-phase epitaxy fabrication process for MOS devices built on strained semiconductor substrate |
US6995430B2 (en) * | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
US7074623B2 (en) * | 2002-06-07 | 2006-07-11 | Amberwave Systems Corporation | Methods of forming strained-semiconductor-on-insulator finFET device structures |
US20070012910A1 (en) * | 2003-06-26 | 2007-01-18 | Rj Mears, Llc | Semiconductor Device Including a Channel with a Non-Semiconductor Layer Monolayer |
US7531828B2 (en) * | 2003-06-26 | 2009-05-12 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions |
US20070010040A1 (en) * | 2003-06-26 | 2007-01-11 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Strained Superlattice Layer Above a Stress Layer |
US20070015344A1 (en) * | 2003-06-26 | 2007-01-18 | Rj Mears, Llc | Method for Making a Semiconductor Device Including a Strained Superlattice Between at Least One Pair of Spaced Apart Stress Regions |
US7612366B2 (en) * | 2003-06-26 | 2009-11-03 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice layer above a stress layer |
US7598515B2 (en) * | 2003-06-26 | 2009-10-06 | Mears Technologies, Inc. | Semiconductor device including a strained superlattice and overlying stress layer and related methods |
-
1998
- 1998-06-23 JP JP50500499A patent/JP3535527B2/ja not_active Expired - Fee Related
- 1998-06-23 KR KR10-1999-7012279A patent/KR100400808B1/ko not_active IP Right Cessation
- 1998-06-23 EP EP98931529A patent/EP1016129B2/de not_active Expired - Lifetime
- 1998-06-23 WO PCT/US1998/013076 patent/WO1998059365A1/en active IP Right Grant
- 1998-06-23 DE DE69827824T patent/DE69827824T3/de not_active Expired - Fee Related
- 1998-06-23 AT AT98931529T patent/ATE283549T1/de not_active IP Right Cessation
- 1998-06-23 US US09/103,672 patent/US6107653A/en not_active Expired - Lifetime
- 1998-06-23 CA CA002295069A patent/CA2295069A1/en not_active Abandoned
-
1999
- 1999-03-09 US US09/265,016 patent/US6291321B1/en not_active Expired - Lifetime
-
2000
- 2000-07-06 US US09/611,024 patent/US6876010B1/en not_active Expired - Fee Related
-
2001
- 2001-12-17 US US10/022,689 patent/US7250359B2/en not_active Expired - Fee Related
-
2004
- 2004-04-16 US US10/826,156 patent/US7081410B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE69827824T2 (de) | 2005-11-24 |
US6876010B1 (en) | 2005-04-05 |
US7081410B2 (en) | 2006-07-25 |
JP2000513507A (ja) | 2000-10-10 |
CA2295069A1 (en) | 1998-12-30 |
US6291321B1 (en) | 2001-09-18 |
KR100400808B1 (ko) | 2003-10-08 |
EP1016129B1 (de) | 2004-11-24 |
US6107653A (en) | 2000-08-22 |
KR20010014201A (ko) | 2001-02-26 |
US7250359B2 (en) | 2007-07-31 |
US20040262631A1 (en) | 2004-12-30 |
EP1016129B2 (de) | 2009-06-10 |
US20020084000A1 (en) | 2002-07-04 |
ATE283549T1 (de) | 2004-12-15 |
DE69827824T3 (de) | 2009-09-03 |
JP3535527B2 (ja) | 2004-06-07 |
EP1016129A1 (de) | 2000-07-05 |
WO1998059365A1 (en) | 1998-12-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69827824D1 (de) | Kontrolle der verspannungsdichte durch verwendung von gradientenschichten und durch planarisierung | |
US6703144B2 (en) | Heterointegration of materials using deposition and bonding | |
ATE464654T1 (de) | Verfahren zur bildung einer schicht aus relaxiertem sige-auf-isolator | |
US8664084B2 (en) | Method for making a thin-film element | |
DE60329293D1 (de) | Übertragung einer dünnen schicht von einer scheibe mit einer pufferschicht | |
WO2000058999A3 (en) | Semiconductor structures having a strain compensated layer and method of fabrication | |
JP4975513B2 (ja) | シリコン(Si)ウェハ上に、熱軟化性絶縁体と共に化合物半導体を形成する方法、及びシリコンウェハ | |
CA2412999A1 (en) | Nitride semiconductor substrate and method for manufacturing the same, and nitride semiconductor device using nitride semiconductor substrate | |
WO2004061911A8 (en) | Semiconductor devices with reduced active region defects and unique contacting schemes | |
EP0845803A4 (de) | SiC-BAUELEMENT UND VERFAHREN ZU SEINER HERSTELLUNG | |
CA2463169A1 (en) | Method and device for fabricating semiconductor light emitting elements | |
SG143126A1 (en) | Method of manufacturing a semiconductor heterostructure | |
WO2000016378A3 (en) | Method of fabricating group-iii nitride-based semiconductor device | |
WO2003069658B1 (en) | Strained si based layer made by uhv-cvd, and devices therein | |
KR20070042987A (ko) | 향상된 열 전도도를 갖는 변형 실리콘 재료를 형성시키는방법 | |
WO2004102635A3 (en) | Methods for preserving strained semiconductor layers during oxide layer formation | |
JPS55165691A (en) | Compound semiconductor laser element | |
WO2003045837A3 (en) | Stress control of semiconductor microstructures for thin film growth | |
US6750130B1 (en) | Heterointegration of materials using deposition and bonding | |
DE602004030368D1 (de) | Herstellung von gitterabstimmungs-halbleitersubstraten | |
CA2130149A1 (en) | Sub-micron bonded soi by trench planarization | |
EP0814548A3 (de) | Halbleiterlaser | |
CN1172376C (zh) | 一种类似绝缘层上硅结构的材料及制备方法 | |
CA2030484A1 (en) | Semiconductor pressure sensor and method for manufacturing the same | |
JPS5752126A (en) | Compound semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
8363 | Opposition against the patent | ||
8366 | Restricted maintained after opposition proceedings | ||
8339 | Ceased/non-payment of the annual fee |