DE602004030368D1 - Herstellung von gitterabstimmungs-halbleitersubstraten - Google Patents

Herstellung von gitterabstimmungs-halbleitersubstraten

Info

Publication number
DE602004030368D1
DE602004030368D1 DE602004030368T DE602004030368T DE602004030368D1 DE 602004030368 D1 DE602004030368 D1 DE 602004030368D1 DE 602004030368 T DE602004030368 T DE 602004030368T DE 602004030368 T DE602004030368 T DE 602004030368T DE 602004030368 D1 DE602004030368 D1 DE 602004030368D1
Authority
DE
Germany
Prior art keywords
sige
layer
depression
isolating layer
window
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004030368T
Other languages
English (en)
Inventor
Adam Daniel Capewell
Evan Hubert Parker
Timothy John Grasby
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AdvanceSis Ltd
Original Assignee
AdvanceSis Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AdvanceSis Ltd filed Critical AdvanceSis Ltd
Publication of DE602004030368D1 publication Critical patent/DE602004030368D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • C30B25/183Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/02546Arsenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02647Lateral overgrowth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
DE602004030368T 2003-11-12 2004-10-28 Herstellung von gitterabstimmungs-halbleitersubstraten Active DE602004030368D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB0326321.7A GB0326321D0 (en) 2003-11-12 2003-11-12 Formation of lattice-tuning semiconductor substrates
PCT/GB2004/050022 WO2005048330A1 (en) 2003-11-12 2004-10-28 Formation of lattice-tuning semiconductor substrates

Publications (1)

Publication Number Publication Date
DE602004030368D1 true DE602004030368D1 (de) 2011-01-13

Family

ID=29726357

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004030368T Active DE602004030368D1 (de) 2003-11-12 2004-10-28 Herstellung von gitterabstimmungs-halbleitersubstraten

Country Status (9)

Country Link
US (1) US20090035921A1 (de)
EP (1) EP1687841B1 (de)
JP (1) JP2007513499A (de)
KR (1) KR20060126968A (de)
CN (1) CN100444323C (de)
AT (1) ATE490549T1 (de)
DE (1) DE602004030368D1 (de)
GB (1) GB0326321D0 (de)
WO (1) WO2005048330A1 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US7777250B2 (en) 2006-03-24 2010-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures and related methods for device fabrication
EP2062290B1 (de) * 2006-09-07 2019-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Defektreduzierung durch kontrolle des aspektverhältnisses
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
US7799592B2 (en) 2006-09-27 2010-09-21 Taiwan Semiconductor Manufacturing Company, Ltd. Tri-gate field-effect transistors formed by aspect ratio trapping
US8502263B2 (en) 2006-10-19 2013-08-06 Taiwan Semiconductor Manufacturing Company, Ltd. Light-emitter-based devices with lattice-mismatched semiconductor structures
US9508890B2 (en) 2007-04-09 2016-11-29 Taiwan Semiconductor Manufacturing Company, Ltd. Photovoltaics on silicon
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
DE112008002387B4 (de) 2007-09-07 2022-04-07 Taiwan Semiconductor Manufacturing Co., Ltd. Struktur einer Mehrfachübergangs-Solarzelle, Verfahren zur Bildung einer photonischenVorrichtung, Photovoltaische Mehrfachübergangs-Zelle und Photovoltaische Mehrfachübergangs-Zellenvorrichtung,
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
JP5416212B2 (ja) * 2008-09-19 2014-02-12 台湾積體電路製造股▲ふん▼有限公司 エピタキシャル層の成長によるデバイス形成
US20100072515A1 (en) 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
CN102379046B (zh) 2009-04-02 2015-06-17 台湾积体电路制造股份有限公司 从晶体材料的非极性平面形成的器件及其制作方法
US8541315B2 (en) * 2011-09-19 2013-09-24 International Business Machines Corporation High throughput epitaxial lift off for flexible electronics
US9142400B1 (en) 2012-07-17 2015-09-22 Stc.Unm Method of making a heteroepitaxial layer on a seed area

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3574008A (en) * 1968-08-19 1971-04-06 Trw Semiconductors Inc Mushroom epitaxial growth in tier-type shaped holes
US4749441A (en) * 1986-12-11 1988-06-07 General Motors Corporation Semiconductor mushroom structure fabrication
US5236546A (en) * 1987-01-26 1993-08-17 Canon Kabushiki Kaisha Process for producing crystal article
JPH04315419A (ja) * 1991-04-12 1992-11-06 Nec Corp 元素半導体基板上の絶縁膜/化合物半導体積層構造
JPH05136415A (ja) * 1991-11-11 1993-06-01 Canon Inc 電界効果トランジスター及びその製造方法
US6674102B2 (en) * 2001-01-25 2004-01-06 International Business Machines Corporation Sti pull-down to control SiGe facet growth
WO2002064864A1 (fr) * 2001-02-14 2002-08-22 Toyoda Gosei Co., Ltd. Procede de production de cristal semi-conducteur et element lumineux semi-conducteur
JP4084541B2 (ja) * 2001-02-14 2008-04-30 豊田合成株式会社 半導体結晶及び半導体発光素子の製造方法
JP3705142B2 (ja) * 2001-03-27 2005-10-12 ソニー株式会社 窒化物半導体素子及びその作製方法
JP4345244B2 (ja) * 2001-05-31 2009-10-14 株式会社Sumco SiGe層の形成方法及びこれを用いた歪みSi層の形成方法と電界効果型トランジスタの製造方法
WO2002103812A1 (en) * 2001-06-13 2002-12-27 Matsushita Electric Industrial Co., Ltd. Nitride semiconductor, production method therefor and nitride semiconductor element
JP4285928B2 (ja) * 2001-07-02 2009-06-24 三洋電機株式会社 半導体層の形成方法
AU2002354254A1 (en) * 2001-12-20 2003-07-09 Matsushita Electric Industrial Co., Ltd. Method for making nitride semiconductor substrate and method for making nitride semiconductor device

Also Published As

Publication number Publication date
JP2007513499A (ja) 2007-05-24
KR20060126968A (ko) 2006-12-11
WO2005048330A1 (en) 2005-05-26
CN1879197A (zh) 2006-12-13
ATE490549T1 (de) 2010-12-15
EP1687841A1 (de) 2006-08-09
GB0326321D0 (en) 2003-12-17
CN100444323C (zh) 2008-12-17
US20090035921A1 (en) 2009-02-05
EP1687841B1 (de) 2010-12-01

Similar Documents

Publication Publication Date Title
DE602004030368D1 (de) Herstellung von gitterabstimmungs-halbleitersubstraten
WO2004006327A3 (en) Transfer of a thin layer from a wafer comprising a buffer layer
ATE524577T1 (de) Verfahren zur herstellung einer epitaktisch aufgewachsenen schicht
EP1598452A4 (de) Siliciumwafer, herstellungsverfahren dafür und verfahren zum ziehen eines siliciumeinkristalls
ATE534759T1 (de) Verfahren zur herstellung eines freistehenden substrates aus monokristallinem halbleitermaterial
WO2004090201A3 (fr) Procede de fabrication de cristaux monocristallins
EP1367150A4 (de) Verfahren zur herstellung von halbleiterkristall und halbleiter-leuchtelement
TW200721373A (en) Method for recycling an epitaxied donor wafer
EP1785511A4 (de) Siliziumwafer, herstellungsverfahren dafür und verfahren zum ziehen eines siliziumeinkristalls
WO2002015244A3 (en) Process for producing semiconductor article using graded expitaxial growth
TW200639969A (en) Treatmeny of a removed layer of Si1-yGey
WO2003025263A1 (fr) Substrat semi-conducteur de nitrure, son procede d'obtention et dispositif optique a semi-conducteur utilisant ledit substrat
TW200729343A (en) Method for fabricating controlled stress silicon nitride films
TW200603268A (en) Epitaxial compound semiconductor substrate and manufacturing method therefor
TW200516649A (en) GaN substrate, and manufacturing method for the same, nitride semiconductor device, and manufacturing method for the same
WO2002001608A3 (en) METHOD FOR ACHIEVING IMPROVED EPITAXY QUALITY (SURFACE TEXTURE AND DEFECT DENSITY) ON FREE-STANDING (ALUMINUM, INDIUM, GALLIUM) NITRIDE ((Al,In,Ga)N) SUBSTRATES FOR OPTO-ELECTRONIC AND ELECTRONIC DEVICES
WO2003005434A3 (fr) Procede de diminution de la rugosite de surface d'une tranche semicondutrice
TW200636098A (en) Method for growing silicon single crystal, and silicon wafer and SOI substrate using the same
WO2004027858A8 (en) Formation of a relaxed useful layer from a wafer with no buffer layer
TW200732524A (en) Method for producing semiconductor crystal
EP1293591A3 (de) Halbleitersubstrat aus Silizium und Verfahren zu ihrer Herstellung
WO2003068699A8 (en) Group iii nitride semiconductor crystal, production method thereof and group iii nitride semiconductor epitaxial wafer
AU2003222909A1 (en) Method for production of a layer of silicon carbide or a nitride of a group iii element on a suitable substrate
ATE370264T1 (de) Verfahren zur herstellung von substraten, insbesondere für die optik, elektronik und optoelektronik
WO2002059946A8 (en) Method of producing soi materials