DE69230359D1 - Halbleiteranordnung mit Schmelzsicherung - Google Patents

Halbleiteranordnung mit Schmelzsicherung

Info

Publication number
DE69230359D1
DE69230359D1 DE69230359T DE69230359T DE69230359D1 DE 69230359 D1 DE69230359 D1 DE 69230359D1 DE 69230359 T DE69230359 T DE 69230359T DE 69230359 T DE69230359 T DE 69230359T DE 69230359 D1 DE69230359 D1 DE 69230359D1
Authority
DE
Germany
Prior art keywords
fuse
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69230359T
Other languages
English (en)
Other versions
DE69230359T2 (de
Inventor
Toru Endo
Yoshinori Fujitsu Limi Okajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE69230359D1 publication Critical patent/DE69230359D1/de
Publication of DE69230359T2 publication Critical patent/DE69230359T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
DE69230359T 1991-09-04 1992-09-03 Halbleiteranordnung mit Schmelzsicherung Expired - Fee Related DE69230359T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3224207A JP2695548B2 (ja) 1991-09-04 1991-09-04 半導体装置

Publications (2)

Publication Number Publication Date
DE69230359D1 true DE69230359D1 (de) 2000-01-05
DE69230359T2 DE69230359T2 (de) 2000-04-13

Family

ID=16810204

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69230359T Expired - Fee Related DE69230359T2 (de) 1991-09-04 1992-09-03 Halbleiteranordnung mit Schmelzsicherung

Country Status (5)

Country Link
US (1) US5990537A (de)
EP (1) EP0531128B1 (de)
JP (1) JP2695548B2 (de)
KR (1) KR960013037B1 (de)
DE (1) DE69230359T2 (de)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5567643A (en) * 1994-05-31 1996-10-22 Taiwan Semiconductor Manufacturing Company Method of forming contamination guard ring for semiconductor integrated circuit applications
WO1997001188A1 (de) * 1995-06-23 1997-01-09 Siemens Aktiengesellschaft Halbleiteranordnung mit einem fuse-link und darunter angeordneter wanne
US5538924A (en) * 1995-09-05 1996-07-23 Vanguard International Semiconductor Co. Method of forming a moisture guard ring for integrated circuit applications
US6004834A (en) * 1995-11-29 1999-12-21 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing semiconductor device having a fuse
JPH09153552A (ja) * 1995-11-29 1997-06-10 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5731624A (en) * 1996-06-28 1998-03-24 International Business Machines Corporation Integrated pad and fuse structure for planar copper metallurgy
US6054340A (en) * 1997-06-06 2000-04-25 Motorola, Inc. Method for forming a cavity capable of accessing deep fuse structures and device containing the same
US5970346A (en) * 1997-09-19 1999-10-19 Taiwan Semiconductor Manufacturing Company, Ltd. Fuse window guard ring structure for nitride capped self aligned contact processes
US6060398A (en) * 1998-03-09 2000-05-09 Siemens Aktiengesellschaft Guard cell for etching
TW406394B (en) * 1998-06-17 2000-09-21 Nanya Plastics Corp Ion-replulsion structure used in the fuse window
US6277674B1 (en) * 1998-10-02 2001-08-21 Micron Technology, Inc. Semiconductor fuses, methods of using the same, methods of making the same, and semiconductor devices containing the same
US6562674B1 (en) * 1999-07-06 2003-05-13 Matsushita Electronics Corporation Semiconductor integrated circuit device and method of producing the same
US6180503B1 (en) * 1999-07-29 2001-01-30 Vanguard International Semiconductor Corporation Passivation layer etching process for memory arrays with fusible links
KR100564556B1 (ko) * 1999-09-08 2006-03-29 삼성전자주식회사 리던던시 셀을 포함하는 반도체 소자 및 그 제조방법
KR100314133B1 (ko) * 1999-11-26 2001-11-15 윤종용 가장자리에 흡습방지막이 형성된 반도체 칩 및 이흡습방지막의 형성방법
KR100335498B1 (ko) * 1999-12-22 2002-05-08 윤종용 반도체 소자의 퓨즈부 구조 및 그 형성방법
KR100557943B1 (ko) * 2000-06-30 2006-03-10 주식회사 하이닉스반도체 플라즈마공정에 의한 에스티아이 공정의 특성개선방법
EP1172848A1 (de) * 2000-07-14 2002-01-16 STMicroelectronics S.r.l. Integrierte Halbleiterstruktur
KR20020017589A (ko) * 2000-08-31 2002-03-07 박종섭 퓨즈 박스 및 그의 형성 방법
JP2002184870A (ja) 2000-12-18 2002-06-28 Mitsubishi Electric Corp スタティック型半導体記憶装置
JP4088120B2 (ja) * 2002-08-12 2008-05-21 株式会社ルネサステクノロジ 半導体装置
JP2004363217A (ja) * 2003-06-03 2004-12-24 Renesas Technology Corp 半導体装置
JP4795631B2 (ja) 2003-08-07 2011-10-19 ルネサスエレクトロニクス株式会社 半導体装置
KR100500458B1 (ko) * 2003-10-07 2005-07-18 삼성전자주식회사 반도체 장치의 퓨즈박스 및 그 제조방법
KR100534102B1 (ko) * 2004-04-21 2005-12-06 삼성전자주식회사 반도체 기억소자의 퓨즈 영역들 및 그 제조방법들
DE102004021541A1 (de) * 2004-05-03 2005-12-08 Robert Bosch Gmbh Passivierung von Brennstrecken
JP2006156960A (ja) 2004-10-26 2006-06-15 Nec Electronics Corp 半導体装置
US8188565B2 (en) * 2005-12-09 2012-05-29 Via Technologies, Inc. Semiconductor chip and shielding structure thereof
US7397106B2 (en) * 2005-12-12 2008-07-08 Taiwan Semiconductor Manufacturing Company, Ltd. Laser fuse with efficient heat dissipation
US7893459B2 (en) * 2007-04-10 2011-02-22 Taiwan Semiconductor Manufacturing Company, Ltd. Seal ring structures with reduced moisture-induced reliability degradation
JP2011054701A (ja) * 2009-09-01 2011-03-17 Sanyo Electric Co Ltd 半導体装置
JP5544812B2 (ja) 2009-10-02 2014-07-09 株式会社リコー 半導体装置
JP2011216240A (ja) * 2010-03-31 2011-10-27 Oki Semiconductor Co Ltd 電流ヒューズ、半導体装置及び電流ヒューズの切断方法
JP5981260B2 (ja) 2011-09-30 2016-08-31 エスアイアイ・セミコンダクタ株式会社 半導体装置
JP2013168491A (ja) 2012-02-15 2013-08-29 Semiconductor Components Industries Llc 半導体装置の製造方法
JP6215020B2 (ja) 2013-01-25 2017-10-18 エスアイアイ・セミコンダクタ株式会社 半導体装置
JP2016219660A (ja) * 2015-05-22 2016-12-22 ソニー株式会社 半導体装置、製造方法、固体撮像素子、および電子機器
CN105895667B (zh) * 2015-12-28 2019-07-23 苏州能讯高能半导体有限公司 一种半导体器件及其制造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5847596Y2 (ja) * 1979-09-05 1983-10-29 富士通株式会社 半導体装置
DE3276981D1 (en) * 1981-10-09 1987-09-17 Toshiba Kk Semiconductor device having a fuse element
JPS59956A (ja) * 1982-06-25 1984-01-06 Hitachi Ltd ポリシリコンヒユ−ズを有する半導体装置
JPS59130441A (ja) * 1982-12-25 1984-07-27 Fujitsu Ltd ヒューズ型ｒｏｍの書込み方法
JPS6098664A (ja) * 1983-11-02 1985-06-01 Mitsubishi Electric Corp 半導体記憶装置
JPS6344757A (ja) * 1986-04-11 1988-02-25 Nec Corp 半導体装置
FR2601500B1 (fr) * 1986-07-11 1988-10-21 Bull Sa Procede de liaison programmable par laser de deux conducteurs superposes du reseau d'interconnexion d'un circuit integre, et circuit integre en resultant
JPS6423566A (en) * 1987-07-17 1989-01-26 Mitsubishi Electric Corp Semiconductor fuse
US4967256A (en) * 1988-07-08 1990-10-30 Texas Instruments Incorporated Overvoltage protector
JPH02215149A (ja) * 1989-02-16 1990-08-28 Sanyo Electric Co Ltd 半導体装置とその製造方法
JPH02271555A (ja) * 1989-04-13 1990-11-06 Matsushita Electron Corp 半導体装置
US5025300A (en) * 1989-06-30 1991-06-18 At&T Bell Laboratories Integrated circuits having improved fusible links

Also Published As

Publication number Publication date
EP0531128A1 (de) 1993-03-10
JP2695548B2 (ja) 1997-12-24
US5990537A (en) 1999-11-23
JPH0563091A (ja) 1993-03-12
DE69230359T2 (de) 2000-04-13
EP0531128B1 (de) 1999-12-01
KR960013037B1 (ko) 1996-09-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee