DE69214313D1 - Halbleiter-Speichereinrichtung - Google Patents

Halbleiter-Speichereinrichtung

Info

Publication number
DE69214313D1
DE69214313D1 DE69214313T DE69214313T DE69214313D1 DE 69214313 D1 DE69214313 D1 DE 69214313D1 DE 69214313 T DE69214313 T DE 69214313T DE 69214313 T DE69214313 T DE 69214313T DE 69214313 D1 DE69214313 D1 DE 69214313D1
Authority
DE
Germany
Prior art keywords
storage device
semiconductor storage
semiconductor
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69214313T
Other languages
English (en)
Other versions
DE69214313T2 (de
Inventor
Sinsuke Kumakura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69214313D1 publication Critical patent/DE69214313D1/de
Application granted granted Critical
Publication of DE69214313T2 publication Critical patent/DE69214313T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0416—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and no select transistor, e.g. UV EPROM

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
DE69214313T 1991-02-08 1992-02-05 Halbleiter-Speichereinrichtung Expired - Fee Related DE69214313T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3039352A JPH04257270A (ja) 1991-02-08 1991-02-08 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69214313D1 true DE69214313D1 (de) 1996-11-14
DE69214313T2 DE69214313T2 (de) 1997-02-20

Family

ID=12550685

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69214313T Expired - Fee Related DE69214313T2 (de) 1991-02-08 1992-02-05 Halbleiter-Speichereinrichtung

Country Status (5)

Country Link
US (1) US5291046A (de)
EP (1) EP0498642B1 (de)
JP (1) JPH04257270A (de)
KR (1) KR950013394B1 (de)
DE (1) DE69214313T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100311486B1 (ko) * 1995-11-23 2002-08-17 현대반도체 주식회사 반도체메모리장치및그의제조방법
US5940732A (en) * 1995-11-27 1999-08-17 Semiconductor Energy Laboratory Co., Method of fabricating semiconductor device
JP3183326B2 (ja) * 1996-07-17 2001-07-09 日本電気株式会社 読出専用半導体記憶装置
US6031771A (en) * 1996-10-28 2000-02-29 Macronix International Co., Ltd. Memory redundancy circuit using single polysilicon floating gate transistors as redundancy elements
US5896327A (en) * 1997-10-27 1999-04-20 Macronix International Co., Ltd. Memory redundancy circuit for high density memory with extra row and column for failed address storage
US5889711A (en) * 1997-10-27 1999-03-30 Macronix International Co., Ltd. Memory redundancy for high density memory
JP2000311957A (ja) * 1999-04-27 2000-11-07 Seiko Instruments Inc 半導体装置
US7085461B2 (en) * 2001-04-30 2006-08-01 Verrillon, Inc. Optical fiber with visualization features
US6744094B2 (en) * 2001-08-24 2004-06-01 Micron Technology Inc. Floating gate transistor with horizontal gate layers stacked next to vertical body
US7375393B1 (en) * 2005-01-27 2008-05-20 National Semiconductor Corporation Non-volatile memory (NVM) retention improvement utilizing protective electrical shield

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4115914A (en) * 1976-03-26 1978-09-26 Hughes Aircraft Company Electrically erasable non-volatile semiconductor memory
US4758869A (en) * 1986-08-29 1988-07-19 Waferscale Integration, Inc. Nonvolatile floating gate transistor structure
JPH07101713B2 (ja) * 1988-06-07 1995-11-01 三菱電機株式会社 半導体記憶装置の製造方法
DE69028665T2 (de) * 1989-07-18 1997-04-17 Sony Corp., Tokio/Tokyo Nichtflüchtige Halbleiterspeicheranordnung und Verfahren zur Herstellung
US5021848A (en) * 1990-03-13 1991-06-04 Chiu Te Long Electrically-erasable and electrically-programmable memory storage devices with self aligned tunnel dielectric area and the method of fabricating thereof

Also Published As

Publication number Publication date
KR950013394B1 (ko) 1995-11-08
EP0498642A1 (de) 1992-08-12
JPH04257270A (ja) 1992-09-11
EP0498642B1 (de) 1996-10-09
US5291046A (en) 1994-03-01
DE69214313T2 (de) 1997-02-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee