DE69414452D1 - Halbleiterspeichergerät - Google Patents
HalbleiterspeichergerätInfo
- Publication number
- DE69414452D1 DE69414452D1 DE69414452T DE69414452T DE69414452D1 DE 69414452 D1 DE69414452 D1 DE 69414452D1 DE 69414452 T DE69414452 T DE 69414452T DE 69414452 T DE69414452 T DE 69414452T DE 69414452 D1 DE69414452 D1 DE 69414452D1
- Authority
- DE
- Germany
- Prior art keywords
- storage device
- semiconductor storage
- semiconductor
- storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/161—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
- G06F13/1626—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by reordering requests
- G06F13/1631—Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement by reordering requests through address comparison
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1689—Synchronisation and timing concerns
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12041893 | 1993-04-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69414452D1 true DE69414452D1 (de) | 1998-12-17 |
DE69414452T2 DE69414452T2 (de) | 1999-05-06 |
Family
ID=14785738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69414452T Expired - Fee Related DE69414452T2 (de) | 1993-04-26 | 1994-04-26 | Halbleiterspeichergerät |
Country Status (4)
Country | Link |
---|---|
US (1) | US5436863A (de) |
EP (1) | EP0622802B1 (de) |
AU (1) | AU663440B2 (de) |
DE (1) | DE69414452T2 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1049444A (ja) * | 1996-08-07 | 1998-02-20 | Oki Electric Ind Co Ltd | 記憶装置及び記憶装置の制御方法 |
US5732017A (en) * | 1997-03-31 | 1998-03-24 | Atmel Corporation | Combined program and data nonvolatile memory with concurrent program-read/data write capability |
JPH1168797A (ja) * | 1997-08-26 | 1999-03-09 | Nec Corp | 可変長セル対応位相乗換装置 |
EP1355265B1 (de) * | 2002-04-15 | 2016-04-13 | Canon Kabushiki Kaisha | Farbendatenpufferung zum Farbdruck |
JP3826066B2 (ja) * | 2002-04-15 | 2006-09-27 | キヤノン株式会社 | 記録装置及び記録装置の制御方法 |
JP2003305895A (ja) * | 2002-04-15 | 2003-10-28 | Canon Inc | 画像形成システム、記録装置及び記録制御方法 |
CA2499967A1 (en) | 2002-10-15 | 2004-04-29 | Verance Corporation | Media monitoring, management and information system |
KR100609623B1 (ko) * | 2005-02-16 | 2006-08-08 | 삼성전자주식회사 | 내부 메모리 디바이스간의 직접적 데이터 이동이 가능한 복합 메모리 칩 및 데이터 이동방법 |
GB2426084A (en) * | 2005-05-13 | 2006-11-15 | Agilent Technologies Inc | Updating data in a dual port memory |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SU613402A1 (ru) * | 1976-07-07 | 1978-06-30 | Педприятие П/Я В-2892 | Запоминающее устройство |
US4599708A (en) * | 1983-12-30 | 1986-07-08 | International Business Machines Corporation | Method and structure for machine data storage with simultaneous write and read |
JP2615088B2 (ja) * | 1987-11-06 | 1997-05-28 | 株式会社日立製作所 | 半導体記憶装置 |
JPH0713859B2 (ja) * | 1988-11-02 | 1995-02-15 | 日本電気株式会社 | マルチポートメモリ装置 |
US5031146A (en) * | 1988-12-22 | 1991-07-09 | Digital Equipment Corporation | Memory apparatus for multiple processor systems |
JP3076056B2 (ja) * | 1990-07-30 | 2000-08-14 | 株式会社日立製作所 | 多ポートメモリ |
JP3169639B2 (ja) * | 1991-06-27 | 2001-05-28 | 日本電気株式会社 | 半導体記憶装置 |
-
1994
- 1994-04-25 US US08/232,372 patent/US5436863A/en not_active Expired - Fee Related
- 1994-04-26 EP EP94106482A patent/EP0622802B1/de not_active Expired - Lifetime
- 1994-04-26 AU AU60670/94A patent/AU663440B2/en not_active Ceased
- 1994-04-26 DE DE69414452T patent/DE69414452T2/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
AU663440B2 (en) | 1995-10-05 |
DE69414452T2 (de) | 1999-05-06 |
EP0622802B1 (de) | 1998-11-11 |
US5436863A (en) | 1995-07-25 |
AU6067094A (en) | 1994-10-27 |
EP0622802A1 (de) | 1994-11-02 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |