JP4795631B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4795631B2 JP4795631B2 JP2003288829A JP2003288829A JP4795631B2 JP 4795631 B2 JP4795631 B2 JP 4795631B2 JP 2003288829 A JP2003288829 A JP 2003288829A JP 2003288829 A JP2003288829 A JP 2003288829A JP 4795631 B2 JP4795631 B2 JP 4795631B2
- Authority
- JP
- Japan
- Prior art keywords
- fuse
- conductor plate
- current
- insulating layer
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 45
- 239000004020 conductor Substances 0.000 claims description 42
- 239000000758 substrate Substances 0.000 claims description 21
- 239000011229 interlayer Substances 0.000 description 17
- 238000005520 cutting process Methods 0.000 description 14
- 238000000034 method Methods 0.000 description 7
- 239000010949 copper Substances 0.000 description 4
- 239000012141 concentrate Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 238000007664 blowing Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 239000010410 layer Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910021332 silicide Inorganic materials 0.000 description 2
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 1
- 238000003698 laser cutting Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/345—Arrangements for heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Fuses (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
101,201,401 半導体基板
102,202,402 第1層間絶縁膜
103,203,403 下部プレート
104,204,404 第2層間絶縁膜
105,112,205,212,405,412,422,432,452 ビアホール
106,113,206,213,406,413,433 ビア
107,407 ヒューズ溶断部
108,208,408,428 パッド電極
126,127,226,227,426,427 側部プレート
110,210,410 電流流入端子
111,211,411 電流流出端子
114,214,414 上部プレート
251 第1往路直線部
252 第1直角接続部
253 第1復路直線部
259 第3往路直線部
265 第4復路直線部
266 第8直角接続部
267 第5往路直線部
281 ヒューズ200の外側の熱発生領域
282 ヒューズ200の内側の熱発生領域
423,453 ビア溶断部
Claims (6)
- 半導体基板と、
前記半導体基板上に形成された絶縁層と、
前記絶縁層の中に形成され電流を流すことによって溶断されるヒューズと、
前記半導体基板の表面に平行な面からなり、前記絶縁層上に前記ヒューズを覆うように形成された上部導電体プレートと、
前記半導体基板の表面に平行な面からなり、前記ヒューズと前記半導体基板の間の前記絶縁層中に形成され、前記上部導電体プレートとともに前記ヒューズを挟む下部導電体プレートと、を備え、
前記ヒューズは、両端に前記電流を流す電流流入端子と電流流出端子と、前記電流流入端子と電流流出端子の間に形成される溶断部とで構成され、かつ前記上部導電体プレートは前記ヒューズの溶断部を完全に覆い、前記ヒューズの前記溶断部は前記電流流入端子と前記電流流出端子よりも幅が狭く、複数回曲がっている半導体装置。 - 前記上部導電体プレートと前記下部導電体プレートの両方が、前記ヒューズの前記溶断部を完全に覆っている請求項1に記載の半導体装置。
- 前記ヒューズは、前記上部導電体プレートおよび前記下部導電体プレートと電気的に絶縁されている請求項1又は2に記載の半導体装置。
- それぞれが前記半導体基板の前記表面に垂直な面からなり、前記絶縁層中であって前記絶縁層の一部を介して前記ヒューズを挟むように形成された第一の側部導電体プレートと第二の側部導電体プレートと、をさらに含む請求項1乃至3のいずれかに記載の半導体装置。
- 前記第一の側部導電体プレートの高さと前記第二の側部導電体プレートの高さはいずれも前記ヒューズの厚さよりも大きい請求項4に記載の半導体装置。
- 半導体基板と、
前記半導体基板上に形成された絶縁層と、
前記絶縁層中に形成され電流を流すことによって溶断されるヒューズと、
それぞれが前記半導体基板の表面に垂直な面からなり、前記絶縁層中であって前記絶縁層の一部を介して前記ヒューズを挟むように形成された第一の側部導電体プレートと第二の側部導電体プレートと、
前記半導体基板の前記表面に平行な面からなり、前記絶縁層中の前記ヒューズと前記半導体基板の間の前記絶縁層中に形成された下部導電体プレートと、
前記半導体基板の前記表面に平行な面からなり、前記ヒューズを覆うように前記絶縁層上に形成され、前記下部導電体プレートととともに前記ヒューズを挟む上部導電体プレートと、を備え、
前記第一の側部導電体プレートの高さと前記第二の側部導電体プレートの高さはいずれも前記ヒューズの厚さよりも大きく、前記下部電極プレートは前記ヒューズと電気的に絶縁された半導体装置。
Priority Applications (9)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003288829A JP4795631B2 (ja) | 2003-08-07 | 2003-08-07 | 半導体装置 |
US10/900,205 US7282751B2 (en) | 2003-08-07 | 2004-07-28 | Semiconductor device |
CNB2004100565183A CN100352053C (zh) | 2003-08-07 | 2004-08-06 | 半导体器件 |
CN2007101121770A CN101083251B (zh) | 2003-08-07 | 2004-08-06 | 半导体器件 |
US11/798,982 US7994544B2 (en) | 2003-08-07 | 2007-05-18 | Semiconductor device having a fuse element |
US13/180,050 US8362524B2 (en) | 2003-08-07 | 2011-07-11 | Semiconductor device having a fuse element |
US13/721,962 US8610178B2 (en) | 2003-08-07 | 2012-12-20 | Semiconductor device having a fuse element |
US14/086,268 US9177912B2 (en) | 2003-08-07 | 2013-11-21 | Semiconductor device having a fuse element |
US14/878,216 US9620449B2 (en) | 2003-08-07 | 2015-10-08 | Semiconductor device having a fuse element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003288829A JP4795631B2 (ja) | 2003-08-07 | 2003-08-07 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005057186A JP2005057186A (ja) | 2005-03-03 |
JP4795631B2 true JP4795631B2 (ja) | 2011-10-19 |
Family
ID=34114055
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003288829A Expired - Fee Related JP4795631B2 (ja) | 2003-08-07 | 2003-08-07 | 半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (6) | US7282751B2 (ja) |
JP (1) | JP4795631B2 (ja) |
CN (2) | CN100352053C (ja) |
Families Citing this family (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4795631B2 (ja) | 2003-08-07 | 2011-10-19 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7391097B2 (en) * | 2005-06-10 | 2008-06-24 | International Business Machines Corporation | Secure electrically programmable fuse |
JP4699102B2 (ja) * | 2005-06-22 | 2011-06-08 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7579673B2 (en) | 2005-08-24 | 2009-08-25 | Nec Electronics Corporation | Semiconductor device having electrical fuse |
JP4741907B2 (ja) | 2005-09-05 | 2011-08-10 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP4880950B2 (ja) | 2005-09-05 | 2012-02-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4851755B2 (ja) | 2005-09-07 | 2012-01-11 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4865302B2 (ja) | 2005-11-11 | 2012-02-01 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
JP2012094928A (ja) * | 2006-03-07 | 2012-05-17 | Renesas Electronics Corp | 半導体装置 |
JP4959267B2 (ja) | 2006-03-07 | 2012-06-20 | ルネサスエレクトロニクス株式会社 | 半導体装置および電気ヒューズの抵抗値の増加方法 |
JP4861051B2 (ja) | 2006-05-09 | 2012-01-25 | ルネサスエレクトロニクス株式会社 | 半導体装置および電気ヒューズの切断方法 |
JP4908055B2 (ja) | 2006-05-15 | 2012-04-04 | ルネサスエレクトロニクス株式会社 | 半導体装置および電気ヒューズの切断方法 |
JP4861060B2 (ja) | 2006-06-01 | 2012-01-25 | ルネサスエレクトロニクス株式会社 | 半導体装置および電気ヒューズの切断方法 |
JP4903015B2 (ja) | 2006-06-06 | 2012-03-21 | ルネサスエレクトロニクス株式会社 | 半導体装置、電気ヒューズの切断方法、および電気ヒューズの判定方法 |
JP4871031B2 (ja) | 2006-06-06 | 2012-02-08 | ルネサスエレクトロニクス株式会社 | 半導体装置およびヒューズの判定方法 |
JP5132162B2 (ja) * | 2006-08-11 | 2013-01-30 | ルネサスエレクトロニクス株式会社 | 半導体集積回路 |
JP4995512B2 (ja) * | 2006-08-23 | 2012-08-08 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR100809708B1 (ko) * | 2006-10-17 | 2008-03-06 | 삼성전자주식회사 | 레이저 얼라인먼트 모니터링 퓨즈 구조 및 이를 구비한반도체 소자 및 레이저 얼라인먼트 모니터링회로 |
US7732892B2 (en) * | 2006-11-03 | 2010-06-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Fuse structures and integrated circuit devices |
JP5245324B2 (ja) * | 2007-08-20 | 2013-07-24 | 日本電気株式会社 | スイッチ素子を搭載した半導体装置 |
JP2009141266A (ja) | 2007-12-10 | 2009-06-25 | Nec Electronics Corp | 半導体装置 |
JP5248170B2 (ja) * | 2008-04-03 | 2013-07-31 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5307437B2 (ja) | 2008-04-14 | 2013-10-02 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP5331408B2 (ja) | 2008-08-11 | 2013-10-30 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
DE102008054073A1 (de) * | 2008-10-31 | 2010-05-12 | Advanced Micro Devices, Inc., Sunnyvale | Halbleiterbauelement mit elektronischen Sicherungen mit erhöhter Programmiereffizienz |
KR101113187B1 (ko) * | 2010-01-29 | 2012-02-15 | 주식회사 하이닉스반도체 | 열 확산을 방지할 수 있는 전기적 퓨즈를 구비하는 반도체 집적 회로 |
US20120286390A1 (en) * | 2011-05-11 | 2012-11-15 | Kuei-Sheng Wu | Electrical fuse structure and method for fabricating the same |
JP5492929B2 (ja) * | 2012-03-28 | 2014-05-14 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
CN103633066B (zh) * | 2012-08-20 | 2016-12-07 | 北大方正集团有限公司 | 一种双层熔丝及其制造方法 |
CN104347588B (zh) * | 2013-07-24 | 2017-09-26 | 中芯国际集成电路制造(上海)有限公司 | 电熔丝结构 |
CN104576601B (zh) * | 2013-10-10 | 2018-04-13 | 中芯国际集成电路制造(上海)有限公司 | 一种金属熔丝结构 |
CN104659013A (zh) * | 2013-11-19 | 2015-05-27 | 中芯国际集成电路制造(上海)有限公司 | 电熔丝结构及半导体器件 |
CN104835800B (zh) * | 2014-02-08 | 2019-01-22 | 北大方正集团有限公司 | 一种集成电路的熔丝结构及其制造方法 |
CN109786364A (zh) * | 2017-11-14 | 2019-05-21 | 中芯国际集成电路制造(上海)有限公司 | 熔断结构及其形成方法 |
US10806026B2 (en) | 2018-07-12 | 2020-10-13 | International Business Machines Corporation | Modified PCB vias to prevent burn events |
CN109244040B (zh) * | 2018-07-23 | 2021-08-20 | 珠海市杰理科技股份有限公司 | 芯片熔丝结构及芯片 |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4064493A (en) | 1976-06-03 | 1977-12-20 | Motorola, Inc. | P-ROM Cell having a low current fusible programming link |
JPS5775442A (en) * | 1980-10-29 | 1982-05-12 | Toshiba Corp | Semiconductor device |
JPS61147548A (ja) * | 1984-12-21 | 1986-07-05 | Nec Ic Microcomput Syst Ltd | 半導体集積回路装置 |
JP2695548B2 (ja) * | 1991-09-04 | 1997-12-24 | 富士通株式会社 | 半導体装置 |
EP0563852A1 (en) | 1992-04-02 | 1993-10-06 | Siemens Aktiengesellschaft | Zag fuse for reduced blow-current applications |
JPH06151745A (ja) * | 1992-11-09 | 1994-05-31 | Toyota Motor Corp | 半導体装置 |
US5622892A (en) * | 1994-06-10 | 1997-04-22 | International Business Machines Corporation | Method of making a self cooling electrically programmable fuse |
US5903041A (en) * | 1994-06-21 | 1999-05-11 | Aptix Corporation | Integrated two-terminal fuse-antifuse and fuse and integrated two-terminal fuse-antifuse structures incorporating an air gap |
JP3224960B2 (ja) * | 1994-12-15 | 2001-11-05 | 株式会社東芝 | 半導体装置 |
US5608257A (en) * | 1995-06-07 | 1997-03-04 | International Business Machines Corporation | Fuse element for effective laser blow in an integrated circuit device |
JP3352360B2 (ja) * | 1996-07-19 | 2002-12-03 | シャープ株式会社 | 電力制御素子 |
KR100241061B1 (ko) * | 1997-07-26 | 2000-02-01 | 윤종용 | 반도체장치의퓨즈제조방법및퓨즈를가진반도체장치 |
JP2000040790A (ja) | 1998-07-22 | 2000-02-08 | Sony Corp | 半導体装置及びその製造方法 |
US6162686A (en) * | 1998-09-18 | 2000-12-19 | Taiwan Semiconductor Manufacturing Company | Method for forming a fuse in integrated circuit application |
JP2000269342A (ja) * | 1999-03-12 | 2000-09-29 | Toshiba Microelectronics Corp | 半導体集積回路および半導体集積回路の製造方法 |
JP2001230325A (ja) * | 2000-02-16 | 2001-08-24 | Oki Electric Ind Co Ltd | メタルヒューズ、その製造方法及びマスク |
JP2003086687A (ja) * | 2001-09-13 | 2003-03-20 | Seiko Epson Corp | 半導体装置 |
JP3948392B2 (ja) * | 2001-11-06 | 2007-07-25 | ヤマハ株式会社 | 半導体装置、半導体装置の製造方法、およびヒューズ素子の切断方法 |
US20030109125A1 (en) * | 2001-12-10 | 2003-06-12 | Chewnpu Jou | Fuse structure for a semiconductor device and manufacturing method thereof |
US6872648B2 (en) * | 2002-09-19 | 2005-03-29 | Infineon Technologies Ag | Reduced splattering of unpassivated laser fuses |
JP4795631B2 (ja) * | 2003-08-07 | 2011-10-19 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2003
- 2003-08-07 JP JP2003288829A patent/JP4795631B2/ja not_active Expired - Fee Related
-
2004
- 2004-07-28 US US10/900,205 patent/US7282751B2/en active Active
- 2004-08-06 CN CNB2004100565183A patent/CN100352053C/zh active Active
- 2004-08-06 CN CN2007101121770A patent/CN101083251B/zh active Active
-
2007
- 2007-05-18 US US11/798,982 patent/US7994544B2/en active Active
-
2011
- 2011-07-11 US US13/180,050 patent/US8362524B2/en active Active
-
2012
- 2012-12-20 US US13/721,962 patent/US8610178B2/en active Active
-
2013
- 2013-11-21 US US14/086,268 patent/US9177912B2/en active Active
-
2015
- 2015-10-08 US US14/878,216 patent/US9620449B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN101083251A (zh) | 2007-12-05 |
US20070222029A1 (en) | 2007-09-27 |
US20130105940A1 (en) | 2013-05-02 |
US20050029620A1 (en) | 2005-02-10 |
US20160035673A1 (en) | 2016-02-04 |
US20140077335A1 (en) | 2014-03-20 |
US20110266653A1 (en) | 2011-11-03 |
US7282751B2 (en) | 2007-10-16 |
US8362524B2 (en) | 2013-01-29 |
CN100352053C (zh) | 2007-11-28 |
JP2005057186A (ja) | 2005-03-03 |
CN1581479A (zh) | 2005-02-16 |
US8610178B2 (en) | 2013-12-17 |
US9177912B2 (en) | 2015-11-03 |
CN101083251B (zh) | 2010-06-16 |
US9620449B2 (en) | 2017-04-11 |
US7994544B2 (en) | 2011-08-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4795631B2 (ja) | 半導体装置 | |
JP2005039220A (ja) | 半導体装置 | |
US8487403B2 (en) | Semiconductor device | |
US7732892B2 (en) | Fuse structures and integrated circuit devices | |
JP5536824B2 (ja) | 半導体装置およびその製造方法 | |
KR20090112390A (ko) | 전기적 퓨즈 소자 | |
JP2006190981A (ja) | 並列の実効抵抗領域を有するptc回路保護装置 | |
JP2009141266A (ja) | 半導体装置 | |
US8080861B2 (en) | Semiconductor device | |
KR100435084B1 (ko) | 반도체 장치와 퓨즈 절단 방법 | |
JP5331408B2 (ja) | 半導体装置 | |
JP3269491B2 (ja) | 半導体装置及びそれに用いるヒューズ構造並びにその製造方法 | |
US20080251886A1 (en) | Fuse structure, and semiconductor device | |
KR20170100432A (ko) | 반도체 장치 및 퓨즈의 절단 방법 | |
JP2007088435A (ja) | 半導体装置およびその製造方法 | |
JP2011023391A (ja) | 電子部品装置および変化部品の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20060710 |
|
RD01 | Notification of change of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7421 Effective date: 20070704 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090901 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20090903 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20091027 |
|
RD01 | Notification of change of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7421 Effective date: 20100426 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100622 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100819 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110726 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110728 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 4795631 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140805 Year of fee payment: 3 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |