DE69133497T2 - Leiterrahmen für eine Halbleiteranordnung und dessen Herstellungsverfahren - Google Patents

Leiterrahmen für eine Halbleiteranordnung und dessen Herstellungsverfahren Download PDF

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Publication number
DE69133497T2
DE69133497T2 DE69133497T DE69133497T DE69133497T2 DE 69133497 T2 DE69133497 T2 DE 69133497T2 DE 69133497 T DE69133497 T DE 69133497T DE 69133497 T DE69133497 T DE 69133497T DE 69133497 T2 DE69133497 T2 DE 69133497T2
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DE
Germany
Prior art keywords
electrode
semiconductor chip
semiconductor device
conductor
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69133497T
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German (de)
English (en)
Other versions
DE69133497D1 (de
Inventor
Takao 1-1 Shibaura 1-chome Fujitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
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Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69133497D1 publication Critical patent/DE69133497D1/de
Application granted granted Critical
Publication of DE69133497T2 publication Critical patent/DE69133497T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H10W72/00—
    • H10W76/12—
    • H10W70/435—
    • H10W70/465—
    • H10W70/479—
    • H10W72/019—
    • H10W70/682—
    • H10W70/685—
    • H10W72/073—
    • H10W72/07331—
    • H10W72/075—
    • H10W72/07554—
    • H10W72/29—
    • H10W72/354—
    • H10W72/547—
    • H10W72/5522—
    • H10W72/5524—
    • H10W72/59—
    • H10W72/923—
    • H10W72/952—
    • H10W90/754—
    • H10W99/00—

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
DE69133497T 1990-06-01 1991-05-31 Leiterrahmen für eine Halbleiteranordnung und dessen Herstellungsverfahren Expired - Fee Related DE69133497T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP14168490 1990-06-01
JP2141684A JP2540652B2 (ja) 1990-06-01 1990-06-01 半導体装置

Publications (2)

Publication Number Publication Date
DE69133497D1 DE69133497D1 (de) 2006-01-19
DE69133497T2 true DE69133497T2 (de) 2006-08-24

Family

ID=15297809

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69133497T Expired - Fee Related DE69133497T2 (de) 1990-06-01 1991-05-31 Leiterrahmen für eine Halbleiteranordnung und dessen Herstellungsverfahren
DE69132685T Expired - Fee Related DE69132685T2 (de) 1990-06-01 1991-05-31 Halbleiteranordnung bestehend aus einem TAB-Band und deren Herstellungsverfahren

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69132685T Expired - Fee Related DE69132685T2 (de) 1990-06-01 1991-05-31 Halbleiteranordnung bestehend aus einem TAB-Band und deren Herstellungsverfahren

Country Status (5)

Country Link
US (1) US5654584A (enExample)
EP (2) EP0459493B1 (enExample)
JP (1) JP2540652B2 (enExample)
KR (1) KR970000972B1 (enExample)
DE (2) DE69133497T2 (enExample)

Families Citing this family (168)

* Cited by examiner, † Cited by third party
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JPH0437149A (ja) 1992-02-07
US5654584A (en) 1997-08-05
DE69133497D1 (de) 2006-01-19
DE69132685T2 (de) 2002-06-13
EP1020903B1 (en) 2005-12-14
DE69132685D1 (de) 2001-09-20
EP1020903A1 (en) 2000-07-19
KR970000972B1 (ko) 1997-01-21
EP0459493B1 (en) 2001-08-16
EP0459493A2 (en) 1991-12-04
JP2540652B2 (ja) 1996-10-09
EP0459493A3 (enExample) 1994-02-23

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