JPS57143848A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57143848A
JPS57143848A JP2907981A JP2907981A JPS57143848A JP S57143848 A JPS57143848 A JP S57143848A JP 2907981 A JP2907981 A JP 2907981A JP 2907981 A JP2907981 A JP 2907981A JP S57143848 A JPS57143848 A JP S57143848A
Authority
JP
Japan
Prior art keywords
tin
cap
plating
constitution
corrosion resistant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2907981A
Other languages
Japanese (ja)
Inventor
Katsuhiko Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP2907981A priority Critical patent/JPS57143848A/en
Publication of JPS57143848A publication Critical patent/JPS57143848A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To improve sealing property and corrosion resistant property by a method wherein tin-plating is applied to an external lead and is not applied to a metal cap. CONSTITUTION:After an IC chip 10b is fixed to a mounting part 2b of a ceramic substrate 1b, connection between a chip electrode and a bonding pad part 3b is made by metal wire such as Au, and a cap 14b made of Ni material is welded. A hard tie bar part of a sealed package is hanged to a plating rack and tin- plating is applied to it. With this constitution, the Ni cap which has good corrosion resistant property is sealed and is not tin-plated, so that Ni-Sn is not produced by thermal treatment and good appearance can be obtained.
JP2907981A 1981-02-27 1981-02-27 Semiconductor device Pending JPS57143848A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2907981A JPS57143848A (en) 1981-02-27 1981-02-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2907981A JPS57143848A (en) 1981-02-27 1981-02-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57143848A true JPS57143848A (en) 1982-09-06

Family

ID=12266327

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2907981A Pending JPS57143848A (en) 1981-02-27 1981-02-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57143848A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0459493A2 (en) * 1990-06-01 1991-12-04 Kabushiki Kaisha Toshiba A semiconductor device using a lead frame and its manufacturing method
US5556810A (en) * 1990-06-01 1996-09-17 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device wherein a semiconductor chip is connected to a lead frame by metal plating
US5801438A (en) * 1995-06-16 1998-09-01 Nec Corporation Semiconductor device mounting and multi-chip module
GB2339337A (en) * 1995-06-16 2000-01-19 Nec Corp Semiconductor device mounting in recesses in a circuit board
CN103545263A (en) * 2013-11-05 2014-01-29 北京航天港科技开发有限公司 Integrated circuit package cover plate and assembly method thereof

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0459493A2 (en) * 1990-06-01 1991-12-04 Kabushiki Kaisha Toshiba A semiconductor device using a lead frame and its manufacturing method
EP0459493A3 (en) * 1990-06-01 1994-02-23 Toshiba Kk
US5556810A (en) * 1990-06-01 1996-09-17 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device wherein a semiconductor chip is connected to a lead frame by metal plating
US5654584A (en) * 1990-06-01 1997-08-05 Kabushiki Kaisha Toshiba Semiconductor device having tape automated bonding leads
US5801438A (en) * 1995-06-16 1998-09-01 Nec Corporation Semiconductor device mounting and multi-chip module
GB2339337A (en) * 1995-06-16 2000-01-19 Nec Corp Semiconductor device mounting in recesses in a circuit board
GB2302451B (en) * 1995-06-16 2000-01-26 Nec Corp Semiconductor device mounting method and multi-chip module produced by the same
GB2339337B (en) * 1995-06-16 2000-03-01 Nec Corp Semiconductor device mounting method and multi-chip module produced by the same
CN103545263A (en) * 2013-11-05 2014-01-29 北京航天港科技开发有限公司 Integrated circuit package cover plate and assembly method thereof

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