DE102004041514A1 - Verstärkte Lothügelstruktur, Herstellungsverfahren und Halbleiterbauelement - Google Patents

Verstärkte Lothügelstruktur, Herstellungsverfahren und Halbleiterbauelement Download PDF

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Publication number
DE102004041514A1
DE102004041514A1 DE102004041514A DE102004041514A DE102004041514A1 DE 102004041514 A1 DE102004041514 A1 DE 102004041514A1 DE 102004041514 A DE102004041514 A DE 102004041514A DE 102004041514 A DE102004041514 A DE 102004041514A DE 102004041514 A1 DE102004041514 A1 DE 102004041514A1
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Germany
Prior art keywords
mounting substrate
embedded
chip
upwardly extending
solder bump
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE102004041514A
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English (en)
Inventor
Se-Young Jeong
Nam-Seog Kim
Se-Yong Oh
Soon-Bum Kim
Sung-Young Park
Ju-Hyun Lyu
In-Young Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
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Filing date
Publication date
Priority claimed from KR1020030065946A external-priority patent/KR100553562B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE102004041514A1 publication Critical patent/DE102004041514A1/de
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K3/00—Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
    • B23K3/06—Solder feeding devices; Solder melting pans
    • B23K3/0607—Solder feeding devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K3/00—Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
    • B23K3/06—Solder feeding devices; Solder melting pans
    • B23K3/0607—Solder feeding devices
    • B23K3/0623—Solder feeding devices for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
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    • H05K2201/09—Shape and layout
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    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
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    • H05K3/22—Secondary treatment of printed circuits
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    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

Die Erfindung bezieht sich auf eine verstärkte Lothügelstruktur, ein Verfahren zu ihrer Herstellung und ein diese nutzendes Halbleiterbauelement. DOLLAR A Erfindungsgemäß werden wenigstens ein erster Vorsprung (311) auf einer Kontaktstelle (102) eines Halbleiterchips (101) und wenigstens ein zweiter Vorsprung (312) auf einer Kontaktstelle (108) eines Montagesubstrats (109) vorgesehen, und die Vorsprünge werden mit Lotmaterial (105) umgeben oder eingebettet. DOLLAR A Verwendung z. B. bei der Fertigung integrierter Halbleiterchips.
DE102004041514A 2003-09-23 2004-08-24 Verstärkte Lothügelstruktur, Herstellungsverfahren und Halbleiterbauelement Ceased DE102004041514A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020030065946A KR100553562B1 (ko) 2003-09-23 2003-09-23 솔더 범프 구조 및 그 제조 방법
US10/825,199 US7015590B2 (en) 2003-01-10 2004-04-16 Reinforced solder bump structure and method for forming a reinforced solder bump

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DE102004041514A1 true DE102004041514A1 (de) 2005-05-04

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DE102004041514A Ceased DE102004041514A1 (de) 2003-09-23 2004-08-24 Verstärkte Lothügelstruktur, Herstellungsverfahren und Halbleiterbauelement

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US (2) US7015590B2 (de)
JP (1) JP2005101614A (de)
CN (1) CN100392834C (de)
DE (1) DE102004041514A1 (de)

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