JP6081044B2 - パッケージ基板ユニットの製造方法 - Google Patents
パッケージ基板ユニットの製造方法 Download PDFInfo
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- JP6081044B2 JP6081044B2 JP2010232731A JP2010232731A JP6081044B2 JP 6081044 B2 JP6081044 B2 JP 6081044B2 JP 2010232731 A JP2010232731 A JP 2010232731A JP 2010232731 A JP2010232731 A JP 2010232731A JP 6081044 B2 JP6081044 B2 JP 6081044B2
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- layer
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- semiconductor chip
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
- B23K1/0016—Brazing of electronic components
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K3/00—Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
- B23K3/06—Solder feeding devices; Solder melting pans
- B23K3/0607—Solder feeding devices
- B23K3/0623—Solder feeding devices for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/42—Printed circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10152—Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/10155—Reinforcing structures
- H01L2224/10156—Bump collar
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mechanical Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
図5は、金属ポスト24に設けた半田バンプ27の信頼性試験を説明する図である。具体的には、ソルダーレジスト層25の高さ寸法L2(図3)と、金属ポスト24の高さ寸法L1との比率に応じた半田バンプ27の信頼性実験結果を図として表したものである。
次に、図6を参照して、実施例1で説明したパッケージ基板ユニットの製造方法について説明する。ここで、図6は、実施例1に係るパッケージ基板ユニットの製造方法を説明するフローチャートを示している。
4、5、14、21、55 絶縁層
3、20、61〜71 半導体チップ実装層
6、23 導電パッド
7、25、16、60 ソルダーレジスト層
8、26、26a 開口部
9、11、27、27a 半田バンプ
10 半導体チップ
12、31、51 ビア
13、32、42、52 ビアパッド
15、40 コア層
17、41 貫通孔
18、43 貫通ビア
19、54 BGA(Ball Grid Array)半田ボール実装層
24、24a、24b 金属ポスト
30、50 ビルドアップ層
32a、42a、52a 配線
34 ドライフィルムレジスト
36 銅めっき
53 BGA(Ball Grid Array)パッド
81、83、85 表面処理層
84 半田
Claims (1)
- コア層を形成するステップと、
前記コア層の上にビルドアップ層を形成するステップと、
前記ビルドアップ層の表面の絶縁層のうちビアを形成する位置に孔部を形成し、前記孔部を含めた前記絶縁層の上に、導電めっきシート層を形成するステップと、
前記導電めっきシート層の前記孔部の位置に前記ビアを形成するステップと、
前記導電めっきシート層の前記孔部の位置において、前記ビアと前記導電めっきシート層の上に電極部を形成するステップと、
前記導電めっきシート層と前記電極部の上にドライフィルムレジスト層を形成するステップと、
前記ドライフィルムレジスト層の前記孔部の位置に第1の開口部を形成し、前記第1の開口部に銅めっきを充填して凸状部を形成するステップと、
前記ドライフィルムレジスト層を剥離するステップと、
前記電極部と前記凸状部とを包囲し、前記絶縁層の上にソルダーレジスト層を形成するステップと、
前記ソルダーレジスト層の前記凸状部の形成位置に第2の開口部を形成するステップと、
前記第2の開口部に半田バンプを印刷し、前記ビルドアップ層において、電子部品と対向する側の面に形成されるソルダーレジスト層の開口部から前記電極部の部分および前記凸状部が露出し、前記半田バンプが、前記電極部の露出部分および前記凸状部をともに被覆して、前記半田バンプとの剛性差が第1の剛性差である前記ソルダーレジスト層と第1の界面を形成し、前記半田バンプとの剛性差が前記第1の剛性差よりも小さい第2の剛性差である前記凸状部と第2の界面を形成するステップと、
を含むことを特徴とするパッケージ基板ユニットの製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US34470110P | 2010-09-16 | 2010-09-16 | |
US61/344,701 | 2010-09-16 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012064911A JP2012064911A (ja) | 2012-03-29 |
JP6081044B2 true JP6081044B2 (ja) | 2017-02-15 |
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Application Number | Title | Priority Date | Filing Date |
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JP2010232731A Expired - Fee Related JP6081044B2 (ja) | 2010-09-16 | 2010-10-15 | パッケージ基板ユニットの製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8800142B2 (ja) |
EP (1) | EP2461361A3 (ja) |
JP (1) | JP6081044B2 (ja) |
KR (2) | KR20120029311A (ja) |
TW (1) | TWI434385B (ja) |
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JP2009224581A (ja) * | 2008-03-17 | 2009-10-01 | Sanyo Electric Co Ltd | 素子搭載用基板およびその製造方法、半導体モジュールおよびその製造方法、電極構造、携帯機器 |
JP2009239192A (ja) * | 2008-03-28 | 2009-10-15 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP2009246166A (ja) * | 2008-03-31 | 2009-10-22 | Fujitsu Ltd | 電子部品パッケージおよび基板ユニット並びにプリント配線板およびその製造方法 |
KR20100060968A (ko) | 2008-11-28 | 2010-06-07 | 삼성전기주식회사 | 메탈 포스트를 구비한 기판 및 그 제조방법 |
US8153905B2 (en) | 2009-02-27 | 2012-04-10 | Ibiden Co., Ltd. | Method for manufacturing printed wiring board and printed wiring board |
US20110299259A1 (en) * | 2010-06-04 | 2011-12-08 | Yu-Ling Hsieh | Circuit board with conductor post structure |
US8755196B2 (en) * | 2010-07-09 | 2014-06-17 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
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2010
- 2010-10-15 JP JP2010232731A patent/JP6081044B2/ja not_active Expired - Fee Related
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2011
- 2011-02-02 EP EP11153062A patent/EP2461361A3/en not_active Withdrawn
- 2011-02-08 US US12/929,680 patent/US8800142B2/en not_active Expired - Fee Related
- 2011-02-22 KR KR1020110015720A patent/KR20120029311A/ko active Application Filing
- 2011-02-25 TW TW100106441A patent/TWI434385B/zh not_active IP Right Cessation
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2013
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EP2461361A3 (en) | 2013-04-03 |
KR20120029311A (ko) | 2012-03-26 |
TW201214643A (en) | 2012-04-01 |
TWI434385B (zh) | 2014-04-11 |
JP2012064911A (ja) | 2012-03-29 |
EP2461361A2 (en) | 2012-06-06 |
KR20130135214A (ko) | 2013-12-10 |
US20120067635A1 (en) | 2012-03-22 |
KR101440249B1 (ko) | 2014-09-17 |
US8800142B2 (en) | 2014-08-12 |
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