CN1898744A - 低电压工作动态随机访问存储器电路 - Google Patents

低电压工作动态随机访问存储器电路 Download PDF

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Publication number
CN1898744A
CN1898744A CNA2004800266531A CN200480026653A CN1898744A CN 1898744 A CN1898744 A CN 1898744A CN A2004800266531 A CNA2004800266531 A CN A2004800266531A CN 200480026653 A CN200480026653 A CN 200480026653A CN 1898744 A CN1898744 A CN 1898744A
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CN
China
Prior art keywords
transistor
voltage
drain electrode
signal
circuit
Prior art date
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Pending
Application number
CNA2004800266531A
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English (en)
Chinese (zh)
Inventor
邱源城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZMOS Technology Inc
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ZMOS Technology Inc
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Filing date
Publication date
Application filed by ZMOS Technology Inc filed Critical ZMOS Technology Inc
Publication of CN1898744A publication Critical patent/CN1898744A/zh
Pending legal-status Critical Current

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4091Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4085Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4094Bit-line management or control circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065Differential amplifiers of latching type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08Control thereof
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/08Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/005Transfer gates, i.e. gates coupling the sense amplifier output to data lines, I/O lines or global bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2227Standby or low power modes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Vehicle Body Suspensions (AREA)
  • Logic Circuits (AREA)
CNA2004800266531A 2003-09-05 2004-09-03 低电压工作动态随机访问存储器电路 Pending CN1898744A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US50066203P 2003-09-05 2003-09-05
US60/500,662 2003-09-05

Publications (1)

Publication Number Publication Date
CN1898744A true CN1898744A (zh) 2007-01-17

Family

ID=34272981

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2004800266531A Pending CN1898744A (zh) 2003-09-05 2004-09-03 低电压工作动态随机访问存储器电路

Country Status (9)

Country Link
US (3) US7082048B2 (enExample)
EP (1) EP1661137B1 (enExample)
JP (1) JP2007504594A (enExample)
KR (1) KR20060119934A (enExample)
CN (1) CN1898744A (enExample)
AT (1) ATE439672T1 (enExample)
CA (1) CA2537632A1 (enExample)
DE (1) DE602004022561D1 (enExample)
WO (1) WO2005024834A2 (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103077739A (zh) * 2012-12-31 2013-05-01 清华大学 一种冗余结构动态随机访问存储单元
CN103531229A (zh) * 2013-10-18 2014-01-22 上海工程技术大学 一种静态随机存储器
CN115620767A (zh) * 2021-07-12 2023-01-17 长鑫存储技术有限公司 存储器的检测方法和存储器的检测装置

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7287171B1 (en) 2004-03-08 2007-10-23 Altera Corporation Systems and methods for reducing static and total power consumption in programmable logic device architectures
TW200721163A (en) * 2005-09-23 2007-06-01 Zmos Technology Inc Low power memory control circuits and methods
US7755964B2 (en) * 2006-10-25 2010-07-13 Qualcomm Incorporated Memory device with configurable delay tracking
KR100897282B1 (ko) * 2007-11-07 2009-05-14 주식회사 하이닉스반도체 리시버 회로
KR101096225B1 (ko) * 2008-08-21 2011-12-22 주식회사 하이닉스반도체 반도체 메모리 장치 및 그 구동방법
JP2012190522A (ja) 2011-03-14 2012-10-04 Elpida Memory Inc 半導体装置
TWI457575B (zh) * 2012-04-06 2014-10-21 Ind Tech Res Inst 具有自我測試的像素陣列模組及其自我測試方法
US8896344B1 (en) 2013-01-04 2014-11-25 Altera Corporation Heterogeneous programmable device and configuration software adapted therefor
KR20170013488A (ko) * 2015-07-27 2017-02-07 에스케이하이닉스 주식회사 반도체장치 및 반도체시스템
US10656995B2 (en) 2018-10-03 2020-05-19 Micron Technology, Inc. Copy-back operations in a memory device
KR102615012B1 (ko) 2018-11-12 2023-12-19 삼성전자주식회사 메모리 장치 및 그것의 동작 방법
CN114400999A (zh) 2020-12-21 2022-04-26 台湾积体电路制造股份有限公司 电路及其操作方法

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62252597A (ja) * 1986-04-24 1987-11-04 Sony Corp センスアンプ
JP2934448B2 (ja) * 1989-03-20 1999-08-16 株式会社日立製作所 半導体集積回路
US5187395A (en) * 1991-01-04 1993-02-16 Motorola, Inc. BIMOS voltage bias with low temperature coefficient
JP3306682B2 (ja) * 1993-08-18 2002-07-24 日本テキサス・インスツルメンツ株式会社 駆動回路
JP3667787B2 (ja) * 1994-05-11 2005-07-06 株式会社ルネサステクノロジ 半導体記憶装置
US5434822A (en) * 1994-07-07 1995-07-18 Intel Corporation Apparatus and method for adjusting and maintaining a bitline precharge level
JP3482020B2 (ja) * 1994-12-22 2003-12-22 松下電器産業株式会社 センスアンプ回路
TW306001B (enExample) * 1995-02-08 1997-05-21 Matsushita Electric Industrial Co Ltd
JP3260583B2 (ja) * 1995-04-04 2002-02-25 株式会社東芝 ダイナミック型半導体メモリおよびそのテスト方法
US5627487A (en) * 1995-06-28 1997-05-06 Micron Technology, Inc. Charge conserving driver circuit for capacitive loads
US5640350A (en) * 1996-05-01 1997-06-17 Iga; Adam Sempa Multi-bit dynamic random access memory cell storage
JPH10241361A (ja) * 1997-02-25 1998-09-11 Toshiba Corp 半導体記憶装置
JP3742191B2 (ja) * 1997-06-06 2006-02-01 株式会社東芝 半導体集積回路装置
US6043682A (en) * 1997-12-23 2000-03-28 Intel Corporation Predriver logic circuit
JP3853513B2 (ja) * 1998-04-09 2006-12-06 エルピーダメモリ株式会社 ダイナミック型ram
JPH11328955A (ja) * 1998-05-14 1999-11-30 Mitsubishi Electric Corp 半導体回路装置
US6525896B2 (en) * 1998-05-14 2003-02-25 International Business Machines Corporation Method and circuitry for high voltage application with MOSFET technology
JPH11345488A (ja) * 1998-06-01 1999-12-14 Hitachi Ltd 半導体記憶装置
US6573548B2 (en) * 1998-08-14 2003-06-03 Monolithic System Technology, Inc. DRAM cell having a capacitor structure fabricated partially in a cavity and method for operating same
US6535415B2 (en) * 1999-02-22 2003-03-18 Hitachi, Ltd. Semiconductor device
JP2001014846A (ja) * 1999-06-30 2001-01-19 Toshiba Corp 半導体集積回路および半導体記憶装置
KR100331550B1 (ko) * 1999-09-02 2002-04-06 윤종용 반도체 메모리장치의 감지증폭기
JP2002074950A (ja) * 2000-08-29 2002-03-15 Toshiba Corp 半導体集積回路
JP2002298579A (ja) * 2001-03-29 2002-10-11 Toshiba Corp 半導体記憶装置
US6545923B2 (en) * 2001-05-04 2003-04-08 Samsung Electronics Co., Ltd. Negatively biased word line scheme for a semiconductor memory device
JP4439167B2 (ja) * 2002-08-30 2010-03-24 株式会社ルネサステクノロジ 半導体記憶装置
KR100568544B1 (ko) * 2004-09-20 2006-04-07 삼성전자주식회사 계층적 비트 라인 구조를 가지는 반도체 메모리 장치 및반도체 메모리 장치의 동작 방법

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103077739A (zh) * 2012-12-31 2013-05-01 清华大学 一种冗余结构动态随机访问存储单元
CN103531229A (zh) * 2013-10-18 2014-01-22 上海工程技术大学 一种静态随机存储器
CN115620767A (zh) * 2021-07-12 2023-01-17 长鑫存储技术有限公司 存储器的检测方法和存储器的检测装置

Also Published As

Publication number Publication date
EP1661137A4 (en) 2007-05-30
US20060227593A1 (en) 2006-10-12
US7082048B2 (en) 2006-07-25
WO2005024834A2 (en) 2005-03-17
US7839701B2 (en) 2010-11-23
DE602004022561D1 (de) 2009-09-24
US7324390B2 (en) 2008-01-29
US20050083769A1 (en) 2005-04-21
US20080008018A1 (en) 2008-01-10
EP1661137A2 (en) 2006-05-31
EP1661137B1 (en) 2009-08-12
CA2537632A1 (en) 2005-03-17
WO2005024834A3 (en) 2005-12-15
JP2007504594A (ja) 2007-03-01
KR20060119934A (ko) 2006-11-24
ATE439672T1 (de) 2009-08-15

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