CN113228272A - 具有无源器件组件的集成器件封装 - Google Patents

具有无源器件组件的集成器件封装 Download PDF

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Publication number
CN113228272A
CN113228272A CN201980086230.5A CN201980086230A CN113228272A CN 113228272 A CN113228272 A CN 113228272A CN 201980086230 A CN201980086230 A CN 201980086230A CN 113228272 A CN113228272 A CN 113228272A
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Prior art keywords
integrated device
package
die
rdl
stack
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CN201980086230.5A
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V·万卡他德莱
S·A·库德塔卡尔
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Analog Devices Inc
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Analog Devices Inc
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Abstract

公开集成器件封装。封装可包括封装基板和具有有源电子线路的集成器件管芯。集成器件管芯可具有第一侧和与所述第一侧相对的第二侧。第一侧可具有通过焊线电连接到所述封装基板的焊盘。重布线层(RDL)堆叠可设置在所述集成器件管芯的第一侧上。所述RDL堆叠可包括绝缘层和导电重布线层。封装可包括无源电子器件组件，安装并电连接到所述RDL堆叠。

Description

具有无源器件组件的集成器件封装
相关申请的交叉引用
本申请要求于2018年12月6日提交的美国临时专利申请第62/776,342号的优先权，其全部内容在此通过引用整体并入并用于所有目的。
技术领域
本领域涉及具有无源器件组件的集成器件封装。
背景技术
各种类型的电子系统可包括无源电子元件，例如电容器、电阻器、电感器等。无源电子元件可用于在被电子系统的其他元件处理之前或之后调节或过滤电信号。将无源电子元件结合到电子系统中会占用宝贵的电路板空间，并因此会增加电子系统的占地面积。此外，将无源电子元件连接到系统中的其他设备可引入电气损耗。因此，仍然需要改进将无源电子元件结合到电子系统中。
发明内容
在一个实施方案中，公开集成器件封装。集成器件封装可包括封装基板和具有有源电子线路的集成器件管芯。集成器件管芯可具有第一侧和与所述第一侧相对的第二侧，所述第一侧包括通过焊线电连接到所述封装基板的焊盘。封装可包括设置在所述集成器件管芯的第一侧上的重布线层(RDL)堆叠，所述RDL堆叠包括绝缘层和导电重布线层。封装可包括无源电子器件组件，安装并电连接到所述RDL堆叠。
在另一个实施方案中，公开传感器模块。传感器模块可包括电子器件。电子器件可包括元件和设置在所述元件的第一侧上的重布线层(RDL)堆叠。所述RDL堆叠可包括绝缘层和导电重布线层。电子器件可包括无源电子器件组件，安装并电连接到所述RDL堆叠。传感器模块还可包括成像传感器组件，所述电子器件安装到所述成像传感器组件。
附图说明
现在将参考附图通过非限制性示例来描述本公开的实施例。
图1是根据一个实施例的电子设备的示意性侧剖视图。
图2A是根据另一个实施例的包括电子器件的集成器件封装的示意性侧截面图。
图2B是根据另一个实施例的包括电子器件的集成器件封装的示意性侧截面图。
图3是根据一个实施例的传感器模块的示意性侧剖视图。
具体实施方式
在此公开的各种实施例涉及一种集成器件封装，该集成器件封装包括具有安装到重布线层(RDL)堆叠的无源器件组装的电子器件，该重布线层(RDL)堆叠设置在集成器件管芯的表面上方。在一些封装中，无源电子器件可以安装到邻近集成器件管芯的基板，例如系统板或封装基板。在这样的封装中，由于无源电子器件的横向相邻安装布置，占用空间可能比期望的大。此外，将无源电子器件安装在集成器件管芯附近并通过基板将它们电连接可能会增加无源电子器件和集成器件管芯之间的电子信号通路的长度，这会导致电损失、噪音和性能下降。
在本文公开的实施例中，通过将无源电子器件安装在更靠近集成器件管芯的有源电子电路的位置，例如通过将无源电子器件安装到位于管芯上方的所述RDL堆叠，可以提高封装的性能。在一些实施例中，无源电子器件可以安装在管芯的横向覆盖区内的管芯上方，这也可以有益地减少封装的总体覆盖区。
此外，在一些实施例中，封装(包括安装到所述RDL堆叠的无源器件)可以安装到成像传感器组件并且可以被配置为处理由传感器组件转换的信号。例如，如本文所解释的，传感器组件可以包括安装到传感器基板的传感器芯片。传感器芯片(例如，光电二极管阵列或PDA)可以将电磁辐射转换为电信号。信号可以通过传感器基板传输到封装。有利地，具有无源电子器件的封装可提供减小的占用面积，这对于各种类型的传感器组件而言可能是重要的。
图1是根据一个实施例的电子设备1的示意性侧截面图。器件1可以包括元件，该元件包括集成器件管芯2，集成器件管芯2具有形成在其中的有源部件(例如，有源电路)。图1的元件是一个集成器件管芯；然而，在其他实施例中，如下面结合图3所解释的，该元件可以包括另一个合适的装置，例如插入器。集成器件管芯2可以包括半导体管芯，例如由硅、锗或其他III-IV族半导体材料组合形成的管芯。集成器件管芯2可以包括任何合适类型的器件管芯，例如处理器管芯、存储器管芯、微机电系统(MEMS)管芯、传感器芯片等。如本文结合图3所解释的，例如，管芯2可以包括处理器管芯，该处理器管芯被配置为处理由传感器组件转换的信号。管芯2的上表面18可以包括通过绝缘钝化层5暴露的多个导电焊盘4。在一些布置中，钝化层5可以与接合焊盘4的一部分重叠以限定接合区域。在各种实施例中，例如，在晶片制造期间，可以在管芯2上图案化焊盘4和钝化层5。导电焊盘4可以包括任何合适类型的导电材料，例如铜。钝化层5可以包括绝缘或介电材料，例如氧化硅、氮化硅等。在一些布置中，所述RDL堆叠3可以设置在有源电路之上。在一些实施例中，管芯2的有源电路可以设置在管芯2的上表面18处或附近。在其他实施例中，管芯2的有源电路可以设置在管芯2的相对下表面19处或附近，其中焊盘4通过半导体通孔(TSV)连接。在其他实施例中，管芯2的有源电路可以设置在管芯2中的上表面18和下表面19之间。
可以在元件的上表面18上提供重布线层(RDL)堆叠3，该元件是图1的实施例中的管芯2。无源器件组装12可以安装到元件的所述RDL堆叠3。所述RDL堆叠3可以包括一层或多层绝缘和导电材料，以提供管芯2的焊盘4和其他器件之间的电连通。RDL通常用于提供到其他器件的连接点(例如，通过焊料凸块或引线键合)，其几何图形与管芯2中的焊盘4所提供的图形不同。例如，所述RDL堆叠3可以被配置为横向扇出或扇入信号输入输出(I/O)焊盘，用于连接到外部设备。
在所示实施例中，无源器件组装12包括一个或多个无源电子器件11a、11b，它们通过导电粘合剂10(例如，焊膏、导电环氧树脂、各向异性导电膜或任何其他合适的粘合剂)安装到所述RDL堆叠3。无源电子器件11a、11b可以包括任何合适类型的无源器件，例如任何合适的表面安装技术(SMT)组件。例如，无源电子器件11a、11b可以包括电容器、电感器、电阻器等中的一个或多个。无源器件11a、11b可以用于隔离、噪声过滤、调节等。在一些布置中，可以在封装2的局部区域提供金属盖用于电磁干扰屏蔽。然而，在所示的实施例中，可能优选地将模制化合物用于传感器组件应用以保护包覆模制部件。此外，一些利用盖子来限定腔体的器件可能会这样做以屏蔽整个集成器件管芯。在一些实施例中，例如成像传感器应用，仅管芯和/或无源组件的一侧可能受到有害辐射，使得无源器件和/或管芯可能被包覆成型。因此，有利地，本文公开的实施例可以使用模塑料，该模制化合物可能比并入用于额外屏蔽的金属盖更具成本效益。尽管图1中示出了两个设备11a、11b，但是应当理解，可以提供任何合适数量的无源设备，包括一个、三个、四个或多于四个无源电子器件。
图1所示的所述RDL堆叠3可以包括多个绝缘和导电层。例如，如图1所示，所述RDL堆叠3可以包括第一绝缘再钝化层6和导电重布线层(RDL)7。在一些实施例中，可以在单独的制造设施中提供再钝化层6和导电RDL7，例如，在生产线后端(BEOL)设施中。在一些实施例中，可以在切割晶片之前(例如，在晶片级处理期间)或在切割晶片之后(例如，在切片芯片之间具有绝缘材料(例如聚合物)的重构晶片上)形成所述RDL堆叠3。在一些实施例中，再钝化层6可以沉积在管芯2的上表面18上并且可以被图案化以暴露下面的焊盘4。导电RDL7可以沉积在再钝化层6上并且可以延伸到再钝化层6中定义的孔中，以便提供与焊盘4的机械和电连接。
可以在导电RDL7上方和在导电RDL7中提供的间隙中的第一再钝化层6的部分之上提供第二绝缘再钝化层9。与第一再钝化层6一样，第二再钝化层9可以被图案化以暴露部分导电RDL7。凸块下金属化(UBM)层8可以设置在第二再钝化层9上方和导电RDL7的暴露部分上方。如图所示，UBM层8可以电连接到导电RDL7的暴露部分。如图所示，所述RDL堆叠3包括两个绝缘层(层6、9)和两个导电层(层7、8)，但是应当理解，任何合适数量的绝缘和导电层都可以用于所述RDL堆叠3。
第一和第二绝缘再钝化层6、9可以包括任何合适类型的绝缘或介电材料。例如，在一些实施例中，再钝化层6、9可以包括无机电介质，例如氧化硅、氮化硅、氮氧化硅等，或者可以包括诸如聚合物(例如环氧树脂、聚酰亚胺、苯并环丁烯(BCB)、聚苯并恶唑(PBO)或任何其他合适的介电材料)的有机电介质。导电RDL7和UBM层8包括导电材料，例如任何合适的金属，例如铜、铝等。无源电子器件11a、11b可以通过导电粘合剂10电连接到UBM层8。因此，所述RDL堆叠3可以通过UBM层8、导电RDL7和管芯2的焊盘4在无源器件11a、11b和管芯2中的有源电路之间提供电通信。
在所示实施例中，无源器件11a、11b被定位为覆盖集成器件管芯2，例如，以便布置在管芯2的横向覆盖区内。在这样的布置中，与在封装基板上提供邻近管芯2的无源器件的封装相比，可以减小封装的总体横向占用面积。此外，将无源器件11a、11b定位在有源电路附近可以有益地降低电噪声和损耗。例如，在一些实施例中，可以在所述RDL堆叠3附近的上表面18处或附近提供有源电路，以减少信号传输距离和损耗。在其他实施例中，无源器件11a、11b和所述RDL堆叠3可以设置在管芯的背面，并且衬底通孔(TSV)可以提供有源电路与所述RDL堆叠3和器件11a、11b之间的电通信。在一些布置中，无源器件11a、11b可以覆盖管芯中的有源电路。在其他实施例中，无源器件11a、11b可以不覆盖有源电路。在图示的实施例中，所述RDL堆叠3提供扇入电连接，其中来自焊盘4的信号横向向内传送到无源器件11a、11b的对应触点或引线。然而，如下文所解释，在其他实施例中，所述RDL堆叠3可以提供到无源器件的扇出电连接，该无源器件可以至少部分地从管芯2横向偏移。
尽管未在图1中示出，器件1可以安装到任何合适类型的封装基板，例如印刷电路板(PCB)、引线框、陶瓷基板等。在一些实施例中，可以在将管芯2安装到封装基板之前将无源器件组装12安装到管芯2。在其他实施例中，可以在将无源器件组装12安装到管芯2之前将管芯2安装到基板。在一些实施例中，可以在管芯2和所述RDL堆叠3上方提供模制化合物或密封剂。例如，管芯2和无源器件11a、11b可以以类似于图2A中所示的布置的布置进行封装，如下所述。在其他实施例中，可以在管芯2和RDL堆叠3之上提供封装盖，在封装盖和管芯2之间设置气体(例如，空气)腔。还有其他封装布置可能是合适的。在一些实施例中，所述RDL堆叠3可以被布置为提供扇出电配置。在这样的实施例中，可以在管芯2的一部分之上提供模制化合物，并且可以在管芯2之上和在管芯2的横向向外延伸的模制化合物的部分之上提供所述RDL堆叠3。在一些实施例中，UBM层8可以从管芯横向向外延伸，并且一个或多个无源器件11a、11b可以安装到UBM层8，使得无源器件11a、11b的部分从管芯2横向偏移。
图2A是根据另一个实施例的包括电子器件1的集成器件封装20的示意性侧截面图。除非另有说明，否则图2A的组件可以与图1的相同编号的组件相同或大致相似。例如，与图1一样，图2A的实施例包括安装到集成器件管芯2表面上的RDL堆叠3(详见图1)的无源器件组装12。在图2A的实施例中，管芯2可以通过粘合剂(未示出)安装到封装基板16。如上所述，封装基板可包括任何合适类型的基板，例如PCB、引线框、陶瓷基板等。在各种实施例中，例如图3，封装基板16可具有配置为与传感器组件的焊盘对应的电连通的焊盘。封装基板16可以包括其中具有导电迹线的绝缘基板。
与图1的实施例一样，所述RDL堆叠3可以形成在管芯2的上表面18上。然而，与图1的实施例不同，在图2A的实施例中，无源器件组件12包括通过导电粘合剂(例如，通过焊球或凸块14)安装到所述RDL堆叠3的插入器13。在一些实施例中，插入器13可以包括具有用于路由信号的迹线和通孔但没有有源处理电路的虚拟插入器。在其他实施例中，插入器13可以包括具有有源处理电路的电有源插入器。无源电子器件11a、11b可以通过导电粘合剂(图2A中未示出)安装到插入器13。插入器13可以包括任何合适类型的插入器，例如层压结构、PCB基板、陶瓷插入器、半导体(例如，硅)插入器等。插入器13可通过引线键合15a电连接至封装基板16。因此，在一些实施例中，无源器件组装12可以有利地与封装基板16(例如，通过引线键合15a)和管芯2(例如，通过具有焊球14的倒装芯片布置)两者通信。替代地，插入器可以通过管芯2例如通过焊料凸块14单独连接到封装基板16。管芯2可以通过线接合15b电连接到封装基板16。或者，管芯2可包括有源侧向上或向下的TSV。虽然未示出，但应当理解，封装基板16还包括外表面上的引线，用于电连接到较大的系统，例如系统板。根据封装基板16的结构，外部引线可以采用各种形式，例如引线框架引线、焊球等。
还应当理解，图1的电子器件1和无源器件组装12可以用于封装20中，而不是图2A中所示的插入器13。在这样的实施例中，无源器件组装12(包括例如无源器件11a、11b)可以在没有插入器的情况下直接安装到管芯2的所述RDL堆叠3。可以在无源器件11a、11b、管芯2和封装基板16的暴露上部上方提供模制化合物17。
可以在无源器件11a、11b、插入器13、引线键合15a、15b和管芯2上方提供模制化合物17或密封剂以保护封装部件免受外部环境影响。与图1的实施例一样，图2A的封装20可以有益地减少总体封装占用面积，同时提高封装20的电性能。例如，与图1一样，无源器件组装12(例如，无源器件11a、11b和插入器13)可以位于管芯2的横向覆盖区内。然而，在其他实施例中，无源器件组装12的至少一部分可以位于管芯2的横向覆盖区之外。
如上所述，本文公开的各种实施例涉及被配置用于成像系统中的传感器模块，例如数字X射线成像系统、计算机断层摄影(CT)成像系统、超声成像系统或任何其他合适的成像系统。例如，图1和2A的无源集成器件组件可以设置在传感器组件中以调节或以其他方式操作由传感器组件转换的信号。有利地，由电子设备1和封装20提供的减小的占用空间可以使传感器模块也具有减小的占用空间。
图2B图示了集成器件封装20的另一个实施例。图2B大体上类似于图2A中所示的封装20。除非另有说明，否则图2B中的附图标记表示与图2A中编号相同的组件相同或大致相似的组件。在图2B的实施例中，插入器13可以横向大于集成器件管芯2的对应横向覆盖区。图2B的较大的插入器13可以有利地容纳可以改进封装20的功能性的多个电子部件。例如，一个或多个附加的有源器件管芯42可以通过合适的导电粘合剂安装到插入器13上。器件管芯42可以处理和/或测试封装20的部件，包括来自管芯2和/或安装到插入器13的部件的信号。
图3是根据一个实施例的传感器模块30的示意性侧剖视图。传感器模块30可以包括成像传感器组件33和安装到传感器组件3的集成器件封装20。集成器件封装20可以与上述封装20相同或不同。封装20可以包括任何合适类型的无源器件组装12。例如，无源器件组装12可以包括通过粘合剂安装到元件的所述RDL堆叠3的无源电子器件11a、11b。在其他实施例中，无源器件组装12可以包括安装到插入器13的无源器件11a、11b，插入器13安装到元件的所述RDL堆叠3。例如，在一些实施例中，元件可以包括如图1和2中的集成器件管芯2，并且无源器件组装12可以安装到集成器件管芯2。在其他实施例中，该元件可以包括另一种合适的结构，例如插入器、基板、其他类型的器件等。
可以提供照明源34，例如X射线源或任何其他合适的电磁辐射源，并且可以将电磁辐射引导至传感器组件33。在多种实施方案中，尽管此处未示出，但是可以在照明源34和传感器组件33之间提供物体(例如人类患者或任何其他合适的目标物体)。关于传感器组件和为其提供的部件的其他细节可以在美国专利号8,829,454、9,116,022和10,340,302中找到；每个的全部内容特此通过引用整体并入并用于所有目的。
传感器组件33可以包括传感器基板31和安装到传感器基板31的正面的一个或多个传感器芯片32。传感器基板31可以包括任何合适类型的基板，例如层压基板、印刷电路板(PCB)基板、半导体插入器、包含具有嵌入迹线的聚合物的柔性基板，或具有嵌入导电迹线或互连的非导电基底的任何其他合适的基板。传感器芯片32可包括光电二极管阵列(PDA)，其具有将电磁辐射转换为电流的多个光敏元件。尽管未示出，但可以在传感器组件33的前侧提供辐射调节器，例如过滤器或闪烁体。传感器芯片32可以相应地将照射在PDA上的光转换为电信号，该电信号可以传送到传感器基板31。在一些实施例中，传感器芯片32可以通过导电粘合剂例如焊料凸块、各向异性导电膜(ACF)、导电环氧树脂等电连接到传感器基板31。
封装20可以通过导电粘合剂安装到传感器组件33上，例如，多个焊球37、导电环氧树脂等。除了无源器件组装12外，封装20还可以是一个或多个有源集成器件管芯，如上所述。管芯2可以包括有源处理电路，其被配置为处理由传感器芯片32转换并通过传感器基板31传送到封装20的电信号(例如，模拟信号)。封装20的器件可以以任何合适的方式处理这些信号，包括例如信号滤波、模数转换等。封装20的器件处理的信号可以从封装20(例如，通过系统主板)转移到更大的电子系统以在显示器上呈现或以其他方式进一步处理以分析成像对象。
此外，封装20或传感器组件33可包括一个或多个辐射屏蔽罩38以屏蔽敏感电路免受有害电磁辐射。屏蔽罩38可以包括被选择来阻止有害辐射(例如，x射线)撞击敏感电路(例如，管芯2的敏感电路)的任何合适的材料。在一些实施例中，屏蔽罩38可以包括钨。例如，在图3中，辐射屏蔽罩38可以通过粘合剂附接到封装基板16。管芯2可以安装到屏蔽罩38并定位成使得管芯2的敏感电路位于屏蔽罩38的横向覆盖区内。尽管屏蔽罩38被示为封装20的一部分并安装到基板16，但是在其他实施例中，屏蔽罩38可以放置在传感器芯片32和敏感电路(例如芯片2的敏感电路)之间的传感器模块30内的别处。例如，屏蔽罩38可以放置在传感器组件33和封装20之间、传感器组件33内、封装20中的其他位置等。传感器模块30中使用的部件的附加示例(包括辐射屏蔽罩和其他组件)可以在美国专利号8,829,454、9,116,022和10,340,302中找到，每个的全部内容特此通过引用整体并入并用于所有目的。
虽然本发明已经根据某些实施例进行了描述，但对本领域普通技术人员来说显而易见的其他实施例，包括不提供这里阐述的所有特征和优点的实施例，也在本发明的范围内。此外，可以组合上述各种实施例以提供进一步的实施例。此外，在一个实施例的上下文中示出的某些特征也可以并入到其他实施例中。因此，本发明的范围仅通过参考所附权利要求来限定。

Claims (25)

1.集成器件封装，包括：
封装基板；
具有有源电子线路的集成器件管芯，所述集成器件管芯具有第一侧和与所述第一侧相对的第二侧，所述第一侧包括通过焊线电连接到所述封装基板的焊盘；
设置在所述集成器件管芯的第一侧上的重布线层(RDL)堆叠，所述RDL堆叠包括绝缘层和导电重布线层；和
无源电子器件组件，安装并电连接到所述RDL堆叠。
2.权利要求1所述的集成器件封装，其中所述无源电子器件组件包括安装到所述RDL堆叠的一个或多个无源电子器件。
3.权利要求2所述的集成器件封装，其中所述一个或多个无源电子器件包括电容器、电感器和电阻器中的一个或多个。
4.权利要求3所述的集成器件封装，其中所述一个或多个无源电子器件包括电容器。
5.权利要求2至4中任一项所述的集成器件封装，其中所述一个或多个无源电子器件通过导电粘合剂安装到所述RDL堆叠。
6.权利要求1所述的集成器件封装，其中所述无源电子器件组件包括安装到所述RDL堆叠的插入器和安装到所述RDL堆叠的一个或多个无源电子器件。
7.权利要求6所述的集成器件封装，还包括多个焊球，位于所述插入器与所述RDL堆叠之间以电连接所述插入器和所述RDL堆叠。
8.权利要求6至7中任一项所述的集成器件封装，还包括安装到所述插入器的有源器件管芯。
9.权利要求6至8中任一项所述的集成器件封装，其中所述插入器的横向足迹大于所述集成器件管芯的相应横向足迹。
10.权利要求1至9中任一项所述的集成器件封装，其中,所述RDL堆叠包括设置在所述管芯上的第一绝缘再钝化层和设置在所述第一绝缘再钝化层中的间隙中的导电重布线层(RDL)。
11.权利要求10所述的集成器件封装，还包括设置在RDL层上的第二绝缘再钝化层和设置在所述第二绝缘再钝化层的间隙中的凸块下金属化(UBM)层，所述无源电子器件组件电连接到UBM层。
12.权利要求11所述的集成器件封装，还包括在所述集成器件管芯的第一侧上的绝缘钝化层和多个导电焊盘，所述多个导电焊盘连接到所述导电RDL。
13.权利要求1至12中任一项所述的集成器件封装，其中所述无源电子器件组件设置在所述集成器件管芯之上以位于所述集成器件管芯的横向足迹内。
14.权利要求1至12中任一项所述的集成器件封装，其中至少一部分无源电子器件组件设置在所述集成器件管芯的横向足迹之外。
15.权利要求1至14中任一项所述的集成器件封装，其中所述集成器件管芯的第二侧通过粘合剂安装到所述封装基板。
16.权利要求15所述的集成器件封装，还包括设置在所述集成器件管芯和所述无源电子器件组件上的模制化合物。
17.传感器模块，包括成像传感器组件和如权利要求1至16中任一项所述的集成器件封装，所述集成器件封装安装到所述成像传感器组件。
18.权利要求17所述的传感器模块，还包括辐射屏蔽罩，位于所述成像传感器组件的传感器芯片与集成器件管芯之间。
19.传感器模块，包括：
电子器件，包括：
元件和设置在所述元件的第一侧上的重布线层(RDL)堆叠，所述RDL堆叠包括绝缘层和导电重布线层，和
无源电子器件组件，安装并电连接到所述RDL堆叠；和
成像传感器组件，所述电子器件安装到所述成像传感器组件。
20.权利要求19所述的传感器模块，其中所述成像传感器组件包括传感器基板和安装到所述传感器基板的传感器芯片。
21.权利要求19至20中任一项所述的传感器模块，其中所述元件包括集成器件管芯。
22.权利要求21所述的传感器模块，还包括在所述传感器芯片和所述集成器件管芯之间的辐射屏蔽罩。
23.权利要求21或22所述的传感器模块，其中所述集成器件管芯安装到所述封装基板，所述集成器件管芯通过焊线电连接到所述封装基板。
24.权利要求21至23中任一项所述的传感器模块，还包括设置在所述集成器件管芯和所述无源电子器件组件上的模制化合物。
25.权利要求19至24中任一项所述的传感器模块，其中所述无源电子器件组件包括插入器和安装到所述插入器的一个或多个无源电子器件。
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