JP2017183398A - 半導体装置及びその製造方法 - Google Patents
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Abstract
Description
図1及び図2を参照して第1の実施形態の半導体装置について説明する。図1は、第1の実施形態の半導体装置の製造方法の一部を示す平面図である。図1において、半導体チップ上に設けられた基板及び樹脂は、省略している。図2は、図1におけるA−A’線における半導体装置の断面を示す断面図である。図3は、図1におけるB−B’線における半導体装置の断面を示す断面図である。ここで、A−A’線とB−B’線は例えば、互いに直行する方向である。また、本実施形態では、A−A’線の方向を長手方向し、B―B’線の方向を幅方向とする。
次に本実施形態の半導体装置の製造方法について説明する。図4は本実施形態の半導体装置の製造方法示すフローである。図5〜図9は、本実施形態の半導体装置の製造工程の一部を示す断面図である。
次に第2の実施形態の半導体装置の製造方法について説明する。実施形態1において、1の半導体チップを封止して個別に半導体装置を作製する方法を示したが、本実施形態において、複数の半導体チップを同時に封止して、複数の半導体装置を作製する方法について示す。
2 接着フィルム
3 U字型磁性体基板(第1の磁性体基板、下部シールド板)
4 半導体デバイス
6 ボンディングワイヤー
7 封止膜(封止材)
8 板状磁性体基板(第2の磁性体基板、上部シールド板)
10 半導体デバイス
11 ボイド
23 U字型磁性体基板
24 磁性体粒子
25 ダイアタッチ材
100、200 半導体装置
Claims (6)
- 第1の面の端部に互いに対向する第1の側壁部及び第2の側壁部を有する第1の磁性体基板を基板上に設ける工程と、
前記第1の側壁及び第2の側壁の間に前記第1の磁性体基板上に接着剤を介して半導体チップを設ける工程と、
第2の面を有し、前記第2面上に樹脂が設けられた板状磁性体基板を前記第1の側壁及び前記第2の側壁上に接して設ける工程と、
を有する半導体装置の製造方法。 - 前記第2面上に設けられた樹脂の厚さは、前記第1の側壁部及び前記第2の側壁部の高さよりも厚い請求項1に記載の半導体装置の製造方法。
- 板状磁性体基板を設ける工程は、前記板状磁性体基板を前記第1の側壁及び前記第2の側壁上に接して搭載する工程と、前記搭載の後に前記樹脂を硬化する工程とを含み、
前記樹脂を樹脂固めた後、半導体チップごとに個片化する工程と、
を有する請求項1又は2に記載の半導体装置の製造方法。 - 前記半導体チップを設ける工程は、第1の半導体チップ及び第2の半導体チップを設ける工程であり、
前記板状磁性体基板は、前記半導体チップの2以上の幅を有し、前記第1の半導体チップ及び前記第2の半導体チップ上に前記第1の板状磁性体基板を設けて前記第1の半導体チップ及び前記第2の半導体チップを封止する請求項1乃至3のいずれか1項に記載の半導体装置の製造方法。 - 基板と、
前記基板の第1の面上に設けられ、端部に互いに対向する第1の側壁部及び第2の側壁部を有する第1の磁性体基板と、
前記第1の磁性体基板上に接着剤を介して設けられた半導体チップと、
前記第1の側壁部と、前記第2の側壁部とに直に接する第2の磁性体基板上と、
前記半導体チップと前記基板とを接続するワイヤと、
前記半導体チップと前記ワイヤを封止する封止材と、
を有する半導体装置。 - 前記封止材は、基材フィルム、粘着剤及び接着材を含む請求項5に記載の半導体装置。
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JP2016065743A JP2017183398A (ja) | 2016-03-29 | 2016-03-29 | 半導体装置及びその製造方法 |
US15/451,315 US10109596B2 (en) | 2016-03-29 | 2017-03-06 | Semiconductor device and method of manufacturing the same |
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JP2016065743A JP2017183398A (ja) | 2016-03-29 | 2016-03-29 | 半導体装置及びその製造方法 |
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KR102354370B1 (ko) | 2015-04-29 | 2022-01-21 | 삼성전자주식회사 | 쉴딩 구조물을 포함하는 자기 저항 칩 패키지 |
WO2020118031A1 (en) | 2018-12-06 | 2020-06-11 | Analog Devices, Inc. | Integrated device packages with passive device assemblies |
US11664340B2 (en) | 2020-07-13 | 2023-05-30 | Analog Devices, Inc. | Negative fillet for mounting an integrated device die to a carrier |
US20220344578A1 (en) * | 2021-04-22 | 2022-10-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and manufacturing method thereof |
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