JP6235598B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP6235598B2 JP6235598B2 JP2015535196A JP2015535196A JP6235598B2 JP 6235598 B2 JP6235598 B2 JP 6235598B2 JP 2015535196 A JP2015535196 A JP 2015535196A JP 2015535196 A JP2015535196 A JP 2015535196A JP 6235598 B2 JP6235598 B2 JP 6235598B2
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- 239000004065 semiconductor Substances 0.000 title claims description 129
- 238000004519 manufacturing process Methods 0.000 title claims description 41
- 239000000758 substrate Substances 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 10
- 239000000696 magnetic material Substances 0.000 claims description 3
- 239000011347 resin Substances 0.000 description 32
- 229920005989 resin Polymers 0.000 description 32
- 239000000853 adhesive Substances 0.000 description 13
- 230000001070 adhesive effect Effects 0.000 description 13
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 4
- 238000005452 bending Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 229910001004 magnetic alloy Inorganic materials 0.000 description 3
- 230000035699 permeability Effects 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- 229910017827 Cu—Fe Inorganic materials 0.000 description 2
- 229910003296 Ni-Mo Inorganic materials 0.000 description 2
- -1 PC permalloy (Ni—Mo Chemical compound 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- DDTIGTPWGISMKL-UHFFFAOYSA-N molybdenum nickel Chemical compound [Ni].[Mo] DDTIGTPWGISMKL-UHFFFAOYSA-N 0.000 description 2
- 229910000889 permalloy Inorganic materials 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000005389 magnetism Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Hall/Mr Elements (AREA)
Description
先ず、図1及び図2を参照して、第1の実施形態に係る半導体装置の構成について説明する。図1は、第1の実施形態に係る半導体装置の概略的な平面図であり、図2(a)は、図1のI−I′切断断面図、図2(b)は、同じくII−II′切断断面図である。
次に、本実施形態に係る半導体装置の製造方法について説明する。図3、図5及び図8は、本実施形態に係る半導体記憶装置の製造方法を示すための概略的な平面図であり、図4(a)、図6(a)及び図9(a)は、それらのI−I′切断断面図、図4(b)、図6(b)及び図9(b)は、同じくII−II′切断断面図である。また、図7は、同製造方法を示す断面図である。
次に、第2の実施形態に係る半導体装置の構成について説明する。図10は、第1の実施形態に係る半導体装置の概略的な平面図であり、図11(a)は、図10のI−I′切断断面図、図11(b)は、同じくII−II′切断断面図である。
次に、第3の実施形態に係る半導体装置の構成について説明する。図19は、第1の実施形態に係る半導体装置の概略的な平面図であり、図20(a)は、図19のI−I′切断断面図、図20(b)は、同じくII−II′切断断面図である。
上記各実施形態においては、側壁部32の上端が上部シールド板7に対して略垂直に形成されていた。しかしながら、例えば図28に示すように、側壁部32の上端を上部シールド板7に対して略平行な面をなすように形成することも可能である。このような構成は、下部シールド板3を形成する際、磁性体からなる板を折り曲げるだけで容易に実現可能である。このような構成によれば、下部シールド板3と上部シールド板7との接触面積を増加させて、接触面における磁気抵抗を低減し、よりシールド性を高めることが可能であると考えられる。
Claims (3)
- 第1の方向及び前記第1の方向と直交する第2の方向に延在し、第1のコンタクト部が形成された基板上に、前記第1のコンタクト部を避けるように磁性体を用いた下部シールド板を設け、
前記下部シールド板上に、前記第1のコンタクト部と電気的に接続される第2のコンタクト部を有する半導体チップを、前記第1のコンタクト部と前記第2のコンタクト部とが対応するように配置し、
前記第1のコンタクト部と前記第2のコンタクト部とを接続材によって電気的に接続し、
所定の厚みを有する可塑性の絶縁層が裏面に形成された磁性体を用いた上部シールド板を、前記第2のコンタクト部及び前記接続材を避けるように前記裏面から前記半導体チップに押圧し、前記下部シールド板及び前記上部シールド板の少なくとも一方のシールド板から他方のシールド板に延びる側壁部を介して前記下部シールド板と前記上部シールド板とを接触させる
ことを特徴とする半導体装置の製造方法。 - 前記下部シールド板若しくは前記上部シールド板は、前記第1方向の両端にそれぞれ前記側壁部を有し、又は、前記下部シールド板及び前記上部シールド板がそれぞれ前記側壁部を有する
ことを特徴とする請求項1記載の半導体装置の製造方法。 - 前記下部シールド板は、前記側壁部を有する
ことを特徴とする請求項1又は2記載の半導体装置の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2013/073755 WO2015033396A1 (ja) | 2013-09-04 | 2013-09-04 | 半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2015033396A1 JPWO2015033396A1 (ja) | 2017-03-02 |
JP6235598B2 true JP6235598B2 (ja) | 2017-11-22 |
Family
ID=52627906
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015535196A Active JP6235598B2 (ja) | 2013-09-04 | 2013-09-04 | 半導体装置及びその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9978690B2 (ja) |
JP (1) | JP6235598B2 (ja) |
CN (1) | CN105518850B (ja) |
WO (1) | WO2015033396A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102354370B1 (ko) * | 2015-04-29 | 2022-01-21 | 삼성전자주식회사 | 쉴딩 구조물을 포함하는 자기 저항 칩 패키지 |
JP6491994B2 (ja) * | 2015-11-06 | 2019-03-27 | 東芝メモリ株式会社 | 半導体装置 |
JP2017183398A (ja) * | 2016-03-29 | 2017-10-05 | 東芝メモリ株式会社 | 半導体装置及びその製造方法 |
JP2019103232A (ja) * | 2017-12-01 | 2019-06-24 | 矢崎総業株式会社 | 電子部品ユニット |
US10818609B2 (en) * | 2018-07-13 | 2020-10-27 | Taiwan Semiconductor Manufacturing Company Ltd. | Package structure and method for fabricating the same |
US10892230B2 (en) | 2018-07-30 | 2021-01-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | Magnetic shielding material with insulator-coated ferromagnetic particles |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2092371C (en) * | 1993-03-24 | 1999-06-29 | Boris L. Livshits | Integrated circuit packaging |
US6479886B1 (en) * | 2000-06-19 | 2002-11-12 | Intel Corporation | Integrated circuit package with EMI shield |
US6777819B2 (en) | 2000-12-20 | 2004-08-17 | Siliconware Precision Industries Co., Ltd. | Semiconductor package with flash-proof device |
US20030067757A1 (en) | 2001-10-05 | 2003-04-10 | Richardson Patrick J. | Apparatus and method for shielding a device |
JP2005217221A (ja) | 2004-01-30 | 2005-08-11 | Sony Corp | 半導体パッケージ及びその製造方法 |
US7629674B1 (en) * | 2004-11-17 | 2009-12-08 | Amkor Technology, Inc. | Shielded package having shield fence |
JP4941264B2 (ja) | 2007-12-07 | 2012-05-30 | 大日本印刷株式会社 | 半導体装置用のメタルシールド板、メタルシールド用シート、半導体装置、メタルシールド用シートの製造方法、およびメタルシールド板の製造方法 |
JP5343261B2 (ja) * | 2008-11-18 | 2013-11-13 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP5354376B2 (ja) | 2009-11-27 | 2013-11-27 | 大日本印刷株式会社 | 半導体装置および半導体装置の製造方法 |
JP5829562B2 (ja) * | 2012-03-28 | 2015-12-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2013
- 2013-09-04 JP JP2015535196A patent/JP6235598B2/ja active Active
- 2013-09-04 US US14/916,864 patent/US9978690B2/en active Active
- 2013-09-04 CN CN201380079333.1A patent/CN105518850B/zh not_active Expired - Fee Related
- 2013-09-04 WO PCT/JP2013/073755 patent/WO2015033396A1/ja active Application Filing
Also Published As
Publication number | Publication date |
---|---|
JPWO2015033396A1 (ja) | 2017-03-02 |
US20160197045A1 (en) | 2016-07-07 |
WO2015033396A1 (ja) | 2015-03-12 |
US9978690B2 (en) | 2018-05-22 |
CN105518850A (zh) | 2016-04-20 |
CN105518850B (zh) | 2018-05-11 |
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