JP6280014B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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Description
[第1の実施の形態に係る半導体装置の構造]
まず、第1の実施の形態に係る半導体装置の構造について説明する。図1は、第1の実施の形態に係る半導体装置を例示する図であり、図1(b)は平面図であり、図1(a)は図1(b)のA−A線に沿う断面図である。但し、図1(b)において、モールド樹脂80の図示は省略されている。
次に、第1の実施の形態に係る半導体装置の製造方法について説明する。図2〜図6は、第1の実施の形態に係る半導体装置の製造工程を例示する図である。まず、図2に示す工程では、個片化されて配線基板10となる複数の領域Cを有するシート状の配線基板10Sを準備する。ここで、図2(b)は平面図であり、図2(a)は、図2(b)の破線で囲まれた領域Cのうちの1つを示す断面図である。なお、配線基板10Sの基本的な構造は前述の配線基板10と同様である。又、配線基板10Sは、例えば、周知のビルドアップ工法により作製できるが、他の方法で作製された層構造等の異なる配線基板を用いても構わない。
第2の実施の形態では、半導体チップをモールド樹脂を介して下側磁気シールド材と上側磁気シールド材とで覆う例を示す。なお、第2の実施の形態において、既に説明した実施の形態と同一構成部についての説明は省略する場合がある。
まず、第2の実施の形態に係る半導体装置の構造について説明する。図7は、第2の実施の形態に係る半導体装置を例示する図であり、図7(b)は平面図であり、図7(a)は図7(b)のA−A線に沿う断面図である。但し、図7(b)において、上側磁気シールド材70Aの図示は省略されている。
次に、第2の実施の形態に係る半導体装置の製造方法について説明する。図8及び図9は、第2の実施の形態に係る半導体装置の製造工程を例示する図である。まず、第1の実施の形態の図2〜図4と同様の工程を実施する。
第1の実施の形態の変形例では、半導体チップ40を配線基板10にフリップチップ接続する例を示す。なお、第1の実施の形態の変形例において、既に説明した実施の形態と同一構成部についての説明は省略する場合がある。
10、10S 配線基板
11、14 絶縁層
11x、14x ビアホール
12、13 配線層
15 パッド
16 表面処理層
17 ソルダーレジスト層
17x、20x 開口部
20、20S 下側磁気シールド材
40 半導体チップ
60 ボンディングワイヤ
70、70A 上側磁気シールド材
80、80A モールド樹脂
90 はんだバンプ
100 バンプ
110 アンダーフィル樹脂
Claims (10)
- 配線基板と、
前記配線基板上に設けられた下側磁気シールド材と、
前記下側磁気シールド材上に搭載された、磁気記憶素子を有する半導体チップと、
前記下側磁気シールド材との間に前記半導体チップを挟むように、前記半導体チップ上に設けられた、上側磁気シールド材と、を有し、
前記下側磁気シールド材及び前記上側磁気シールド材は軟磁性樹脂であり、
前記下側磁気シールド材と前記上側磁気シールド材とが別体に設けられており、
前記下側磁気シールド材と前記上側磁気シールド材とが直接接している半導体装置。 - 前記軟磁性樹脂は、軟磁性材料の周囲を絶縁膜で被覆したフィラーを含有する樹脂からなる請求項1記載の半導体装置。
- 前記軟磁性材料は軟鉄である請求項2記載の半導体装置。
- 前記半導体チップの前記配線基板と対向する第1面は、前記下側磁気シールド材に直接覆われ、
前記半導体チップの前記第1面と反対側の第2面、及び側面は、前記上側磁気シールド材に直接覆われ、
前記上側磁気シールド材を覆うように、前記配線基板上に封止樹脂が設けられている請求項1乃至3の何れか一項記載の半導体装置。 - 前記半導体チップの前記配線基板と対向する第1面は、前記下側磁気シールド材に直接覆われ、
前記半導体チップの前記第1面と反対側の第2面、及び側面を直接覆うように、前記下側磁気シールド材上に封止樹脂が設けられ、
前記上側磁気シールド材は、前記封止樹脂を覆い、前記半導体チップ側から前記封止樹脂の周囲に延伸する前記下側磁気シールド材と直接接している請求項1乃至3の何れか一項記載の半導体装置。 - 前記半導体チップは、電極パッドを前記上側磁気シールド材側に向けて前記下側磁気シールド材上に搭載され、
前記下側磁気シールド材には、前記配線基板のパッドを露出する開口部が設けられ、
前記半導体チップの前記電極パッドと、前記下側磁気シールド材の開口部内に露出する前記パッドとは、金属線を介して電気的に接続されている請求項4又は5記載の半導体装置。 - 前記金属線の一部又は全部は、前記封止樹脂に覆われている請求項6記載の半導体装置。
- 配線基板上に、下側磁気シールド材を設ける工程と、
前記下側磁気シールド材上に、磁気記憶素子を有する半導体チップを搭載する工程と、
前記下側磁気シールド材との間に前記半導体チップを挟むように、前記半導体チップ上に、前記下側磁気シールド材とは別体である上側磁気シールド材を設ける工程と、を有し、
前記下側磁気シールド材及び前記上側磁気シールド材は軟磁性樹脂であり、
前記上側磁気シールド材を設ける工程では、前記下側磁気シールド材と前記上側磁気シールド材とが直接接するように前記上側磁気シールド材を設ける半導体装置の製造方法。 - 前記半導体チップを搭載する工程では、前記半導体チップの前記配線基板と対向する第1面が前記下側磁気シールド材に直接覆われるように前記半導体チップを搭載し、
前記上側磁気シールド材を設ける工程では、前記半導体チップの前記第1面と反対側の第2面、及び側面を直接覆うように、前記下側磁気シールド材上に前記上側磁気シールド材を設け、
前記上側磁気シールド材を設ける工程よりも後に、前記上側磁気シールド材を覆うように封止樹脂を設ける工程を有する請求項8記載の半導体装置の製造方法。 - 前記半導体チップを搭載する工程では、前記半導体チップの前記配線基板と対向する第1面が前記下側磁気シールド材に直接覆われるように前記半導体チップを搭載し、
前記上側磁気シールド材を設ける工程よりも前に、前記半導体チップの前記第1面と反対側の第2面、及び側面を直接覆うように、前記下側磁気シールド材上に封止樹脂を設ける工程を有し、
前記上側磁気シールド材を設ける工程では、前記封止樹脂を覆い、前記半導体チップ側から前記封止樹脂の周囲に延伸する前記下側磁気シールド材と直接接するように前記上側磁気シールド材を設ける請求項8記載の半導体装置の製造方法。
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JP2014201765A JP6280014B2 (ja) | 2014-09-30 | 2014-09-30 | 半導体装置及びその製造方法 |
US14/870,078 US9490221B2 (en) | 2014-09-30 | 2015-09-30 | Semiconductor device having multiple magnetic shield members |
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KR102354370B1 (ko) | 2015-04-29 | 2022-01-21 | 삼성전자주식회사 | 쉴딩 구조물을 포함하는 자기 저항 칩 패키지 |
US10535611B2 (en) * | 2015-11-20 | 2020-01-14 | Apple Inc. | Substrate-less integrated components |
US9807866B2 (en) * | 2015-11-30 | 2017-10-31 | Intel Corporation | Shielding mold for electric and magnetic EMI mitigation |
US20170170087A1 (en) | 2015-12-14 | 2017-06-15 | Intel Corporation | Electronic package that includes multiple supports |
JP6407186B2 (ja) * | 2016-03-23 | 2018-10-17 | Tdk株式会社 | 電子回路パッケージ |
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