JP2017059583A - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP2017059583A
JP2017059583A JP2015180895A JP2015180895A JP2017059583A JP 2017059583 A JP2017059583 A JP 2017059583A JP 2015180895 A JP2015180895 A JP 2015180895A JP 2015180895 A JP2015180895 A JP 2015180895A JP 2017059583 A JP2017059583 A JP 2017059583A
Authority
JP
Japan
Prior art keywords
magnetoresistive memory
layer
organic
memory chip
resin layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2015180895A
Other languages
English (en)
Inventor
大塚　雅司
Masashi Otsuka
雅司 大塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2015180895A priority Critical patent/JP2017059583A/ja
Priority to TW105106573A priority patent/TW201711170A/zh
Priority to CN201610227298.9A priority patent/CN106531880A/zh
Priority to US15/233,650 priority patent/US20170077390A1/en
Publication of JP2017059583A publication Critical patent/JP2017059583A/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/295—Organic, e.g. plastic containing a filler
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details
    • H10N50/85—Magnetic active materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/82—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by variation of the magnetic field applied to the device
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K9/00—Screening of apparatus or components against electric or magnetic fields
    • H05K9/0073—Shielding materials
    • H05K9/0075—Magnetic shielding materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/80—Constructional details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29355—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29357—Cobalt [Co] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/2936—Iron [Fe] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45139—Silver (Ag) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06506—Wire or wire-like electrical connections between devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0651—Wire or wire-like electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06527—Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
    • H01L2225/06537—Electromagnetic shielding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H01L2225/06562—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking at least one device in the stack being rotated or offset
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1434—Memory
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

【課題】工程数の増加を抑制しつつ、半導体チップに対する優れた磁気シールド効果を得ることを可能にした半導体装置を提供する。
【解決手段】基板と、基板上に実装された磁気抵抗メモリチップと、磁気抵抗メモリチップを封止する封止樹脂層と、を具備する。磁気抵抗メモリチップは、磁気抵抗メモリ素子層と、磁気抵抗メモリ素子層の少なくとも一部を覆うように設けられ、磁性体粉末を含有する有機樹脂層と、を備える。
【選択図】図１

Description

本発明の実施形態は、半導体装置に関する。
現在、種々の半導体メモリが開発、実用化されている。半導体メモリの中には、磁気抵抗メモリ（Ｍａｇｎｅｔｏｒｅｓｉｓｔｉｖｅ Ｒａｎｄｏｍ Ａｃｃｅｓｓ Ｍｅｍｏｒｙ：ＭＲＡＭ）のような磁気を利用した半導体メモリも実用化されている。磁気抵抗メモリは、磁気を利用した記憶素子であるため、記憶素子に保持された情報が外部磁場の影響により失われるおそれがある。従来の磁気抵抗素子を有する半導体チップでは、外部磁場の影響を抑制するために、例えば半導体チップ上に磁気シールド板を配置したパッケージ構造を適用することが検討されている。
磁気シールド板を配置したパッケージ構造は、基板上に半導体チップを積層する工程に加え、磁気シールド板を積層する工程が必要である。よって、工程数が増加する。また、複数の半導体チップを積層する場合、半導体チップに対する磁気シールド効果は、半導体チップと磁気シールド板との間隔が広いほど低い。
米国特許出願公開第２００４／０２３２５３６号明細書
本発明が解決しようとする課題は、工程数の増加を抑制しつつ、半導体チップに対する優れた磁気シールド効果を得ることを可能にした半導体装置を提供することである。
実施形態の半導体装置は、基板と、基板上に実装された磁気抵抗メモリチップと、磁気抵抗メモリチップを封止する封止樹脂層と、を具備する。磁気抵抗メモリチップは、磁気抵抗メモリ素子層と、磁気抵抗メモリ素子層の少なくとも一部を覆うように設けられ、磁性体粉末を含有する有機樹脂層と、を備える。
半導体装置の構造例を示す断面模式図である。 磁気抵抗メモリチップの構造例を示す断面模式図である。 チップ積層体の一部の構造例を示す断面模式図である。 磁気抵抗メモリチップの他の構造例を示す断面模式図である。 チップ積層体の一部の構造例を示す断面模式図である。
以下、実施形態について、図面を参照して説明する。なお、図面は模式的なものであり、例えば厚さと平面寸法との関係、各層の厚さの比率等は現実のものとは異なる場合がある。また、実施形態において、実質的に同一の構成要素には同一の符号を付し説明を省略する。
図１は半導体装置の構造例を示す断面模式図である。図１に示す半導体装置１０は、基板１と、チップ積層体２と、ボンディングワイヤ３と、封止樹脂層４と、導電体５と、を具備する。
基板１は、面１ａと、面１ａの反対側の面１ｂと、を有する。図１では、面１ａを上側とし、面１ｂを下側として半導体装置１０を図示している。基板１としては、例えば絶縁樹脂基板の表面や内部に配線網を設けた配線基板が挙げられる。配線基板としては、例えばガラス−エポキシ樹脂やＢＴ樹脂（ビスマレイミド・トリアジン樹脂）等を使用したプリント配線板（多層プリント基板等）が挙げられる。
チップ積層体２は、基板１上に搭載された磁気抵抗メモリチップ２０を有する。磁気抵抗メモリチップ２０は、例えばＭＲＡＭを有するメモリチップである。図１に示す磁気抵抗メモリチップ２０は４段構造であるが、磁気抵抗メモリチップ２０の数は、特に限定されない。
ボンディングワイヤ３は、基板１に設けられ、かつ面１ａに露出する電極１１と磁気抵抗メモリチップ２０との間を電気的に接続する。電極１１は、基板１の配線網に電気的に接続されている。さらに、ボンディングワイヤ３は、複数の磁気抵抗メモリチップ２０を順に電気的に接続する。ボンディングワイヤ３は、例えば金、銀、銅、またはアルミニウム等を含む。
封止樹脂層４は、磁気抵抗メモリチップ２０およびボンディングワイヤ３を封止する。封止樹脂層４は、無機充填材（例えばＳｉＯ２）を含有する。封止樹脂層４は、例えば無機充填材と有機樹脂等とを含む封止樹脂を用いてトランスファモールド法、コンプレッションモールド法、インジェクションモールド法等のモールド法により形成される。
導電体５は、基板１に設けられ、かつ面１ｂに露出する接続パッドに電気的に接続されている。導電体５は、外部接続端子としての機能を有する。外部接続端子を介して例えば信号および電源電圧等が磁気抵抗メモリチップ２０に供給される。導電体５は、例えば金、銅、またははんだ等を含む。はんだとしては、例えば錫−銀系、錫−銀−銅系の鉛フリーはんだ等が挙げられる。導電体５は、複数の金属材料の積層を有していてもよい。図１に示す半導体装置１０は、導電性ボールを有する導電体５を具備しているが、バンプを有する導電体５を具備してもよい。
次に、磁気抵抗メモリチップ２０の構造例について図２を参照して説明する。図２は、磁気抵抗メモリチップ２０の構造例を示す断面模式図である。図２に示す磁気抵抗メモリチップ２０は、磁気抵抗メモリ素子層２１と、電極２２と、絶縁層２３と、有機樹脂層２４と、有機接着層２５と、を備える。
磁気抵抗メモリ素子層２１は、例えば磁気抵抗メモリ素子を有するメモリセルと、データの書き込みおよび読み出しを行う磁気抵抗メモリ素子を選択するデコーダと、デコーダの動作を制御する制御回路と、デコーダおよび制御回路に電力を供給する電源回路とを含む周辺回路と、を有する。磁気抵抗メモリ素子層２１の厚さは、例えば３０μｍ以上８０μｍ以下である。
磁気抵抗メモリ素子層２１は、例えば半導体素子層２１ａと、半導体素子層２１ａ上に設けられ、ＭＴＪ（Ｍａｇｎｅｔｉｃ Ｔｕｎｎｅｌ Ｊｕｎｃｔｉｏｎ：ＭＴＪ）素子等の磁気抵抗素子を有する磁気抵抗素子層２１ｂと、を有する。半導体素子層２１ａは、例えばシリコン基板等の半導体基板上に絶縁層や導電層を成膜することにより形成される。
さらに、半導体素子層２１ａは、例えば第１のトランジスタを含むメモリセル部と、第２のトランジスタを含む半導体素子を有する周辺回路部とを備える。第１のトランジスタは、磁気抵抗素子に対する電荷の供給を制御する。第２のトランジスタは、周辺回路を構成する素子の一つである。磁気抵抗素子は、例えば半導体素子層２１ａのメモリセル部上に設けられ、配線等を介して第１のトランジスタの入出力端子に電気的に接続されている。
電極２２は、磁気抵抗素子層２１ｂ上に設けられている。電極２２は、例えば半導体素子層２１ａの周辺回路を構成する半導体素子に電気的に接続されている。電極２２は、電極パッドとしての機能を有する。電極２２は、例えば銅、銀、金、またはアルミニウム等を含む。電極２２は、例えばスパッタ法、電解めっき法または無電解めっき法等により上記材料を含むめっき膜を成膜することにより形成されてもよい。
絶縁層２３は、磁気抵抗メモリ素子層２１上および電極２２の一部の上に設けられている。絶縁層２３は、例えば酸化シリコンまたは窒化シリコンを含む。絶縁層２３は、例えばパッシベーション層としての機能を有する。
有機樹脂層２４は、磁気抵抗メモリ素子層２１の少なくとも一部を覆うように設けられる。図２に示す有機樹脂層２４は、絶縁層２３を挟んで磁気抵抗素子層２１ｂに重畳するように設けられている。有機樹脂層２４は、パッシベーション層としての機能を有する。有機樹脂層２４は、例えばポリイミドを含む。
さらに、有機樹脂層２４は、磁性体粉末を含有する。磁性体粉末を含有する有機樹脂層２４は、磁気シールド層としての機能を有する。有機樹脂層２４は、必ずしも設けられなくてもよい。
有機樹脂層２４は、例えばスピンコート法により磁性粉末を含む液状有機樹脂を塗布することにより形成される。有機樹脂層２４の厚さは、例えば２μｍ以上５μｍ以下である。
絶縁層２３および有機樹脂層２４は、電極２２の少なくとも一部を露出させる開口部２６を有する。有機樹脂層２４は、例えば露光現像されたフォトレジストを用いて、選択的にエッチング加工が可能である。
有機接着層２５は、磁気抵抗メモリ素子層２１の少なくとも一部を覆うように設けられる。図２に示す有機接着層２５は、磁気抵抗メモリ素子層２１における磁気抵抗素子層２１ｂの形成面の反対側の面に接して設けられている。有機接着層２５としては、例えばダイアタッチフィルム（Ｄｉｅ Ａｔｔａｃｈ Ｆｉｌｍ：ＤＡＦ）等が挙げられる。ＤＡＦとしては、例えばエポキシ樹脂、ポリイミド樹脂、アクリル樹脂等を主成分とする粘着シートが挙げられる。
さらに、有機接着層２５は、磁性体粉末を含有する。磁性体粉末を含有する有機接着層２５は、磁気シールド層としての機能を有する。有機樹脂層２４および有機接着層２５の少なくとも一つが磁性体粉末を含有すればよい。
磁性体粉末としては、例えば鉄（Ｆｅ）、ニッケル（Ｎｉ）、コバルト（Ｃｏ）等の軟磁性金属や、上記軟磁性金属の少なくとも一つを含む軟磁性合金等が用いられる。軟磁性合金等としては、珪素鋼（Ｆｅ−Ｓｉ）、炭素鋼（Ｆｅ−Ｃ）、パーマロイ（Ｆｅ−Ｎｉ）、センダスト（Ｆｅ−Ｓｉ−Ａｌ）、パーメンジュール（Ｆｅ−Ｃｏ）、フェライトステンレス等が挙げられる。有機樹脂層２４および有機接着層２５は、互いに同一の磁性体粉末を含有してもよい。有機樹脂層２４および有機接着層２５は、互いに異なる磁性体粉末を含有してもよい。
有機樹脂層２４や有機接着層２５は、封止樹脂層４よりも磁性体粉末を含有させやすい。よって、例えば有機樹脂層２４または有機接着層２５に対する磁性体粉末の単位体積あたりの含有量を封止樹脂層４よりも多くすることができる。
磁気抵抗メモリチップ２０は、電極２２を露出させるように多段に積層されている。多段に積層された磁気抵抗メモリチップ２０は、有機接着層２５を介して順に接着されている。多段に積層された磁気抵抗メモリチップ２０の電極２２は、ボンディングワイヤ３を介して順に電気的に接続されている。また、最下段の磁気抵抗メモリチップ２０の電極２２は、ボンディングワイヤ３を介して基板１に設けられた電極１１に電気的に接続されている。
ダイアタッチフィルム等の有機接着層２５により多段に積層された複数の磁気抵抗メモリチップ２０を接着する場合、複数の磁気抵抗メモリチップ２０を積層した後に熱処理を行う。これにより、有機接着層２５を一時的に軟化させて磁気抵抗メモリチップ２０同士または磁気抵抗メモリチップ２０と基板１とを接着する。このとき、図３に示すように、有機接着層２５が磁気抵抗メモリ素子層２１の側面を伝って流動する場合がある。図３は、磁気抵抗メモリチップの接着状態を説明するための断面模式図である。
図３に示す有機接着層２５は、磁気抵抗メモリ素子層２１の側面を覆い、かつ有機樹脂層２４に接する。さらに、多段に積層された磁気抵抗メモリチップ２０の有機接着層２５は、磁気抵抗メモリ素子層２１の側面を覆うように互いに接する。磁気抵抗メモリ素子層２１の側面を覆うように有機接着層２５を設けることにより、有機樹脂層２４と有機接着層２５との接着強度が高まる。そして、有機樹脂層２４と有機接着層２５とが接する場合、有機樹脂層２４に入射した磁力は有機接着層２５へと、有機接着層２５へ入射した磁力は有機樹脂層２４へと伝わることが容易になるので、垂直方向からの磁界の影響を抑制する効果が高まる。また、有機接着層２５に磁性体粉末を含有することにより、水平方向からの磁界の影響を抑制することができるため、磁気抵抗メモリチップ２０の磁気シールド効果をさらに高めることができる。
本実施形態の半導体装置は、磁気抵抗メモリチップの少なくとも一部を覆うように設けられ、磁性体粉末を含有する有機樹脂層および有機接着層の少なくとも一方の層を具備する。上記磁性体粉末を含有する有機樹脂層および有機接着層の少なくとも一方の層は、磁気抵抗メモリチップ毎に設けられる。このように、磁性体粉末を含有する有機樹脂層および有機接着層の少なくとも一方の層を磁気抵抗メモリチップに極めて近い位置に配置することができるため、磁気シールド効果を高めることができる。また、有機樹脂層または有機接着層に磁性体粉末を含有させて磁気シールド層を形成することができる。よって、磁気抵抗メモリチップ上に別途磁気シールド板を積層する場合と比較して工程数の増加を抑制することができる。
磁気抵抗メモリチップ２０の構造は、図２に示す構造に限定されない。図４は、磁気抵抗メモリチップ２０の他の構造を示す断面模式図である。図４に示す磁気抵抗メモリチップ２０は、図２に示す磁気抵抗メモリチップ２０と比較して磁気抵抗メモリ素子層２１と有機樹脂層２４との間に設けられた有機保護層２７を具備する構成が少なくとも異なる。図２に示す構成要素と同じ構成要素については、図２に示す説明を適宜援用する。
有機保護層２７は、絶縁層２３上に設けられる。有機樹脂層２４は、有機保護層２７上に設けられる。有機保護層２７は、磁気抵抗メモリ素子層２１を保護する機能を有する。有機保護層２７は、例えばポリイミド等を含む。
有機保護層２７を設けることにより、磁気抵抗メモリ素子層２１が保護されるため、有機樹脂層２４の磁性体粉末の含有量を多くすることができる。よって、磁性シールド効果をさらに高めることができる。
図５は、チップ積層体２の一部の構造例を示す断面模式図である。ボンディングワイヤ３は、便宜のため図示していない。図５に示す磁気抵抗メモリチップ２０は、図２に示す磁気抵抗メモリチップ２０と比較して、有機樹脂層２４を具備せず、有機保護層２７を具備する構成が少なくとも異なる。すなわち、図５に示す磁気抵抗メモリチップ２０は、磁気抵抗メモリ素子層２１と、磁気抵抗メモリ素子層２１上に設けられた電極２２と、磁気抵抗メモリ素子層２１上および電極２２上に設けられた絶縁層２３と、絶縁層２３上に設けられた有機保護層２７と、電極２２の一部を露出させる開口部を有する磁気抵抗メモリ素子層２１の少なくとも一部を覆うように設けられ、磁性体粉末を含有する有機接着層２５と、を備える。
磁気抵抗メモリチップ２０は、電極２２を露出させるように多段に積層されている。多段に積層された磁気抵抗メモリチップ２０は、有機接着層２５を介して順に接着されている。このとき、チップ積層体２は、最上層に有機接着層２５を備えていなくてもよい。多段に積層された磁気抵抗メモリチップ２０の電極２２は、順に電気的に接続されている。また、最下段の磁気抵抗メモリチップ２０の電極２２は、基板１に設けられた電極１１に電気的に接続されている。
磁気抵抗メモリ素子層２１は、有機接着層２５に重畳する領域２１１と、有機接着層２５に重畳しない領域２１２と、を有する。磁性体粉末を含有する有機接着層２５に重畳していない領域２１２の磁気シールド効果は、領域２１１よりも低くなる。そこで、周辺回路よりも外部磁界の影響を受けやすい磁気抵抗メモリ素子を領域２１１に重畳させて配置する、すなわち、領域２１１に重畳するようにメモリセルが設けられることにより、磁気抵抗メモリ素子に書き込まれたデータの消失を抑制することができる。
なお、本発明のいくつかの実施形態を説明したが、これらの実施形態は例として提示したものであり、発明の範囲を限定することは意図していない。これら新規な実施形態は、その他の様々な形態で実施し得るものであり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。これら実施形態やその変形は、発明の範囲や要旨に含まれると共に、特許請求の範囲に記載された発明とその均等の範囲に含まれる。
１…基板、１ａ…面、１ｂ…面、２…チップ積層体、３…ボンディングワイヤ、４…封止樹脂層、５…導電体、１０…半導体装置、１１…電極、２０…磁気抵抗メモリチップ、２１…磁気抵抗メモリ素子層、２１ａ…半導体素子層、２１ｂ…磁気抵抗素子層、２２…電極、２３…絶縁層、２４…有機樹脂層、２５…有機接着層、２６…開口部、２７…有機保護層。

Claims (5)

  1. 基板と、
    前記基板上に実装された磁気抵抗メモリチップと、
    前記磁気抵抗メモリチップを封止する封止樹脂層と、を具備し、
    前記磁気抵抗メモリチップは、
    磁気抵抗メモリ素子層と、
    前記磁気抵抗メモリ素子層の少なくとも一部を覆うように設けられ、磁性体粉末を含有する有機樹脂層と、を備える、半導体装置。
  2. 前記磁気抵抗メモリチップは、前記磁気抵抗メモリ素子層と前記有機樹脂層との間に設けられた有機保護層をさらに備える、請求項１に記載の半導体装置。
  3. 基板と、
    前記基板上に有機接着層を介して接着された磁気抵抗メモリチップと、
    前記磁気抵抗メモリチップを封止する封止樹脂層と、を具備し、
    前記有機接着層は、磁性体粉末を含有する、半導体装置。
  4. 前記磁気抵抗メモリチップは、
    磁気抵抗メモリ素子層と、
    前記磁気抵抗メモリ素子層の少なくとも一部を覆うように設けられ、磁性体粉末を含有する有機樹脂層と、を備える、請求項３に記載の半導体装置。
  5. 前記磁気抵抗メモリチップは、電極を有し、前記電極を露出させるように多段に積層され、
    多段に積層された前記磁気抵抗メモリチップは、前記有機接着層を介して順に接着され、
    多段に積層された前記磁気抵抗メモリチップの前記電極は、順に電気的に接続されている、請求項３または請求項４に記載の半導体装置。
JP2015180895A 2015-09-14 2015-09-14 半導体装置 Pending JP2017059583A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2015180895A JP2017059583A (ja) 2015-09-14 2015-09-14 半導体装置
TW105106573A TW201711170A (zh) 2015-09-14 2016-03-03 半導體裝置
CN201610227298.9A CN106531880A (zh) 2015-09-14 2016-04-13 半导体装置
US15/233,650 US20170077390A1 (en) 2015-09-14 2016-08-10 Semiconductor device with a magnetic shield

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015180895A JP2017059583A (ja) 2015-09-14 2015-09-14 半導体装置

Publications (1)

Publication Number Publication Date
JP2017059583A true JP2017059583A (ja) 2017-03-23

Family

ID=58257743

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015180895A Pending JP2017059583A (ja) 2015-09-14 2015-09-14 半導体装置

Country Status (4)

Country Link
US (1) US20170077390A1 (ja)
JP (1) JP2017059583A (ja)
CN (1) CN106531880A (ja)
TW (1) TW201711170A (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019153619A (ja) 2018-02-28 2019-09-12 東芝メモリ株式会社 半導体装置
CN110224059B (zh) * 2018-03-02 2022-10-28 联华电子股份有限公司 半导体装置及其形成方法
US11139341B2 (en) * 2018-06-18 2021-10-05 Taiwan Semiconductor Manufacturing Company, Ltd. Protection of MRAM from external magnetic field using magnetic-field-shielding structure
US11088083B2 (en) 2018-06-29 2021-08-10 Taiwan Semiconductor Manufacturing Company, Ltd. DC and AC magnetic field protection for MRAM device using magnetic-field-shielding structure
JP7385483B2 (ja) * 2020-01-27 2023-11-22 キオクシア株式会社 半導体装置およびその製造方法

Also Published As

Publication number Publication date
TW201711170A (zh) 2017-03-16
US20170077390A1 (en) 2017-03-16
CN106531880A (zh) 2017-03-22

Similar Documents

Publication Publication Date Title
JP2017059583A (ja) 半導体装置
US7829980B2 (en) Magnetoresistive device and method of packaging same
US9070692B2 (en) Shields for magnetic memory chip packages
US9099459B2 (en) Semiconductor device and manufacturing method of the same
KR100656587B1 (ko) 금속 포스트를 매개로 연결된 적층 기판을 이용한 적층패키지
JP6280014B2 (ja) 半導体装置及びその製造方法
JP2017204643A (ja) 半導体パッケージおよびその製造方法
CN102790042B (zh) 半导体芯片堆叠构造
CN106711118B (zh) 电子封装件及其制法
US10582617B2 (en) Method of fabricating a circuit module
JP5646415B2 (ja) 半導体パッケージ
JP5611315B2 (ja) パッケージキャリア
CN106409785A (zh) 一种薄型阵列塑料封装件及其生产方法
JP4829853B2 (ja) 半導体ｐｏｐ装置
JP2007214238A (ja) 半導体装置およびその製造方法
JP2008187076A (ja) 回路装置およびその製造方法
CN106206517B (zh) 半导体装置及半导体装置的制造方法
CN112652445B (zh) 电感器部件
JP3867796B2 (ja) 半導体装置及びその製造方法、回路基板並びに電子機器
US9318354B2 (en) Semiconductor package and fabrication method thereof
JP4929905B2 (ja) 半導体モジュール
CN206282839U (zh) 一种薄型阵列塑料封装件
JP2006032871A (ja) 半導体装置
JP2009021499A (ja) 積層型半導体装置
TWI543317B (zh) Semiconductor device

Legal Events

Date Code Title Description
A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20170609

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A712

Effective date: 20180903