CN1107958C - 有能将测试方式可靠复位的电路的同步型半导体存储装置 - Google Patents

有能将测试方式可靠复位的电路的同步型半导体存储装置 Download PDF

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Publication number
CN1107958C
CN1107958C CN98115697A CN98115697A CN1107958C CN 1107958 C CN1107958 C CN 1107958C CN 98115697 A CN98115697 A CN 98115697A CN 98115697 A CN98115697 A CN 98115697A CN 1107958 C CN1107958 C CN 1107958C
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China
Prior art keywords
signal
test mode
mentioned
command
detection
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Expired - Fee Related
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CN98115697A
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English (en)
Chinese (zh)
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CN1217545A (zh
Inventor
樱井干夫
谷田进
中野全也
月川靖彦
吹上贵彦
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Publication of CN1217545A publication Critical patent/CN1217545A/zh
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31701—Arrangements for setting the Unit Under Test [UUT] in a test mode

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
CN98115697A 1997-11-14 1998-07-10 有能将测试方式可靠复位的电路的同步型半导体存储装置 Expired - Fee Related CN1107958C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP313739/1997 1997-11-14
JP31373997A JP4141520B2 (ja) 1997-11-14 1997-11-14 同期型半導体記憶装置
JP313739/97 1997-11-14

Publications (2)

Publication Number Publication Date
CN1217545A CN1217545A (zh) 1999-05-26
CN1107958C true CN1107958C (zh) 2003-05-07

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Application Number Title Priority Date Filing Date
CN98115697A Expired - Fee Related CN1107958C (zh) 1997-11-14 1998-07-10 有能将测试方式可靠复位的电路的同步型半导体存储装置

Country Status (5)

Country Link
US (1) US5905690A (enExample)
JP (1) JP4141520B2 (enExample)
KR (1) KR100282974B1 (enExample)
CN (1) CN1107958C (enExample)
TW (1) TW392167B (enExample)

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KR100557948B1 (ko) 2003-06-20 2006-03-10 주식회사 하이닉스반도체 메모리 장치의 테스트 방법
JP4213605B2 (ja) * 2004-02-26 2009-01-21 東芝エルエスアイシステムサポート株式会社 動作モード設定回路
US7332928B2 (en) * 2004-03-05 2008-02-19 Finisar Corporation Use of a third state applied to a digital input terminal of a circuit to initiate non-standard operational modes of the circuit
KR100625293B1 (ko) * 2004-06-30 2006-09-20 주식회사 하이닉스반도체 높은 신뢰성을 갖는 반도체메모리소자 및 그를 위한구동방법
DE102004051345B9 (de) * 2004-10-21 2014-01-02 Qimonda Ag Halbleiter-Bauelement, Verfahren zum Ein- und/oder Ausgeben von Testdaten, sowie Speichermodul
JP4620504B2 (ja) 2005-03-10 2011-01-26 富士通セミコンダクター株式会社 半導体メモリおよびシステム装置
KR100724626B1 (ko) * 2005-08-29 2007-06-04 주식회사 하이닉스반도체 테스트 모드 제어 회로
JP4669518B2 (ja) * 2005-09-21 2011-04-13 ルネサスエレクトロニクス株式会社 半導体装置
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JP2007200504A (ja) 2006-01-30 2007-08-09 Fujitsu Ltd 半導体メモリ、メモリコントローラ及び半導体メモリの制御方法
KR100695435B1 (ko) 2006-04-13 2007-03-16 주식회사 하이닉스반도체 반도체 메모리 소자
KR100723889B1 (ko) 2006-06-30 2007-05-31 주식회사 하이닉스반도체 직렬 입/출력 인터페이스를 가진 멀티 포트 메모리 소자
KR100924579B1 (ko) * 2007-06-21 2009-11-02 삼성전자주식회사 리던던시 메모리 셀 억세스 회로, 이를 포함하는 반도체메모리 장치, 및 반도체 메모리 장치의 테스트 방법
JP2009087526A (ja) * 2007-09-28 2009-04-23 Hynix Semiconductor Inc 半導体メモリ装置およびその駆動方法
KR100942940B1 (ko) * 2007-09-28 2010-02-22 주식회사 하이닉스반도체 반도체 메모리 장치 및 그 구동방법
US7626884B2 (en) * 2007-10-30 2009-12-01 Intel Corporation Optimizing mode register set commands
JP5096131B2 (ja) * 2007-12-27 2012-12-12 ルネサスエレクトロニクス株式会社 半導体記憶装置
KR100951666B1 (ko) * 2008-08-08 2010-04-07 주식회사 하이닉스반도체 테스트 모드를 제어하는 반도체 집적 회로
KR101187642B1 (ko) * 2011-05-02 2012-10-08 에스케이하이닉스 주식회사 집적 회로의 모니터링 장치
KR101903520B1 (ko) * 2012-01-06 2018-10-04 에스케이하이닉스 주식회사 반도체 장치
US8830780B2 (en) * 2013-01-15 2014-09-09 Qualcomm Incorporated System and method of performing power on reset for memory array circuits
US9891277B2 (en) * 2014-09-30 2018-02-13 Nxp Usa, Inc. Secure low voltage testing
KR20160123843A (ko) * 2015-04-17 2016-10-26 에스케이하이닉스 주식회사 반도체 장치
KR102375054B1 (ko) * 2015-12-11 2022-03-17 에스케이하이닉스 주식회사 테스트 모드 설정회로 및 이를 포함하는 반도체 장치
JP2022044114A (ja) * 2020-09-07 2022-03-17 キオクシア株式会社 半導体集積回路およびその試験方法

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JP3421760B2 (ja) * 1994-10-11 2003-06-30 三菱電機株式会社 Ｓｄｒａｍのパワーオンリセット信号発生回路
US5572470A (en) * 1995-05-10 1996-11-05 Sgs-Thomson Microelectronics, Inc. Apparatus and method for mapping a redundant memory column to a defective memory column

Also Published As

Publication number Publication date
CN1217545A (zh) 1999-05-26
KR19990044766A (ko) 1999-06-25
US5905690A (en) 1999-05-18
KR100282974B1 (ko) 2001-03-02
JPH11149771A (ja) 1999-06-02
TW392167B (en) 2000-06-01
JP4141520B2 (ja) 2008-08-27

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Granted publication date: 20030507