CN101356642B - 印刷线路板及其印刷线路板的制造方法 - Google Patents

印刷线路板及其印刷线路板的制造方法 Download PDF

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CN101356642B
CN101356642B CN2007800011165A CN200780001116A CN101356642B CN 101356642 B CN101356642 B CN 101356642B CN 2007800011165 A CN2007800011165 A CN 2007800011165A CN 200780001116 A CN200780001116 A CN 200780001116A CN 101356642 B CN101356642 B CN 101356642B
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diameter opening
solder
mentioned
opening
diameter
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CN101356642A (zh
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丹野克彦
川村洋一郎
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Ibiden Co Ltd
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Ibiden Co Ltd
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    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
    • Y10T29/49167—Manufacturing circuit on or in base by forming conductive walled aperture in base with deforming of conductive path

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  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101888747B (zh) * 2006-01-27 2012-09-05 揖斐电株式会社 印刷线路板的制造方法

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101171895B (zh) * 2005-06-30 2010-06-23 揖斐电株式会社 印刷线路板
JP5154271B2 (ja) * 2008-03-17 2013-02-27 日本特殊陶業株式会社 はんだバンプを有する配線基板及びその製造方法
US8587129B2 (en) * 2009-07-31 2013-11-19 Stats Chippac Ltd. Integrated circuit packaging system with through silicon via base and method of manufacture thereof
US8410376B2 (en) * 2009-08-28 2013-04-02 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
US20110048775A1 (en) * 2009-08-31 2011-03-03 Ibiden Co., Ltd. Printed wiring board and method for manufacturing the same
JP5428667B2 (ja) 2009-09-07 2014-02-26 日立化成株式会社 半導体チップ搭載用基板の製造方法
US7867821B1 (en) * 2009-09-18 2011-01-11 Stats Chippac Ltd. Integrated circuit package system with through semiconductor vias and method of manufacture thereof
KR101055473B1 (ko) * 2009-12-15 2011-08-08 삼성전기주식회사 기판 제조용 캐리어 부재 및 이를 이용한 기판의 제조방법
US8604600B2 (en) * 2011-12-30 2013-12-10 Deca Technologies Inc. Fully molded fan-out
KR20110124993A (ko) * 2010-05-12 2011-11-18 삼성전자주식회사 반도체 칩 및 이를 포함하는 반도체 패키지 및 반도체 칩의 제조 방법
US9293405B2 (en) * 2011-03-22 2016-03-22 Renesas Electronics Corporation Semiconductor device
US9236278B2 (en) * 2011-09-23 2016-01-12 Stats Chippac Ltd. Integrated circuit packaging system with a substrate embedded dummy-die paddle and method of manufacture thereof
US8546925B2 (en) * 2011-09-28 2013-10-01 Texas Instruments Incorporated Synchronous buck converter having coplanar array of contact bumps of equal volume
US9368439B2 (en) * 2012-11-05 2016-06-14 Nvidia Corporation Substrate build up layer to achieve both finer design rule and better package coplanarity
US8969191B2 (en) * 2013-07-16 2015-03-03 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for forming package structure
KR102192356B1 (ko) 2013-07-29 2020-12-18 삼성전자주식회사 반도체 패키지
JP6320066B2 (ja) * 2014-02-13 2018-05-09 イビデン株式会社 ボール搭載用マスクおよびボール搭載装置
JP2015231003A (ja) * 2014-06-06 2015-12-21 イビデン株式会社 回路基板および回路基板の製造方法
CN105530768B (zh) * 2014-09-28 2019-02-05 深南电路有限公司 一种电路板的制作方法及电路板
KR102632351B1 (ko) * 2016-02-05 2024-02-02 삼성전기주식회사 인쇄회로기판 및 이를 포함하는 패키지 기판
CN107318228B (zh) * 2017-08-29 2019-09-06 郑州云海信息技术有限公司 一种印制电路板的制造方法及其制造装置
TWI650048B (zh) * 2017-09-19 2019-02-01 Nan Ya Printed Circuit Board Corporation 印刷電路板結構及其形成方法
CN108235591B (zh) * 2018-01-08 2020-08-18 昆山首源电子科技有限公司 5g通讯高频信号板镀金蚀刻工艺
CN110534451A (zh) * 2018-05-25 2019-12-03 唐虞企业股份有限公司 一种导电端子置件设备及其导电端子置件方法
CN113710377B (zh) * 2019-04-30 2024-01-09 迪睿合株式会社 滑动处理物相对于滑动对象物的表面的供给或排除方法
JP7257273B2 (ja) * 2019-06-26 2023-04-13 イビデン株式会社 プリント配線板およびその製造方法
CN113709972A (zh) * 2021-09-27 2021-11-26 合肥移瑞通信技术有限公司 一种电路板及其制造方法、封装件

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1342038A (zh) * 2000-09-04 2002-03-27 华泰电子股份有限公司 积体电路基板柱状凸块成型方法

Family Cites Families (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2974436B2 (ja) 1991-02-26 1999-11-10 シチズン時計株式会社 ハンダバンプの形成方法
JP3152834B2 (ja) * 1993-06-24 2001-04-03 株式会社東芝 電子回路装置
JP3226703B2 (ja) * 1994-03-18 2001-11-05 株式会社日立製作所 半導体装置及びその製法
JP3138159B2 (ja) * 1994-11-22 2001-02-26 シャープ株式会社 半導体装置、半導体装置実装体、及び半導体装置の交換方法
EP0774888B1 (en) * 1995-11-16 2003-03-19 Matsushita Electric Industrial Co., Ltd Printed wiring board and assembly of the same
JP2842361B2 (ja) * 1996-02-28 1999-01-06 日本電気株式会社 半導体装置
US5660321A (en) * 1996-03-29 1997-08-26 Intel Corporation Method for controlling solder bump height and volume for substrates containing both pad-on and pad-off via contacts
JPH1013007A (ja) * 1996-03-29 1998-01-16 Ngk Spark Plug Co Ltd 半田バンプを有する配線基板及びその製造方法及び平坦化治具
JP3401391B2 (ja) * 1996-04-16 2003-04-28 日本特殊陶業株式会社 半田バンプを有する基板の製造方法
JP2861965B2 (ja) * 1996-09-20 1999-02-24 日本電気株式会社 突起電極の形成方法
EP0844809B1 (en) * 1996-11-20 2011-08-17 Ibiden Co, Ltd. Solder resist composition and printed circuit boards
TW392315B (en) * 1996-12-03 2000-06-01 Nippon Electric Co Boards mounting with chips, mounting structure of chips, and manufacturing method for boards mounting with chips
KR100244580B1 (ko) * 1997-06-24 2000-02-15 윤종용 금속 범프를 갖는 회로 기판의 제조 방법 및 그를 이용한 반도체 칩 패키지의 제조 방법
US6028011A (en) * 1997-10-13 2000-02-22 Matsushita Electric Industrial Co., Ltd. Method of forming electric pad of semiconductor device and method of forming solder bump
JPH11145176A (ja) * 1997-11-11 1999-05-28 Fujitsu Ltd ハンダバンプの形成方法及び予備ハンダの形成方法
JPH11204687A (ja) * 1998-01-19 1999-07-30 Juki Corp バンプ形成方法及びバンプ形成装置
US6137164A (en) * 1998-03-16 2000-10-24 Texas Instruments Incorporated Thin stacked integrated circuit device
US6100112A (en) * 1998-05-28 2000-08-08 The Furukawa Electric Co., Ltd. Method of manufacturing a tape carrier with bump
US6461953B1 (en) * 1998-08-10 2002-10-08 Fujitsu Limited Solder bump forming method, electronic component mounting method, and electronic component mounting structure
US6268114B1 (en) * 1998-09-18 2001-07-31 Taiwan Semiconductor Manufacturing Company, Ltd Method for forming fine-pitched solder bumps
US6746896B1 (en) * 1999-08-28 2004-06-08 Georgia Tech Research Corp. Process and material for low-cost flip-chip solder interconnect structures
JP2001102738A (ja) * 1999-09-30 2001-04-13 Matsushita Electric Ind Co Ltd 電子部品実装半田付け方法
JP2001203318A (ja) * 1999-12-17 2001-07-27 Texas Instr Inc <Ti> 複数のフリップチップを備えた半導体アセンブリ
JP2001267731A (ja) 2000-01-13 2001-09-28 Hitachi Ltd バンプ付き電子部品の製造方法および電子部品の製造方法
JP2001210749A (ja) * 2000-01-26 2001-08-03 Kyocera Corp バンプ電極付き配線基板およびその製造方法
JP2001319992A (ja) * 2000-02-28 2001-11-16 Shinko Electric Ind Co Ltd 配線基板、半導体装置及びそれらの製造方法
JP2002043467A (ja) * 2000-07-31 2002-02-08 Hitachi Chem Co Ltd 半導体パッケージ用基板とその製造方法およびその基板を用いた半導体パッケージ並びに半導体パッケージの製造方法
JP2002050716A (ja) * 2000-08-02 2002-02-15 Dainippon Printing Co Ltd 半導体装置及びその作製方法
US6459150B1 (en) * 2000-08-17 2002-10-01 Industrial Technology Research Institute Electronic substrate having an aperture position through a substrate, conductive pads, and an insulating layer
JP4130526B2 (ja) * 2000-11-10 2008-08-06 株式会社日立製作所 バンプ形成方法およびその装置
US6596618B1 (en) * 2000-12-08 2003-07-22 Altera Corporation Increased solder-bump height for improved flip-chip bonding and reliability
US6910812B2 (en) * 2001-05-15 2005-06-28 Peregrine Semiconductor Corporation Small-scale optoelectronic package
JP2003188508A (ja) * 2001-12-18 2003-07-04 Toshiba Corp プリント配線板、面実装形回路部品および回路モジュール
US6940176B2 (en) * 2002-05-21 2005-09-06 United Microelectronics Corp. Solder pads for improving reliability of a package
JP2004055628A (ja) * 2002-07-17 2004-02-19 Dainippon Printing Co Ltd ウエハレベルの半導体装置及びその作製方法
JP4181510B2 (ja) * 2003-02-28 2008-11-19 日本特殊陶業株式会社 樹脂製配線基板
JP4094982B2 (ja) * 2003-04-15 2008-06-04 ハリマ化成株式会社 はんだ析出方法およびはんだバンプ形成方法
JP4269834B2 (ja) 2003-07-23 2009-05-27 トヨタ自動車株式会社 多段変速機
JP4536430B2 (ja) * 2004-06-10 2010-09-01 イビデン株式会社 フレックスリジッド配線板
CN1826844B (zh) * 2004-08-04 2012-01-11 揖斐电株式会社 焊球搭载方法及焊球搭载装置
US7405474B1 (en) * 2004-10-12 2008-07-29 Cypress Semiconductor Corporation Low cost thermally enhanced semiconductor package
US7215026B2 (en) * 2005-04-14 2007-05-08 Samsung Electonics Co., Ltd Semiconductor module and method of forming a semiconductor module
KR100702969B1 (ko) * 2005-04-19 2007-04-03 삼성전자주식회사 더미 솔더 볼을 갖는 ｂｇａ형 반도체 칩 패키지의 기판 실장 구조
CN101180727B (zh) 2005-05-23 2010-06-16 揖斐电株式会社 印刷线路板及其制造方法
JP2006344824A (ja) * 2005-06-09 2006-12-21 Nec Electronics Corp 半導体装置および半導体装置の製造方法
WO2007004657A1 (ja) 2005-06-30 2007-01-11 Ibiden Co., Ltd. プリント配線板
CN101171895B (zh) * 2005-06-30 2010-06-23 揖斐电株式会社 印刷线路板
US7566650B2 (en) * 2005-09-23 2009-07-28 Stats Chippac Ltd. Integrated circuit solder bumping system
DE102005055280B3 (de) * 2005-11-17 2007-04-12 Infineon Technologies Ag Verbindungselement zwischen Halbleiterchip und Schaltungsträger sowie Verfahren zur Herstellung und Verwendung des Verbindungselements
US20070145104A1 (en) * 2005-12-28 2007-06-28 Mengzhi Pang System and method for advanced solder bumping using a disposable mask
US20070155154A1 (en) * 2005-12-29 2007-07-05 Mengzhi Pang System and method for solder bumping using a disposable mask and a barrier layer
US7517788B2 (en) * 2005-12-29 2009-04-14 Intel Corporation System, apparatus, and method for advanced solder bumping
DE102006001767B4 (de) * 2006-01-12 2009-04-30 Infineon Technologies Ag Halbleitermodul mit Halbleiterchips und Verfahren zur Herstellung desselben
CN101356642B (zh) * 2006-01-27 2010-09-01 揖斐电株式会社 印刷线路板及其印刷线路板的制造方法
US7472473B2 (en) * 2006-04-26 2009-01-06 Ibiden Co., Ltd. Solder ball loading apparatus
US7823762B2 (en) * 2006-09-28 2010-11-02 Ibiden Co., Ltd. Manufacturing method and manufacturing apparatus of printed wiring board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1342038A (zh) * 2000-09-04 2002-03-27 华泰电子股份有限公司 积体电路基板柱状凸块成型方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101888747B (zh) * 2006-01-27 2012-09-05 揖斐电株式会社 印刷线路板的制造方法

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US9480170B2 (en) 2016-10-25
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CN101888747B (zh) 2012-09-05
US20120031659A1 (en) 2012-02-09
TWI330512B (enExample) 2010-09-11
CN101888747A (zh) 2010-11-17
TW200742515A (en) 2007-11-01
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JP4731574B2 (ja) 2011-07-27
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WO2007086551A1 (ja) 2007-08-02
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