CN100555608C - 半导体装置与半导体装置制造用基板及它们的制造方法 - Google Patents
半导体装置与半导体装置制造用基板及它们的制造方法 Download PDFInfo
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- CN100555608C CN100555608C CNB200580023599XA CN200580023599A CN100555608C CN 100555608 C CN100555608 C CN 100555608C CN B200580023599X A CNB200580023599X A CN B200580023599XA CN 200580023599 A CN200580023599 A CN 200580023599A CN 100555608 C CN100555608 C CN 100555608C
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Abstract
使用一种半导体装置制造用基板B,其中包括设有基材层(51)和粘接剂层(52)的粘接板(50)以及设在粘接剂层(52)上的多个独立的导电部(20)。将形成有电极(11)的半导体元件(10)固定在基板B上,用金属丝(30)将多个导电部(20)的上侧和半导体元件(20)的电极(11)电气连接。用密封树脂(40)将半导体元件(10)、金属丝(30)和导电部(20)密封。导电部(20)具有突出部分(20a),而且使导电部(20)的侧面(60a)粗糙化,以提高导电部(20)与密封树脂(40)的接合强度。
Description
技术领域
本发明涉及表面安装型半导体装置,具体而言,涉及具有无引线结构的表面安装型半导体装置。
背景技术
一般,半导体装置的构件之一采用金属制引线框,但是为了实现多引脚化,要求引线框中的引线间距微细化。但与此同时,若引线本身的宽度变小,则产生引线的强度下降、引线弯曲等造成短路现象。因此,为了确保引线的间距,无奈只好使封装大型化。这样,采用引线框的半导体装置封装尺寸便增大而且变厚。因此,提出了没有引线框影响的所谓无引线结构的表面安装型半导体装置。
专利文献1:特开平9-252014号公报
专利文献2:特开2001-210743号公报
在图11(a)(b)中示出在专利文献1中记载的半导体装置。该半导体装置的制造方法是,首先在基材101上贴金属箔,对该金属箔进行蚀刻,在预定的部分残留金属箔之后,在与半导体元件102具有同等大小的金属箔103a(管芯垫)上用粘接剂104固定半导体元件102,再用金属丝105进行半导体元件102和金属箔103b的电气连接,用金属模具以密封树脂106进行传递模塑(图11(a))。最后,将成型后的密封树脂106从基材101分离,从而完成半导体元件的封装(图11(b))。但是,用该制造方法得到的半导体装置,没有采取提高作为端子的金属箔103b与密封树脂106的粘结强度的对策,随着半导体装置的多引脚化、小型化的进展,金属箔103b在微细化的情况下容易剥离、由于金属箔103b剥离使金属丝105断线,所以课题之一是提高金属箔103b与树脂的粘结强度的对策。
此外,用在专利文献1上记载的制造方法,在金属箔蚀刻工序及密封树脂的模塑工序上,要求基材与金属箔充分密合,另一方面,又要求模塑工序后基材与密封树脂、基材与金属箔容易分离。这样,要求基材和金属箔具有与密合特性相反的特性。就是说,对于在蚀刻中使用的药品耐久性,在模塑工序的高温下及密封树脂在金属模具内流动时所施加的压力下,尽管半导体元件必须有不错位的耐久性,但是要求在模塑后基材与密封树脂、基材与金属箔可以容易分离。但是,作为基材的示例,用特氟隆(注册商标)材料、硅树脂材料或覆盖特氟隆(注册商标)的金属等,无论如何也不能满足这样的密合特性。
图12(a)(b)示出在专利文献2记载的半导体装置。该半导体装置用以下方法制造。首先,得到在作为基材的金属板上形成棋盘状凹槽201a的金属板201。接着,用粘接剂203将半导体元件202固定在金属板201上,然后,在设计上需要的位置焊接金属丝,形成金属丝204,用密封树脂205进行传递模塑(图12(a))。接着,研磨金属板201及粘接剂203,进而按照符合设计的尺寸,连同密封树脂205一起,切断金属板201,得到半导体装置(图12(b))。但是,即使使用这个制造方法,所得到的半导体装置,在提高作为的金属板201和密封树脂205的粘结强度方面,并未采取对策,和专利文献1的情况一样,推进半导体装置多引脚化,小型化时金属板201必然微细化,若金属板201微细化,则就容易从密封树脂剥离,必须提高密封树脂205和金属板201的粘结强度,这对于实现多引脚的小型高可靠性半导体装置的要求而言,仍旧是个课题。
这样,想要用传统的制造方法实现多引脚小型半导体装置时,存在导电部(端子)微细化、因密封树脂和导电部的粘结强度降低而容易从树脂剥离的问题,因此要求提高粘结强度,开发可靠性高的多引脚小型半导体装置。另一方面,即使就半导体装置薄型化的要求而言,为了得到用传统的方法薄型化的半导体装置,半导体元件(芯片)本身必须磨薄,在其制造工序中容易发生小片和碎片,致使成本上升。
发明内容
本发明旨在解决这样的问题,其目的在于,提供一种高可靠性的多引脚小型无引线结构的半导体装置。具体地说,提供密封树脂和导电部粘结强度优异的表面安装型半导体装置,并提供半导体装置制造用基板及其制造方法。再一目的在于,提供可以薄型化的无引线结构的半导体装置及半导体装置制造用基板及其制造方法。
本发明是一种半导体装置,其特征在于,设有:具有电极的半导体元件、配置在半导体元件周围的多个导电部、连接半导体元件的电极和导电部的金属丝、密封半导体元件、导电部以及金属丝的密封树脂,导电部具有由铜或铜合金组成的金属箔和至少设置在金属箔上侧的导电部镀层,形成导电部上侧的导电部镀层从金属箔向外突出的突出部分,导电部在其背面露出于密封树脂的外面。
本发明是半导体装置,其特征在于,导电部在金属箔的下侧具有导电部镀层,该下侧导电部镀层从密封树脂向外突出。
本发明是半导体装置,其特征在于,导电部金属箔的侧面被粗糙化而变粗糙。
本发明是半导体装置制造用基板,其特征在于,设有基材层、具有设置在该基材层上的粘接剂层的粘接板、设置在粘接板的粘接剂层上的多个导电部,导电部具有由铜或铜合金组成的金属箔和至少设置在金属箔上侧的导电部镀层,导电部上侧的导电部镀层形成从金属箔向外突出的突出部分。
本发明是半导体装置制造用基板,其特征在于,导电部具有金属箔下侧的导电部镀层,该下侧导电部镀层埋入在粘接剂层内。
本发明是半导体装置制造用基板,其特征在于,导电部的金属箔侧面被粗糙化而变得粗糙。
本发明是半导体装置制造用基板,其特征在于,基材层由金属材料构成。
本发明是半导体装置制造用基板,其特征在于,导电部由铜或铜合金构成的金属箔的厚度为0.01~0.1mm。
本发明是半导体装置制造用基板,其特征在于,导电部的导电部镀层,由作为铜扩散阻挡层的镍镀层和具有设置在该镍镀层上的单层或多层贵金属镀层的多层结构形成,用于贵金属镀层的贵金属至少是Au、Ag、Pd中的任何一种。
本发明是半导体装置制造用基板,其特征在于,粘接板的基材层在200℃下的弹性模量在1.0GPa以上,而粘接剂层200℃下的弹性模量在0.1MPa以上。
在本发明中,构成粘接板的粘接剂层的粘接剂在100~150℃下固化前的弹性模量在0.1MPa以下,200℃下固化后的弹性模量最好在0.1MPa以上。对粘接剂的种类没有特别限制,但是最好可采用热固化型粘接剂。
在本发明中,对上述热固化型粘接剂其构成没有特别限制,但是例如可以优选采用环氧树脂、环氧固化剂、弹性体的粘接剂。
本发明是半导体装置制造用基板,其特征在于,粘接板的粘接剂层对于试验用金属箔的粘接力为0.1~15N/20mm。
本发明是半导体装置制造用基板,其特征在于,半导体装置用基板包含具有半导体元件固定区域、配置成棋盘状的多个块,各块之间用切断区域分划,导电部配置成不落在该切断区域上。
本发明是半导体装置制造用基板的制造方法,其特征在于,设有以下工序:制备作为导电部的原料由铜或铜合金构成的金属箔的工序;在与金属箔的导电部对应的部分进行部分镀膜,形成部分镀层的工序;在具有基材层及粘接剂层的粘接板的粘接剂层一侧加压粘贴形成了部分镀层的金属箔的工序;以部分镀层作为抗蚀剂蚀刻金属箔而形成导电部的工序;以及加工粘接板以确定外形的工序。
本发明是半导体装置制造用基板的制造方法,其特征在于,在以部分镀层作为抗蚀剂蚀刻金属箔而形成导电部的工序中,蚀刻导电部的金属箔的侧面,使之粗糙化。
本发明是半导体装置的制造方法,其特征在于包括:半导体装置制造用基板的准备工序,其中,准备基材层、具有设置在该基材层上的粘接剂层的粘接板、设置粘接板的粘接剂层上的多个导电部,导电部具有由铜或铜合金构成的金属箔和设置在至少金属箔上侧的导电部镀层,导电部上侧的导电部镀层形成从金属箔向外突出的突出部分;将具有电极的半导体元件固定在半导体装置制造用基板的粘接剂层上,用金属丝将导电体和半导体元件的电极电气连接的工序;用密封树脂密封半导体元件、金属丝和导电部的工序;将粘接板从密封树脂分离的工序;以及使密封树脂单片化为各半导体元件的工序。
采用本发明的半导体装置及其制造方法,可以得到作为与外部连接的部位的导电部和密封树脂的粘结强度非常高,即使导电部微细化,其可靠性也优异的半导体装置。此外,在本发明的半导体装置导电部下侧的面上施加的镀层,在从半导体装置背面只突出镀膜厚度的状态下进行树脂密封,半导体装置安装在印刷电路板时,可以提高安装的可靠性。另外,本发明的半导体装置,由于是不采用引线框的无引线结构,可以使导电部微细化,间距变窄,与此同时省去了传统上使用的管芯垫,半导体元件的下面处于露出半导体装置背面的形态,可以实现力图薄型化的半导体装置。此外,采用本发明的半导体装置制造用基板,在其制造工序上即使不用管芯垫,也可以固定半导体元件,可以在其位置没有偏移的状态下,进行树脂密封。
附图说明
图1是表示一例本发明的半导体装置的概要结构图;
图2是图1的半导体装置中导电部的放大图;
图3是表示另一例本发明的半导体装置的概要结构图;
图4是表示再一例本发明的半导体装置的概要结构图;
图5是图4的半导体装置中导电部的放大图;
图6(a)-(d)是表示图1所示的半导体装置的制造方法的工序图;
图7是示意表示在图6的工序中形成导电部时的粘接板(基板)的平面图;
图8(a)-(e)是表示基板制作顺序的工序图;
图9(a)(b)是对导电部中金属箔侧面表面粗糙化情况的说明图;
图10(a)(b)是本发明的半导体装置制造方法的基板制作工序中粘接板上形成了导电部的状态的顶视图;
图11(a)(b)表示一例无引线结构的传统半导体装置的说明图;
图12(a)(b)是表示另一例无引线结构的传统半导体装置的说明图。
具体实施方式
以下,参照附图具体而言明本发明实施例。如图1及图2所示,半导体装置P设有:具有电极11的半导体元件10、配置在半导体元件10周围的多个导电部20、在电气上连接半导体元件10的电极11和导电部20的金属丝30、将半导体元件10、导电部20和金属丝30密封的密封树脂。
其中,导电部20具有由铜或铜合金构成的金属箔60、设置在金属箔60上下两侧的导电部镀层20a,导电部镀层20a成为对应于金属箔60而向外突出的突出部分。
此外,金属丝30连接到导电部20上侧的导电部镀层20a,该上侧导电部镀层20a成为连接到金属丝30的功能面。
另外,半导体元件10的背面从密封树脂40的背面Pa(也成为半导体装置的背面)向外露出,此外导电部20下侧的导电部镀层20a,从密封树脂40的背面Pa向外只突出其厚度。此外,导电部20的金属箔60的侧面60a被粗糙化,使之变得粗糙。
这样,图1的半导体装置P,呈现半导体元件10的底面和导电部20下侧的导电部镀层20a在密封树脂40的表面露出的结构,成为不具有管芯垫和半导体元件固定用的粘接剂层的无引线结构。而且导电部20上侧的突出部分20a在密封树脂40中产生锚固的效果,与此同时由于导电部20的侧面60a粗糙化与密封树脂40坚固地啮合,即使导电部20微细化,导电部20和密封树脂40的粘结强度也得到提高。然后,设置在导电部20下侧的面上的突出部分20a由导电部镀层构成,导电部20处于从半导体装置的背面Pa只突出导电部镀层20a的厚度的状态下,被树脂密封,所以将半导体装置P安装在印刷电路板上时,可以防止由于安装基板上的凹凸和异物而使导电部(端子)上浮,可以提高安装时的可靠性。另外,也有防止焊锡膏挤出而造成短路的效果。
图3是表示另一例本发明半导体装置的概要结构图。图3示出的半导体装置P,是如传统技术那样采用管芯垫的示例,但是导电部20和管芯垫部21分别具有上下的突出部分20a、21a的结构,即使导电部20微细化,其突出部分20a也在密封树脂40中发挥锚固的效果,故可构成与密封树脂40的粘结强度高、可靠性好的半导体装置。另外,设置在导电部20下侧面上的突出部分20a,由镀层构成,导电部20处于从半导体装置P背面Pa只突出导电部镀层20a的厚度的状态,所以将半导体装置P安装在印刷电路板上时,可防止由于安装电路板上的凹凸和异物而使导电部(端子)上浮,可以提高安装时的可靠性。另外,也有防止焊锡膏挤出而造成短路的效果。这里,在管芯垫部21背面侧不设置突出部分21a,也采取只在导电部20上设置突出部分20a的形态。
图4是表示又一例本发明半导体装置的概要结构图。该图4所示的半导体装置,除导电部20做成只在上侧功能面上才有突出部分20a的形状这一点外,做成与图1相同的无引线结构。在该半导体装置中,导电部20的突出部分20a也发挥锚固在密封树脂40中的效果,与此同时如图5放大所示,导电部20成为金属箔60侧面60a表面变粗糙而与密封树脂40啮合的状态。
在传统的半导体装置中,管芯垫的厚度约为100~200μm,半导体元件固定用的粘接剂层厚度约为10~50μm。因此,半导体元件的厚度及覆盖在半导体元件上的密封树脂的厚度相同时,依据上述半导体装置,可不需要管芯垫及粘接剂层,所以有可能实现110~250μm厚的薄型化。
图6(a)-(d)是表示图1所示的半导体装置制造方法的工序图,以下用这些附图将说明制造顺序。
首先,如图6(a)所示,准备具有基材层51和粘接剂层52的粘接板50,在该粘接板50上的粘接剂层52上部分地形成多个导电部20,制作基板B。如图所示,导电部20上下分别具有突出部分20a,具有该导电部20的半导体装置制造用基板B的制作工序将在后面说明。
图7示意表示在形成了导电部20时的粘接板50,也就是基板的平面图。根据半导体元件10的电极数,在粘接板50上形成相应数目的导电部20,但是多个导电部20在电气上全都独立。
接着,如图6(b)所示,用粘接剂层52将形成了电极11的半导体元件10固定在基板B侧上的预定位置上,使不形成电极11的一侧成为其基板B侧。接着,用金属丝30在电气上连接多个导电部20和半导体元件10的电极11。另外,芯片尺寸变小,半导体元件10对粘接板50的粘固力不充分时,也可以用银膏、管芯粘附膜等商售的管芯粘附材料,将半导体元件10牢牢固定在粘接板50上。在这种情况下,也不需要管芯垫,故与传统的半导体装置相比,可以实现100~200μm厚的薄型化。另外,作为半导体装置的厚度限制宽松时,也可以像图3所示的半导体装置的情况那样,使用设置管芯垫部21的半导体装置制造用基板。
接着,如图6(c)所示,用密封树脂40密封半导体元件10、金属丝30和导电部20,在粘接板50上形成半导体装置P。用密封树脂40的密封,采用金属模具以通常的传递模塑法进行。另外,模塑后,根据需要进行密封树脂40的后固化加热。后固化加热步骤可以在后述粘接板50的分离之前,也可以在之后。接着,如图6(d)所示,使粘接板50与密封树脂分离,得到图1所示的半导体装置P。
图8(a)-(e)示出上述基板的制作工序,就是说,在粘接板50的粘接剂层52上部分地形成导电部20,制造半导体装置制造用基板B的顺序。该工序的说明如下。
首先,如图8(a)所示,准备作为导电部的原料由铜或铜合金构成的金属箔60。作为该金属箔60,基于强度的考虑,使用厚度为0.01~0.1mm金属箔。然后,首先在金属箔60的两面贴上干膜抗蚀剂,如图8(a)所示,用光刻法以与导电部的形状相反的图形,分别使金属箔60两面的干膜抗蚀剂61形成图案。
接着,如图8(b)所示,以干膜抗蚀剂61作为掩模,按导电部的形状进行作为铜的扩散阻挡层63的镀镍层和贵金属镀层64的部分镀膜后,如图8(c)所示,除去干膜抗蚀剂61,形成导电部镀层(部分镀层)62。这里,作为用于贵金属镀层64的贵金属,至少为Au、Ag、Pd中的任何一种。另外,贵金属镀层64可构成为单层,也可为多层。
接着,如图8(d)所示,一边加压,一边将形成了由扩散阻挡层63和贵金属镀层64构成的导电部镀层62的金属箔60贴在粘接板50的粘接剂层52一侧,使导电部镀层62处于埋入粘接剂层52的状态。在粘贴后的状态下,如图8(e)所示,以导电部镀层62为抗蚀剂,蚀刻金属箔60,形成导电部20。在这种情况下,通过蚀刻金属箔60的侧面60a,做成设置在金属箔60上下的由导电部镀层62构成的突出部分20a的形状。接着,如图9(a)所示,在金属箔60的侧面60a进行化学处理,使金属箔60侧面60a如图9(b)所示粗糙化。这样,在金属箔60的上下两面设置突出部分20a的同时,使金属箔60的侧面60a粗糙化后,用冲床加工等切断手段进行粘接板50的外形加工,确定粘接板50的外形。
这样,图8(a)-(e)的工序图,表示形成上下两面都有突出部分的类型的导电部的情况,但是如图4所示的半导体装置P那样,只在形成金属箔的功能面(焊接金属丝的面)上具有突出部分20a的导电部20的情况下,只对金属箔60的功能面施加导电部镀层62,不镀膜一侧的面上将金属箔60贴在粘接板上,在该粘贴状态下进行金属箔60的蚀刻。以此,可以形成只在功能面上有突出部分20a的导电部20。然后,继续与在图9(a)(b)说明的相同,进行导电部20侧面的粗糙化处理。此外,如图3所示的半导体装置P那样,在形成导电部20和管芯垫部21时,在图8(a)的工序中,将干膜抗蚀剂61图案化,露出与管芯垫部对应的部位。
再有,本发明的半导体装置制造方法是实用的,可集中多个半导体装置进行制造。图10(a)(b)中表示它的示例。图10(a)是说明图,示意表示了包含多个半导体装置制造用基板B的粘接板50的平面图,在粘接板50的上面,形成固定一个半导体元件的区域71和在其周围形成的导电部,表示为一个块70,多个块70形成棋盘状。另一方面,图10(b)是一个块70的放大图,在半导体元件固定区域71周围形成了所需数量的导电部20。
图10(a)中,例如,粘接板50的宽度(W)为65mm,经过预定的工序后,在粘接板50上形成多个块70,制作连续的成卷的基材。将这样得到的宽65mm的粘接板50适当切断,成为下一道半导体元件安装工序、树脂密封工序中所需的块数,作为半导体装置制造用基板B使用。这样,在多个半导体元件一起进行树脂密封的情况下,树脂密封后分离粘接板之后,用切片机或冲压机切割成预定的尺寸,进行单片化,于是得到半导体装置P。
但是,在图10(a)的半导体装置制造用基板B中,若用切片机或冲压机切割成预定的尺寸的切割区域72,即覆盖切割手段所及范围,切割线保持的预定宽度的区域内存在导电部20,则存在伴随切割发生金属粉末附着在半导体装置上而在以后的安装工序中发生短路的可能性。作为针对这样的不良情况的对策,最好将导电部20配置得不落在切割区域72上。此外,采用这样配置的半导体装置制造用基板B制造出来的半导体装置P,单片化后使导电部20不在其侧面露出,在安装在印刷电路板上的状态下,成为端子(导电部)从外侧隐藏的状态,也有可以防止端子被直接碰到的不良结果。
作为导电部镀层62的具体例,可以举出在作为扩散阻挡层63的镀膜厚5μm的镍镀膜上,重叠作为贵金属镀层的镀膜厚0.1μm的钯镀膜和镀膜厚0.05μm的金镀膜64而成的形态。当然不限于此,根据制造半导体装置P的要求,可以用各种组合和厚度形成。此外,导电部镀层62的总厚度可根据半导体装置的要求来确定,但通常0.05~50μm的范围是合适的。
用于本发明半导体装置的制造方法的粘接板50,最好是直至树脂密封工序完成为止都可靠地固定半导体元件10和导电部20,而且在从密封树脂40分离时容易剥离的。这样的粘接板50,具有像上述那样的基材层和粘接剂层52。对基材层51的厚度没有特别限制,但是通常为12~200μm左右,最好为50~150μm。此外,对粘接剂层52的厚度没有特别限制,但是通常为1~50μm左右,最好为5~20μm。
另外,作为粘接板50,其基材层51在200℃下的弹性模量在1.0GPa以上,且粘接剂层52宜采用在200℃下的弹性模量在0.1MPa以上的。通过采用具有这样的弹性模量的作为粘接剂层52,通过在图8(d)所示的工序加压贴合,导电部镀层62的部分挤压而埋入粘接剂层52中,在图6(d)所示的半导体装置P的完成阶段,可以形成在导电部20内设置称为底面的突出部分20a从密封树脂的表面突出的Stand off状态,具有提高半导体装置安装时的可靠性的效果。
进行金属丝焊接等半导体元件安装工序,大致处于150~200℃左右的高温条件下。因此,要求粘接板50的基材层51及粘接剂层52具有耐受这些条件的耐热性。从这样的观点看,作为基材层51,可以适当采用200℃下的弹性模量在1.0GPa以上的,最好是在10Gpa以上的材料。基材层51的弹性模量通常最好在1.0GPa~1000GPa左右。另外,作为粘接剂层52,适合采用弹性模量0.1MPa以上的,优选0.5MPa以上的,更优选1MPa。粘接剂层52的弹性模量,通常宜为0.1~100MPa左右。具有这种弹性模量的粘接剂层52,在半导体元件安装工序等不易发生软化流动,可以比较稳定地连接。另外,弹性模量的测定采用在实施例中详细记载的方法。
粘接板50的基材层51可以是有机物,也可以是无机物,但若考虑到搬运时操作性、模塑时的翘曲等,则最好采用金属箔。作为这样的金属箔,可以举出SUS箔、Ni箔、Al箔、铜箔、铜合金箔等,但是从可以廉价获得及种类丰富上考虑,最好选择铜、铜合金。此外,作为这样的基材层51的金属箔,为了确保与粘接剂层52的锚固性,最好进行单面粗糙化处理。作为粗糙化处理方法,可采用公知的喷砂等物理粗糙化方法或者蚀刻、镀膜等化学粗糙化方法中的任意一种。
对于作为形成粘接板50的粘接剂层52的粘接剂,没有特别限制,但最好采用环氧树脂、环氧固化剂、含有弹性体的热固性粘接剂。在热固性粘接剂的情况下,通常,基材的贴合、可以在未固化的所谓B阶段状态,亦即在150℃以下比较低温下进行贴合,而且通过贴合后使之固化,可以提高弹性模量,提高耐热性。
这里,作为环氧树脂,可以举出缩水甘油胺型环氧树脂、双酚F型环氧树脂、双酚A型环氧树脂、线型酚醛型环氧树脂、甲酚-线型环氧树脂、联苯型环氧树脂、萘型环氧树脂、脂肪族环氧树脂、脂环族环氧树脂、杂环环氧树脂、含有螺环的环氧树脂、卤素化环氧树脂等,它们可以单独或2种以上混合使用。作为环氧固化剂,可以举出各种咪唑系化合物及其衍生物、胺系化合物、双氰胺、联氨化合物、酚醛树脂等,它们可以单独或2种以上混合使用。并且,作为弹性体,可以举出丙烯树脂、丙烯腈-丁二烯共聚物、苯氧基树脂、聚酰胺树脂等,它们可以单独或2种以上混合使用。
此外,粘接剂层52对试验用金属箔的粘接力优选0.1~15N/20mm,更优选0.3~15N/20mm。这里,粘接力可以按导电部的大小在上述范围内适当选择。就是说,导电部的尺寸大时,粘接力可较小,导电部的尺寸小时粘接力最好设定得大。具有该粘接力的粘接板50,具有适度的粘接力,在基板制作工序~半导体元件安装工序中固定在粘接剂层的导电部不易发生导电部偏移。此外,在板分离工序中,粘接板50从半导体装置的分离性良好,可以减小对半导体装置的损坏。另外,粘接力的测定采用在实施例中详细记载的方法。
另外,此外,在粘接板50中,可以根据需要赋予防静电功能。赋予粘接板50防静电功能时,有在基材层51、粘接剂层52中混合静电防止剂、导电性填充料的方法。此外,有在基材层51和粘接剂层52的界面上以及在基材层51里涂敷静电防止剂的方法。通过赋予该防静电功能,可以抑制将粘接板从半导体装置分离时发生的静电。
作为静电防止剂,只要具有防静电功能就行,并无特别限制。作为具体例,例如,可以使用丙烯酸系两性、丙烯酸系阴离子、无水马来酸-乙烯系阳离子等表面活性剂等。作为防静电层用的材料,具体地说,可以有ボンデイツプPA、ボンデイツプPX、ボンデイツプP(コニシ公司制)等材料。此外,作为导电性填充料,可使用常用的例如Ni、Fe、Cr、Co、AI、Sb、Mo、Cu、Ag、Pt、Au等金属,它们的合金或氧化物,以及炭黑等的石墨,等等。它们可以单独或2种以上组合使用。导电性填充料,呈粉状、纤维状任何一种均可。其他,粘接板中可以添加防老化剂、颜料、增塑剂、填充剂、粘性附加剂等公知的各种添加物。
实施例1
粘接板的制作
双酚A型环氧树脂(Japan epoxy resin公司制,エビコ-ド1002)100份重量、丙烯腈丁二烯共聚物(日本ゼオン公司制,ニツポ一ル1072J)35份重量、酚醛树脂(荒川化学公司制,P-180)4份重量、咪唑(四国フアイン公司制,C11Z)2份重量溶解于350份重量的甲基乙基酮,得到粘接剂溶液。在厚度为100μm的单面粗糙化的铜合金箔(ジヤパンエナジ一公司制,BHY-13B-7025)51上涂敷后,在150℃下干燥3分钟,从而形成厚度15μm的粘接剂层,得到粘接板50。该粘接板50上的粘接剂层52的固化前在100℃下的弹性模量为2.5×10-3Pa,固化后在200℃下弹性模量为4.3MPa,对铜箔的粘接力为12N/20mm。再有,用作基材层51的铜箔在200℃下的弹性模量为130GPa。
半导体装置制造用基板的制作
首先,在厚度为40μm的铜箔(Olin7025)60的两面上层压干膜抗蚀剂61(東京応化制「オ一デイルAR330」)。然后,用光刻法使干膜抗蚀剂形成与导电部相反的图案。接着,以形成了图案的干膜抗蚀剂作为掩模,依次在铜箔两面上施加镍镀膜和Au镀膜,形成导电部镀层62,其后,除去干膜抗蚀剂。接着,经由粘接剂层52侧将部分地配置了镀镍层和Au镀层的层叠物的铜箔60贴在粘接板50上。此时,面向粘接板50的一侧的镀膜层叠物变成埋入粘接剂层的状态。然后,充分加热加压,使镀膜部分62和粘接剂层52之间没有间隙。接着,在此粘贴状态下,以Au镀层为抗蚀剂,蚀刻铜箔而形成导电部60。在该蚀刻加工时,也蚀刻铜箔60的侧面,从而在铜箔的上下设置由Au和镍构成的突出部分20a。接着,浸渍在(硫酸+过氧化氢)系药液中,处理铜箔60的侧面60a,控制粗糙化使Ra(表面粗糙度)成为0.2μm以上,粗糙化。最后,通过冲压加工成粘接板的外形。
然后,按图10(a)(b)的示例(W为65mm)中所示的图案在粘接板50上形成导电部20。在一个块70的方形的各边形成16个导电部20,合计形成64个导电部20。
半导体元件的装载
将试验用的铝蒸镀硅芯片(6mm×6mm)10固定在上述粘接板50的粘接剂层52面上(相当于图10(b)的71)。具体地说,以175℃下0.3MPa,1秒的条件粘贴后,在150℃下干燥1小时进行固定。接着,采用直径为25μm的金丝,在硅芯片的电极和导电部之间进行焊接。金属丝焊接数目为每个芯片64个点。
关于上述1个单元(4个×4个)的10单元,亦即,对160个铝蒸镀芯片进行金属丝焊接。金属丝焊接成功率为100%。接着,用传递成型模塑密封树脂(日東電工制「HC-100」)40。树脂模塑后,在室温下剥离粘接板。另外,在175℃下5小时,在干燥机中进行固化。其后,用切片机以1块为单位进行切割得到半导体装置P。
用软X射线装置(Micro Focus X射线电视透视装置:島津制作所制「SMX-100」))对该半导体装置P进行内部观察的结果是,确认得到了没有金属丝变形和芯片偏移等,而且导电部20和密封树脂40的粘结强度非常高的半导体装置P。另外,导电部20成为其下侧突出部分20a从密封树脂40突出的状态。
再有,金属丝焊接条件、传递模塑条件、弹性模量测定方法、粘接力测定方法、金属丝焊接成功率如下。
金属丝焊接条件
装置:株式会社新川制「UTC-300BI SUPER」
超声波频率:115KHz
超声波输出时间:15毫秒
超声波输出:120mW
焊接载荷:1018N
搜索载荷:1037N
传递模塑条件
装置:TOWA成型机
成型温度:175℃
时间:90秒
夹紧压力:200KN
传递速度:3mm/秒
传递压:5KN
弹性模量测定方法
基材层、粘接剂层均采用:
测评仪器レオメトリツクス社制的粘弹性频谱仪「ARES」
升温速度:5℃/min
频率:1Hz
测定方式:张拉方式
粘接力测定方法
宽度20mm,长度50mm的粘接板50在120℃×0.5MPa×0.5m/min的条件下,在35μm铜箔(ジヤパンエナジ一制「C7025」)上层压后,在150℃的热风炉中放置1小时后,在温度23℃,湿度65RH的气氛条件下,张拉速度300mm/min,在180°方向张拉35μm铜箔,以其中心值作为粘结强度。
金属丝焊接成功率
采用株式会社レスカ制的焊接测试机「PTR-30」,在测定方式:张拉试验、测定速度:0.5mm/sec下测定金属丝焊接的张拉强度。张拉强度在0.04N以上时设为成功,小于0.04N时设为失败。金属丝焊接成功率是从它们的测定结果算出的成功比率。
实施例2
在实施例1中制造半导体装置,除使用18μm铜-镍合金箔(ジヤパンエナジ一制「C7025」)作为金属箔外,其他与实施例1相同。金属丝焊接成功率为100%。对半导体装置内部进行观察的结果是,确认得到了没有金属丝变形和芯片偏移,导电部和密封树脂的粘结强度非常高的半导体装置。
以上就本发明的实施例作了详细说明,但是按照本发明的半导体装置及其制造方法不受上述实施例的任何限定,在不脱离本发明意图的范围内显然可以作出各种改变。
Claims (5)
1.一种半导体装置,其特征在于,
设有:具有电极的半导体元件;
配置在半导体元件周围的多个导电部;
连接半导体元件的电极和导电部的金属丝;以及
密封半导体元件、导电部和金属丝的密封树脂,
导电部具有由铜或铜合金构成的金属箔和设置在金属箔上侧的导电部镀层,
导电部上侧的导电部镀层在形成从金属箔向外突出的突出部分的同时,上侧的导电部镀层沿水平方向向密封树脂内延伸,
导电部的背面露出在密封树脂之外,且导电部具有在金属箔的下侧沿水平方向形成从金属箔向外突出的突出部分的导电部镀层,该下侧的导电部镀层从密封树脂向外突出,且半导体元件的背面从密封树脂向外露出。
2.权利要求1记载的半导体装置,其特征在于,导电部金属箔的侧面被粗糙化,使之粗糙。
3.一种半导体装置制造用基板的制造方法,其特征在于,包括以下工序:
准备由铜或铜合金构成的金属箔作为导电部原料的工序;
在对应于金属箔的导电部的部分进行部分镀膜而形成部分镀层的工序;
将形成了部分镀层的金属箔加压而贴附在具有基材层及粘接剂层的粘接板的粘接剂层侧的工序;
以部分镀层作为抗蚀剂,通过蚀刻金属箔而形成由金属箔、在金属箔上侧的从金属箔向外突出的上侧的导电部镀层和在金属箔下侧的沿水平方向从金属箔向外突出的下侧的导电部镀层构成的导电部的工序;以及
对粘接板进行加工以确定外形的工序。
4.权利要求3记载的半导体装置制造用基板的制造方法,其特征在于,在以部分镀层作为抗蚀剂蚀刻金属箔而形成导电部的工序中,通过蚀刻导电部金属箔的侧面而使之粗糙化。
5.一种半导体装置的制造方法,其特征在于,包括以下工序:
准备半导体装置制造用基板的工序,该基板设有包括基材层及设在该基材层上的粘接剂层的粘接板和设在粘接板的粘接剂层上的多个导电部,导电部具有由铜或铜合金构成的金属箔、设在金属箔上侧的导电部镀层以及设在金属箔下侧的导电部镀层,导电部的上侧的导电部镀层和下侧的导电部镀层沿水平方向形成从金属箔向外突出的突出部分;
将具有电极的半导体元件固定在半导体装置制造用基板的粘接剂层上,并将导电体和半导体元件的电极用金属丝电气连接的工序;
用密封树脂密封半导体元件、金属丝和导电部的工序;
使粘接板从密封树脂分离,并使半导体元件的背面露出于密封树脂之外的工序;以及
将密封树脂单片化为各半导体元件的工序。
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- 2005-07-13 DE DE112005001661T patent/DE112005001661T5/de not_active Ceased
- 2005-07-13 JP JP2006519633A patent/JP4842812B2/ja not_active Expired - Fee Related
- 2005-07-13 WO PCT/JP2005/012907 patent/WO2006009030A1/ja active Application Filing
- 2005-07-13 US US11/632,131 patent/US7943427B2/en not_active Expired - Fee Related
- 2005-07-13 CN CNB200580023599XA patent/CN100555608C/zh not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
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JP4842812B2 (ja) | 2011-12-21 |
TWI364079B (zh) | 2012-05-11 |
TW200610073A (en) | 2006-03-16 |
JPWO2006009030A1 (ja) | 2008-05-01 |
CN1989611A (zh) | 2007-06-27 |
US20080048311A1 (en) | 2008-02-28 |
WO2006009030A1 (ja) | 2006-01-26 |
DE112005001661T5 (de) | 2007-05-31 |
US7943427B2 (en) | 2011-05-17 |
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