CN100466237C - 半导体装置与半导体装置制造用基板及该基板的制造方法 - Google Patents

半导体装置与半导体装置制造用基板及该基板的制造方法 Download PDF

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Publication number
CN100466237C
CN100466237C CNB2005800235881A CN200580023588A CN100466237C CN 100466237 C CN100466237 C CN 100466237C CN B2005800235881 A CNB2005800235881 A CN B2005800235881A CN 200580023588 A CN200580023588 A CN 200580023588A CN 100466237 C CN100466237 C CN 100466237C
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conductive part
coating
semiconductor device
die pad
metal forming
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CN1998076A (zh
Inventor
池永知加雄
关谦太朗
细川和人
桶结卓司
吉川桂介
池村和弘
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Dai Nippon Printing Co Ltd
Nitto Denko Corp
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Dai Nippon Printing Co Ltd
Nitto Denko Corp
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Abstract

半导体装置P设有管芯垫20、搭载在管芯垫20上的半导体元件30及密封树脂40。在管芯垫20周围配置了多个导电部10，它们具有由铜或铜合金构成的金属箔1和设在该金属箔1上下两侧的导电部镀层2构成的层结构。管芯垫20具有下侧的管芯垫镀层2b，由该管芯垫镀层2b构成的管芯垫20上载有半导体元件30。位于半导体元件30上侧的电极30a分别用金属丝3与导电部10的上侧电气连接。位于导电部10和管芯垫20下侧的导电部的镀层2和管芯垫镀层2b的背面从密封树脂40向外露出。

Description

半导体装置与半导体装置制造用基板及该基板的制造方法
技术领域
本发明涉及表面安装型半导体装置，具体而言，涉及具有无引线结构的表面安装型半导体装置。
背景技术
一般，半导体装置用金属制引线框作为其构件之一，但是为了实现多引脚化，要求引线框中引线间距微细化。但是，引线本身的宽度随之变小，引线的强度下降，产生了引线弯曲引起的短路现象。因此，为了确保导线的间距，无奈只好使封装大型化。这样，采用引线框的半导体装置，封装尺寸增大且变厚。因此，提出了没有引线框影响的所谓无引线结构的表面安装型半导体装置。
专利文献1:特开9-252014号公报
专利文献2:特开2001-210743号公报
图9(a)(b)示出在专利文献1中记载的半导体装置。该半导体装置的制造方法，首先，在基材101上贴上金属箔，对该金属箔进行蚀刻，使之在规定部分留下金属箔后，使用粘接剂104将半导体元件102固定在与半导体元件102同等大小的金属箔103a(管芯垫)上，另外，用金属丝105进行半导体元件102和金属箔103b的电气连接，用金属模具以密封树脂106进行传递模塑(图9(a))。最后，将成型后的密封树脂106从基材101分离，从而完成半导体元件的封装(图9(b))。但是，按该制造方法得到的半导体装置，由于伴随地存在粘接剂104及金属箔103a(管芯垫)，基于要求小而薄的半导体装置的考虑，仍旧存在问题。
专利文献2上所记载的半导体装置示于图10(a)(b)。该半导体装置用如下方法制造。首先，制得在作为基材的金属板上形成棋盘状凹槽201a的金属板201。接着，用粘接剂203将半导体元件202固定在金属板201上，其后，在设计上需要的位置上，进行金属丝焊接，形成金属丝204，用密封树脂205进行传递模塑(图10(a))。接着，研磨金属板201及粘接剂203，另外，按符合的设计尺寸连同密封树脂205一起切割金属板201，得到半导体装置(图10(b))。但是，即使用这个制造方法，所得到的半导体装置，半导体元件202的下面伴随地存在粘接剂层203和金属板201，所以难以得到产业界所希望的薄型化半导体装置。
这样，用传统的制造方法难以得到薄型化的半导体装置。因此，为了得到薄型化的半导体装置，必须将半导体元件(芯片)本身磨得更薄，在该制造工序容易发生半导体元件的裂纹和缺口，致使成本上升。
但是，这样的单面密封型半导体装置，将半导体元件装载在管芯垫上，在该管芯垫上进行接地焊接。在这种情况下，有与半导体元件下面处于同一平面上的焊接部分。由于半导体元件、基板和密封树脂各自的热膨胀不同，半导体元件下面从外周部分沿着密封树脂和基板的界面发生剥离时，最终使处于同一平面内的接地焊接部分的金属丝也同时剥离，存在造成电气上开路的问题。
发明内容
本发明旨在解决这样的问题，其目的在于，提供一种具有能以低成本实现的薄型化的无引线结构的、可靠性高的表面安装型半导体装置，同时提供用于其制造的半导体装置制造用基板及其制造方法。
本发明是一种半导体装置，其特征在于，设有:管芯垫；搭载在管芯垫上的、具有电极的半导体元件；配置在管芯垫周围的多个导电部；连接半导体元件的电极和导电部的金属丝；至少密封半导体元件、导电部以及金属丝的密封树脂，导电部具有金属箔和设置在金属箔上下两侧的导电部镀层，管芯垫具有设置在导电部下侧与导电部镀层处于同一平面的管芯垫镀层，导电部下侧的导电部镀层和管芯垫的管芯垫镀层，其背面露出于密封树脂之外。
本发明是一种半导体装置，其特征在于，管芯垫具有其内部形成凹部的坝部，该坝部具有分别与导电部金属箔和上下两侧的导电部镀层设在同一平面的金属箔和上下两侧的镀层，同时坝部下侧的镀层与管芯垫镀层一体地形成，半导体元件配置在坝部的凹部内，用增补金属丝连接半导体元件的电极和坝部。
本发明是半导体装置，其特征在于，半导体元件的电极，用金属丝与导电部上侧的导电部的镀层连接，而且用增补金属丝和坝部上侧的镀层连接。
本发明是一种半导体装置，其特征在于，导电部上下两侧的导电部镀层具有包含各贵金属镀层的多层结构。
本发明是一种半导体装置，其特征在于，导电部以及坝部中央的金属箔相对于上下两侧的导电部镀层成细腰状。
本发明是半导体装置，其特征在于，导电部下侧的导电部镀层、坝部下侧的镀层和管芯垫镀层中的任意一个都突出于密封树脂之外。
本发明是一种半导体装置，其特征在于，在坝部设有密封树脂通过用的通路。
本发明是一种半导体装置制造用基板，其特征在于，在制造半导体装置用的基板中，设有:具有基材层和基材层上的粘接剂层的粘接板、设置在粘接板的粘接剂层上的管芯垫，以及配置在管芯垫周围的多个导电部，导电部具有金属箔和设置金属箔上下两侧的导电部镀层，管芯垫具有设在与导电部下侧的导电部镀层同一平面的管芯垫镀层。
本发明是一种半导体装置制造用基板，其特征在于，管芯垫具有其内部形成凹部的坝部，该坝部具有分别与导电部的金属箔以及在上下两侧的导电部镀层设在同一平面上的金属箔以及上下两侧的镀层，坝部的凹部是半导体元件用的凹部。
本发明是一种半导体装置制造用基板，其特征在于，导电部上下两侧的导电部镀层具有包含各贵金属镀层的多层结构。
本发明是一种半导体装置制造用基板，其特征在于，导电部以及坝部中央的金属箔相对于上下两侧的导电部镀层成细腰状。
本发明是一种半导体装置制造用基板，其特征在于，坝部设有密封树脂通过用的通路。
本发明是一种半导体装置制造用基板，其特征在于，粘接板的基材层为金属制。
本发明是一种半导体装置用基板的制造方法，其特征在于，半导体装置制造用基板的制造方法中设有以下工序:准备金属箔的工序；在对应于金属箔导电部的部分和对应于金属箔管芯垫的部分设置各自的部分镀层的工序；将设置了部分镀层的金属箔下侧贴在具有基材层和粘接剂层的粘接板的粘接剂层侧的工序；以部分镀层作为抗蚀剂蚀刻金属箔，从而形成具有金属箔和设在金属箔上下两侧的导电部镀层的导电部，同时形成具有与导电部下侧的导电部镀层设在同一平面的管芯垫镀层的管芯垫的工序；以及对粘接板进行加工以确定粘接板外形的工序。
本发明的半导体装置是不使用引线框的无引线结构，实现了在半导体元件之下只存在管芯垫镀层的薄型化。此外接地焊接部分处于比较其平面高的位置，所以即使产生从半导体元件下面剥离也不影响接地焊接部分，起到可防止在电气上成为开路、提高可靠性的效果。
附图说明
图1是以纵剖面表示本发明的一例半导体装置的概要结构图；
图2是省略了金属丝以透视状态平面地表示图1的半导体装置的说明图；
图3(a)-(d)是表示图1所示的半导体装置的制造方法的工序图；
图4(a)-(c)是举例说明将通路设置在管芯垫的坝部的情况的说明图；
图5(a)-(e)是表示基板制作顺序的工序图；
图6是图5(b)的部分放大图；
图7是以纵剖面表示本发明的另一例半导体装置的概要结构图；
图8是在本发明的半导体装置制造方法中的基板制作工序上在粘接板上形成了导电部的状态的顶视图；
图9(a)(b)是表示做成无引线结构的一例传统半导体装置的说明图；而
图10(a)(b)是表示做成无引线结构的另一例传统半导体装置的说明图。
具体实施方式
以下参照附图详细说明本发明的实施方式。
图1是以纵剖面表示本发明的一例半导体装置的概要结构图。另外，图2是省略了金属丝以透视状态平面地表示图1的半导体装置的说明图，图2的A-A剖面对应于图1。
如图1所示，半导体装置P设有:管芯垫20；装载在管芯垫20上并具有电极30a的半导体元件30；配置在管芯垫20周围的多个导电部10；连接半导体元件30的电极30a和导电部10的金属丝3；以及至少将半导体元件30、导电部10以及金属丝3密封的密封树脂40。
其中导电部10具有由铜或铜合金构成的金属箔1和设在该金属箔1上下两侧的导电部镀层2、2。另外，管芯垫20具有与导电部10下侧的导电部镀层2设在同一平面上的管芯垫镀层2b，该管芯垫镀层2b上装载半导体元件30。
就是说，管芯垫20具有其内部形成装入半导体元件30的凹部22的坝部21，坝部21具有与导电部10的金属箔1设在同一平面的金属箔1a和设在金属箔1a上下两侧的与导电部10的导电部镀层2、2同一平面的镀层2a、2a。
导电部10的金属箔1如上所述，由铜或铜合金构成，坝部21的金属箔1a由与导电部10的金属箔1相同的材料构成。
另外，坝部21的上下两侧的镀层2a、2a，由与导电部10上下两侧的导电部镀层2、2相同的材料构成。
这样，管芯垫20坝部21的层结构2a、1a、2a，也就与导电部10的层结构2、1、2大致相同。
另外，管芯垫20的坝部21的下侧镀层2a，与管芯垫镀层2b一体地形成。
半导体元件30，装入被管芯垫20坝部21包围的凹部22内，半导体元件30的电极30a用金属丝3在电气上和导电部10上侧的导电部镀层2连接，半导体元件30的电极30a用金属丝(追加金属丝)4在电气上和管芯垫20的坝部21上侧的镀层2a连接，进行接地焊接。
另外，半导体元件30、导电部10和金属丝3、4用密封树脂40密封。管芯垫20的管芯垫镀层2b、坝部21下侧的镀层2a和导电部10下侧的导电部镀层2，从密封树脂40向外露出其底面，同时管芯垫20的管芯垫镀层2b、坝部21下侧的镀层2a和导电部10下侧的导电部镀层2，从密封树脂40只突出其厚度。
再有，导电部10上下两侧的导电部镀层2、2、坝部21上下两侧的镀层2a、2a以及管芯垫镀层2b，都具有包含贵金属镀层的多层结构。
该无引线结构的半导体装置P，在半导体元件30下面，只存在管芯垫镀层2b，故可提供可薄型化的、高可靠性的半导体装置。然后，如图所示，导电部10及管芯垫20的坝部21，中央的金属箔1，1a相对于导电部镀层2和镀层2a成细腰状，同时导电部镀层2及镀层2a成为突出状态。该突出的部分2、2a起到在密封树脂40中的锚固效果，所以导电部10及管芯垫20与密封树脂40的接合强度高。另外，导电部10的导电部镀层2、管芯垫20的坝部21的镀层2a以及管芯垫镀层2b，处于从背面侧突出的状态，就是说，由于变为确保Stand off的状态，半导体装置P安装时，可以防止安装基板上的凹凸和异物造成的导电部(端子)上浮，提高安装的可靠性。另外，还有防止因焊锡膏挤出而造成短路的效果。
图3(a)-(d)是表示在图1所示的半导体装置的制造方法的工序图，以下参照这些图说明制造顺序。
首先，如图3(a)所示，准备具有基材层51和设在基材层51上的粘接剂层52的粘接板50，在该粘接板50中的粘接剂层52上形成多个导电部10，以及具有形成了凹部22的坝部21的管芯垫20，制作基板B。如图所示，导电部10及管芯垫20的坝部21，上下具有各自突出的部分2、2a，关于形成这样的导电部10和管芯垫20的基板制作工序将后述。
接着，如图3(b)所示，将半导体元件30设置在管芯垫20的凹部22内，用银浆、管芯粘附薄膜等商售管芯粘附材料将半导体元件30固定在管芯垫20的管芯垫镀层2b上之后，用金属丝4对坝部21的上面和半导体元件30的电极30a进行接地焊接，用金属丝3在电气上连接导电部10的上面和半导体元件30的电极30a。这样，半导体元件30固定在管芯垫镀层2b上，所以与传统的半导体装置比较，可以实现100～200微米厚的薄型化。
接着，如图3(c)所示，用密封树脂40密封半导体元件30、金属丝3、4、导电部10及管芯垫20，在粘接板50上形成半导体装置。密封树脂40的密封，用通常的传递模塑法使用金属模具进行。模塑时，在管芯垫20的凹部22中为了改善密封树脂40的流动，在坝部21中宜设置像图2所示的通路21a。具体地说，像图4(a)那样，对于传递树脂的流动方向X的直角方向的坝部21上设置通路21a，或者像图4(b)那样除去直角方向的坝部21本身，或者像图4(c)那样在流动方向X和直角方向两方面的坝部21设置多个通路21a，从而可以改善密封树脂40的流动。在这些图4(a)～(c)中，右侧和下侧的图表示从各自的方向看的侧面图。再有，在模塑后，根据需要对密封树脂40进行后固化加热。后固化加热可以在粘接板50的分离之前，也可以在其之后进行。接着，如图3(d)所示，将粘接板50从密封树脂40分离，得到在图1所示的半导体装置P。
上述的基板制作工序，也就是在粘接板50中粘接剂层52上形成多个导电部10和管芯垫20的顺序如图5(a)-(e)所示。这些工序说明如下。
作为导电部及管芯垫的原料，准备由铜或铜合金构成的金属箔。作为该金属箔60，从强度上考虑，使用0.01～0.1Mm的厚度。然后，首先在金属箔的两面粘贴干膜抗蚀剂，如图5(a)所示，用光刻法以与导电部及管芯垫的形状相反的图案，分别使金属箔60两面的干膜抗蚀剂61形成图案。
接着，如图5(b)所示，以干膜抗蚀剂61为掩模，在与导电部10对应的金属箔60的上下两侧设置部分镀层62，另外，在对应于管芯垫形状的金属箔60上下两侧设置部分镀层62，如图5(c)所示，除去干膜抗蚀剂61。该部分镀层62，如图6放大所示那样，由具有作为铜扩散阻挡层63的镍镀膜和设置该扩散阻挡层63上的贵金属镀层64的多层结构构成。这里，作为用于贵金属镀层64的贵金属至少为Au、Ag、Pt、Pd中的任何一种。再有，贵金属镀层64可以构成为1层，也可以构成为2层以上。
作为部分镀层62的具体例，可以举出在作为扩散阻挡层63的镀膜厚5微米的镍镀膜上，重叠作为贵金属镀层64的镀膜厚0.1微米的钯镀膜、镀膜厚0.05微米的金镀层而形成的形态。当然，不限于此，可以根据制造的半导体装置的要求而形成各种各样的组合和厚度，但是作为部分镀层62的总厚度宜为0.1～50μm左右。
接着，如图5(d)所示，一边将对应于导电部10及管芯垫20在其表面和背面部分地形成了部分镀层62的金属箔60加压贴在粘接板50的粘接剂层52侧，使之处于将部分镀层62埋入粘接剂层52的状态。然后，在该贴合的状态下，如图5(e)所示，以部分镀层62为抗蚀剂，蚀刻金属箔60，形成由金属箔1和设在该金属箔1上下两侧的导电部镀层2、2构成的导电部10、由金属箔1a和设在该金属箔1a上下两侧的导电部镀层2a、2a构成的坝部21和管芯垫镀层2b的管芯垫20。在这种情况下，由于金属箔60的侧面也被蚀刻，形成如图所示的设置了由金属箔60上下的部分镀层62构成的突出部分的形状。在这样结束了金属箔60的蚀刻工序后，用冲压机加工等切割手段进行粘接板50的外形加工，得到半导体装置制造用基板B。
图7是以纵剖面表示本发明的另一例半导体装置的概要结构图。图7所示的半导体装置P，与图1的半导体装置P相比，省略了管芯垫20的坝部21，接地焊接4或电源焊接3连接到独立于管芯垫20的导电部10。采用这样的结构，也可以提供与图1半导体装置P相同的可薄型化且可靠性高的半导体装置。
再有，本发明的半导体装置制造方法是实用的，可集合多个半导体装置一起制造。图8表示其示例。图8是示意表示半导体装置制造用基板B的平面图的说明图，在粘接板50上面将1个管芯垫20和在其周围形成的导电部10作为1个块70表示，该块70可以多个地形成棋盘状。在图8中，例如，粘接板50的宽度(W)为65mm，经过预定的工序在粘接板50上形成多个块70，制作连续的成卷基材。这样得到的宽度65mm的半导体装置制造用基板B，在下一道半导体元件装载工序中适当切割成树脂密封工序所需的块数使用。这样，在多个半导体元件一起进行树脂密封时，树脂密封后与粘接板分离后，用切片机或冲压机切割成预定的尺寸，进行单片化，于是得到半导体装置。
用于本发明的半导体装置制造方法的粘接板50，最好用到完成树脂密封工序为止，可靠地固定半导体元件30和导电部20，且在从半导体装置P分离时可容易剥离。这样的粘接板50，具有如上所述的基材层51和粘接剂层52。对于基材层51的厚度并无特别限制，但通常为12～200μm左右，最好为50～150μm。另外，对粘接剂层52的厚度也无特别限制，但通常是1～50μm左右，最好是5～20μm。
另外，作为粘接板50，基材层51在200℃下的弹性模量是1.0GPa以上，最好使用200℃下弹性模量为0.1MPa以上的粘接剂层52。另外，弹性模量的测定采用在实施例中详细记载的方法。
在进行金属丝焊接等的半导体元件装载工序中，温度大致为150～200℃左右的高温条件。因此，在粘接板50的基材层51及粘接剂层52中要求能耐受这些的耐热性。基于这样的观点，作为基材层51，适合采用200℃下1.0GPa以上的弹性模量，优选10Gpa以上。基材层51的弹性模量通常优选1.0GPa～1000GPa左右。另外，作为粘接剂层52，适合采用0.1MPa以上的弹性模量，优选0.5MPa以上，更优选1MPa以上。粘接剂层52的弹性模量，通常最好是0.1～100MPa左右。具有这样的弹性模量的粘接剂层52，在半导体元件装载工序等不易软化、流动，可较稳定地接线。
另外，通过采用弹性模量高的粘接剂层52，经图5(d)所示的工序加压粘贴，将导电部镀层62的部分埋入粘接剂层52，在图3(d)所示的最终阶段，在导电部10和管芯垫20的下侧，可设置成导电部镀层2、镀层2a及管芯垫镀层2b从密封树脂40的表面突出的被称为Standoff的状态，具有提高半导体装置安装时的可靠性的效果。
粘接板50的基材层51可以是有机物，也可以是无机物，考虑到搬运时的操作性、模塑时的翘曲等，最好使用金属箔。作为这样的金属箔，可以举出SUS箔、Ni箔、Al箔、铜箔、铜合金箔等，但是从可以廉价获得和种类丰富考虑，最好选择铜、铜合金。另外，作为这样的基材层51的金属箔，为了确保与粘接剂层52的锚固性，最好进行单面粗糙化处理。作为粗糙化处理的方法，可以采用公知的喷砂等物理粗糙化方法或者蚀刻、镀膜等化学粗糙化方法中的任意一种。
作为形成粘接板50粘接剂层52的粘接剂，没有特别限制，但是最好使用环氧树脂、环氧固化剂、含有弹性体的热固化性粘接剂。在热固化性粘接剂的情况下，通常在使基材贴合而未固化的所谓B阶段状态下，就是说，可以用150℃以下的较低温度下进行贴合，并在贴合后固化，从而可以提高弹性模量并改善耐热性。
作为环氧树脂，可以举出环氧缩水甘油胺型环氧树脂、双酚F型环氧树脂、双酚A型环氧树脂、线型酚醛型环氧树脂、甲酚-线型型环氧树脂、联苯型环氧树脂、萘型环氧树脂、脂肪族环氧树脂、脂环族环氧树脂、杂环环氧树脂、含有螺环的环氧树脂、卤素化环氧树脂等，它们可以单独或2种以上混合使用。作为环氧固化剂，可以举出各种咪唑系化合物及其衍生物、胺系化合物、双氰胺、联氨化合物、酚醛树脂等，它们可以单独或2种以上混合使用。另外，作为弹性体，可以举出丙烯树脂、丙烯腈-丁二烯共聚物、苯氧基树脂、聚酰胺树脂等，它们可以淡独或2种以上混合使用。
另外，粘接剂层52对试验用金属箔的粘结力宜为0.1～15N/20mm。最好是0.3～15N/20mm。在这里，粘结力可以按导电部的大小在上述范围内适当选择。就是说，导电部的尺寸大时，粘结力比较小，导电部的尺寸小时粘结力最好设定得大。具有该粘结力的粘接板，具有适度的粘结力，在基板制作工序～半导体元件装载工序中固定在粘接剂层的导电部不易发生偏移。此外在片分离工序中，粘接板从半导体装置分离性良好，可以减小对半导体装置的损坏。另外，粘结力的测定采用在实施例中详细记载的方法。
在粘接板50中，可以根据需要赋予防静电功能。赋予粘接板50防静电功能时，有将静电防止剂、导电性填充料混合在粘接剂层中的方法。另外，还有在基材层51和粘接剂层52的界面和在基材层51的底面涂敷静电防止剂的方法。通过赋予该防静电功能，可以抑制粘接板从半导体装置分离时发生的静电。
作为静电防止剂，只要是具有防静电功能的，没有特别限制。作为具体的示例，例如，可以使用丙烯系两性、丙烯系阴离子、无水马来酸-乙烯系阳离子等表面活性剂等。作为防静电层用的材料，具体地说，可以举出ボンデイツプPA、ボンデイツプPX、ボンデイツプP(コニシ社制)等材料。另外，作为导电性填充料，可使用常用的例如Ni、Fe、Cr、Co、Al、Sb、Mo、Cu、Ag、Pt、Au等金属以及它们的合金或氧化物、炭黑等石墨等。它们可以单独或2种以上组合使用。导电性填充料也可以是粉状、纤维状中的任何一种。其他，可以在粘接板中添加防老化剂、颜料、增塑剂、填充剂、粘性附加剂等公知的各种添加物。
实施例1
粘接板的制作
双酚A型环氧树脂(Japan epoxy resin Co.制，环氧树脂1002)100份重量、丙烯腈丁二烯共聚物(日本ゼオン社制，ニツポ—ル1072J)35份重量、酚醛树脂(荒川化学社制，P-180)4份重量、咪唑(四国フアイン社制，C11Z)2份重量，溶解于350份重量的甲基乙基酮，得到粘接剂溶液。在厚度为100μm的单面粗糙化的铜合金箔51(ジヤパンエナジ—社制，BHY-13B-7025)上涂敷后，在150℃下干燥3分钟，从而形成厚度15μm的粘接剂层，得到粘接板50。该粘接板50上的粘接剂层52的固化前在100℃下的弹性模量为2.5×10-3Pa，固化后在200℃下弹性模量为4.3MPa，对铜箔的粘结力为12N/20mm。另外，用作基材层51的铜箔在200℃下的弹性模量为130GPa。
半导体装置制造用基板的制作
首先，在厚度为40μm的铜箔(Olin7025)60的两面上层压干膜抗蚀剂61(东京応化制，オ—デイルAR330)。然后，用光刻法使干膜抗蚀剂形成与导电部和管芯垫相反的图案。接着，以形成了图案的干膜抗蚀剂作为掩模，依次在铜箔两面上施加镍镀膜和Au镀膜，形成导电部镀层62后，除去干膜抗蚀剂。接着，经由粘接剂层52将部分地配置了镀镍层和Au镀层的层叠物的铜箔60一边加压一边贴附在粘接板50上。然后，充分加热加压，使镀膜部分和粘接剂层没有间隙。接着，在该贴附的状态下，以Au镀层为抗蚀剂蚀刻铜箔60而形成导电部10和管芯垫20。在该蚀刻加工时，也蚀刻铜箔60的侧面，从而在铜箔的上下设置由Au和镍构成的突出部分62。最后，用冲压机加工出粘接板的外形。
然后，按图8的示例(W为65mm)中所示的图案在粘接板50上形成导电部和管芯垫。在一个块70中，以图2所示的图案在粘接板50上形成导电部10和管芯垫20。
半导体元件的装载
将试验用的铝蒸镀硅芯片(6mm×6mm)30固定在上述粘接板50的管芯垫20的凹部22内。具体地说，用给料器将管芯粘附剂涂敷在管芯垫上之后，其上搭载硅芯片30，充分加压使管芯粘附剂中不残留气泡，之后在150℃下加热加压1小时。接着，采用直径为25μm的金丝，在硅芯片30的电极30a和管芯垫20的坝部21之间和硅芯片30的电极30a和导电部10之间进行焊接。
关于上述1个单元(4个×4个)的10单元，亦即，对160个铝蒸镀芯片进行金属丝焊接。金属丝焊接成功率为100％。接着，用传递成型模塑密封树脂40(日東電工制，HC-100)。树脂模塑后，在室温下剥离粘接板。另外，在175℃下5小时，在干燥机中进行后固化。其后，用切片机以1块为单位进行切割而得到半导体装置P。
用软X射线装置(Micro Focus X射线电视透视装置:島津制作所制，SMX-100))对该半导体装置P进行内部观察的结果是，确认得到了导电部10和密封树脂的接合强度非常高的半导体装置P，其中没有金属丝变形和芯片偏移等，而且导电部10的突出部分2处于埋入密封树脂中的状态。
再有，金属丝焊接条件、传递模塑条件、弹性模量测定方法、粘结力测定方法、金属丝焊接成功率如下。
金属丝焊接条件
装置:株式会社新川制「UTC-300BI SUPER」
超声波频率:115KHz
超声波输出时间:15毫秒
超声波输出:120mW
焊接载荷:1018N
搜索载荷:1037N
传递模塑条件
装置:TOWA成型机
成型温度:175℃
时间:90秒
夹紧压力:200KN
传递速度:3mm/秒
传递压:5KN
弹性模量测定方法
基材层、粘接剂层均采用:
测评仪器シオメトリツクス社制的粘弹性频谱仪「ARES」
升温速度:5℃/min
频率:1Hz
测定方式:张拉方式
粘结力测定方法
宽度20mm，长度50mm的粘接板50在120℃×0.5MPa×0.5m/min的条件下，在35μm铜箔(ジヤパンエナジ—制，C7025)上层压后，在150℃的热风炉中放置1小时后，在温度23℃、湿度65％RH的气氛条件下，张拉速度300mm/min，在180°方向张拉35μm铜箔，以其中心值作为接合强度。
金属丝焊接成功率
用株式会社レスカ制的焊接测试机「PTR-30」，在测定方式:张拉试验、测定速度:0.5mm/sec下测定金属丝焊接的张拉强度。张拉强度在0.04N以上时设为成功，小于0.04N时设为失败。金属丝焊接成功率是从它们的测定结果算出的成功比率。
实施例2
在实施例1中，除使用18μm铜-镍合金箔(ジヤパンエナジ—制，C7025)作为金属箔外，其余与实施例1相同，制造半导体装置。金属丝焊接成功率为100％。对半导体装置内部进行观察的结果是，确认得到了没有金属丝变形和芯片偏移，导电部和密封树脂的接合强度非常高的半导体装置。
以上就本发明的实施例进行了详细说明，但是按照本发明的半导体装置及其制造方法不受上述实施例中的任何限定，在不脱离本发明意图的范围内显然可以作出各种改变。

Claims (14)

1.一种半导体装置，其特征在于，
设有:管芯垫；
装载在管芯垫上并具有电极的半导体元件；
配置在管芯垫周围的多个导电部；
将半导体元件的电极与导电部连接的金属丝；以及
至少将半导体元件、导电部及金属丝密封的密封树脂，
导电部具有金属箔和设在金属箔上下两侧的导电部镀层，
管芯垫是由与导电部下侧导电部镀层设在同一平面的管芯垫镀层构成，
导电部下侧的导电部镀层和管芯垫的管芯垫镀层的背面露出于密封树脂之外。
2.权利要求1记载的半导体装置，其特征在于，管芯垫具有在内部形成凹部的坝部，该坝部具有分别与导电部的金属箔和上下两侧的导电部镀层设在同一平面的金属箔和上下两侧的镀层，同时坝部下侧的镀层与管芯垫镀层一体地形成，
半导体元件配置在坝部的凹部内，用增补金属丝连接半导体元件的电极和坝部。
3.权利要求2记载的半导体装置，其特征在于，半导体元件的电极，用金属丝与导电部的上侧的导电部镀层连接，并用增补金属丝与坝部上侧的镀层连接。
4.权利要求2记载的半导体装置，其特征在于，导电部上下两侧的导电部镀层，具有包含各贵金属镀层的多层构造。
5.权利要求2记载的半导体装置，其特征在于，导电部及坝部中央的金属箔，相对于上下两侧的导电部镀层成细腰状。
6.权利要求2记载的半导体装置，其特征在于，导电部下侧的导电部镀层、坝部下侧的镀层和管芯垫镀层均从密封树脂向外突出。
7.权利要求2记载的半导体装置，其特征在于，坝部中设有密封树脂通过用的通路。
8.一种半导体装置制造用基板，其特征在于，
在制造半导体装置用的半导体装置制造用基板中设有:
具有基材层和基材层上的粘接剂层的粘接板；以及
设在粘接板的粘接剂层上的管芯垫及配置在管芯垫周围的多个导电部，
导电部具有金属箔和设在金属箔上下两侧的导电部镀层，
管芯垫具有与导电部下侧的导电部镀层设在同一平面的管芯垫镀层。
9.权利要求8记载的半导体装置制造用基板，其特征在于，
管芯垫具有内部形成凹部的坝部，该坝部具有分别与导电部的金属箔和上下两侧的导电部镀层设在同一平面的金属箔和上下两侧的镀层，
坝部的凹部是半导体元件用的凹部。
10.权利要求9记载的半导体装置制造用基板，其特征在于，导电部上下两侧的导电部镀层，具有包含各贵金属镀层的多层构造。
11.权利要求9记载的半导体装置制造用基板，其特征在于，导电部及坝部中央的金属箔，相对于上下两侧的导电部镀层成细腰状。
12.权利要求9记载的半导体装置制造用基板，其特征在于，坝部中设有密封树脂通过用的通路。
13.权利要求8记载的半导体装置制造用基板，其特征在于，粘接板的基材层为金属制。
14.一种半导体装置用基板的制造方法，其特征在于，
在半导体装置制造用基板的制造方法中设有以下工序:
准备金属箔的工序；
在金属箔的对应于导电部的部分和金属箔的对应于管芯垫的部分，各自设置部分镀层的工序；
将设置了部分镀层的金属箔下侧贴附在具有基材层和粘接剂层的粘接板的粘接剂层侧的工序；
以部分镀层作为抗蚀剂来蚀刻金属箔，从而形成具有设在金属箔的上下两侧的导电部镀层的导电部，同时形成具有与导电部下侧的导电部镀层设在同一平面上的管芯垫镀层的管芯垫的工序；以及
对粘接板进行加工来确定粘接板外形的工序。
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