JP4818109B2 - 半導体装置及び半導体装置製造用基板並びに半導体装置製造用基板の製造方法 - Google Patents
半導体装置及び半導体装置製造用基板並びに半導体装置製造用基板の製造方法 Download PDFInfo
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- JP4818109B2 JP4818109B2 JP2006519632A JP2006519632A JP4818109B2 JP 4818109 B2 JP4818109 B2 JP 4818109B2 JP 2006519632 A JP2006519632 A JP 2006519632A JP 2006519632 A JP2006519632 A JP 2006519632A JP 4818109 B2 JP4818109 B2 JP 4818109B2
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Description
[図2]図2は、図1の半導体装置をそのワイヤーを省略して透視状態で平面的に示した説明図である。
[図3]図3(a)−(d)は、図1に示した半導体装置の製造方法を示す工程図である。
[図4]図4(a)−(c)は、ダイパッドの土手部に通路を設ける場合を例示した説明図である。
[図5]図5(a)−(e)は、基板作成の手順を示す工程図である。
[図6]図6は、図5(b)の一部拡大図である。
[図7]図7は、本発明に係る半導体装置の別の例を縦断面で示す概略構成図である。
[図8]図8は、本発明の半導体装置の製造方法における基板作成工程で接着シートに導電部形成した状態の上面図である。
[図9]図9(a)(b)は、リードレス構造をした従来の半導体装置の一例を示す説明図である。
[図10]図10(a)(b)は、リードレス構造をした従来の半導体装置の別の例を示す説明図である。
ビスフェノールA型エポキシ樹脂(ジャパンエポキシレジン社製「エビコート1002」)100重量部、アクリロニトリルブタジエン共重合体(日本ゼオン社製「ニッポール1072J」)35重量部、フェノール樹脂(荒川化学社製「P−180」)4重量部、イミダゾール(四国ファイン社製「C11Z」)2重量部を、メチルエチルケトン350重量部に溶解し、接着剤溶液を得た。これを厚さ100μmの片面粗化銅合金箔51(ジャパンエナジー社製「BHY−13B−7025」)に塗布した後、150℃で3分間乾燥させることにより、厚さ15μmの接着剤層52を形成した接着シート50を得た。この接着シート50における接着剤層52の硬化前の100℃での弾性率は2.5×10−3Paであり、硬化後の200℃での弾性率は4.3MPaであり、銅箔に対する接着力は12N/20mmであった。なお、基材層51として用いた銅箔の200℃での弾性率は130GPaであった。
まず、厚さ40μmの銅箔(「Olin7025」)60の両面にドライフィルムレジスト61(東京応化製「オーディルAR330」)をラミネートした。そして、そのドライフィルムレジストをフォトリソグラフィー法により導電部及びダイパッドとは逆のパターンでパターニングした。次いで、パターニングされたドライフィルムレジストをマスクとして、銅箔の両面にニッケルめっきとAuめっきを順次施して部分めっき層62を形成した後、ドライフィルムレジストを除去した。続いて、ニッケルめっき層とAuめっき層の積層物が部分的に配された銅箔60を接着シート50に接着剤層52を介して加圧しながら貼り付けた。そして、めっき部と接着剤層の隙間がなくなるように十分に加熱加圧した。次いで、この貼り付け状態で、Auめっき層をレジストとして銅箔60をエッチングし導電部10及びダイパッド20を形成した。このエッチング加工に際して、銅箔60の側面をもエッチングすることにより、銅箔の上下にAuとニッケルからなる張出部分62を設けた。最後に、プレス加工により接着シートの外形を加工した。
試験用のアルミ蒸着シリコンチップ(6mm×6mm)30を、前記接着シート50におけるダイパッド20の凹部22内に固着した。具体的には、ダイアタッチ剤をディスペンサーにてダイパッド上に塗布した後、その上にシリコンチップ30を搭載し、ダイアタッチ剤内に気泡が残存しないよう十分に押し付けた後、150℃で1時間加熱加圧した。次いで、直径25μmの金ワイヤー30を用いて、シリコンチップ30の電極30aとダイパッド20の土手部21との問およびシリコンチップ30の電極30aと導電部10との間をボンディングした。
装置:株式会社新川製「UTC−300BI SUPER」
超音波周波数:115KHz
超音波出力時間:15ミリ秒
超音波出力:120mW
ボンド荷重:1018N
サーチ荷重:1037N
装置:TOWA成形機
成形温度:175℃
時間:90秒
クランプ圧力:200KN
トランスファースピード:3mm/秒
トランスファー圧:5KN
基材層、接着剤層のいずれも
評価機器:レオメトリックス社製の粘弾性スペクトルメータ「ARES」
昇温速度:5℃/min
周波数:1HZ
測定モード:引張モード
幅20mm、長さ50mmの接着シート50を、120℃×0.5MPa×0.5m/minの条件で、35μm銅箔(ジャパンエナジー製「C7025」)にラミネートした後、150℃の熱風オーブンにて1時間放置後、温度23℃、湿度65%RHの雰囲気条件で、引張り速度300mm/min、180°方向に35μm銅箔を引張り、その中心値を接着強度とした。
ワイヤーボンドのプル強度を、株式会社レスカ製のボンディングテスタ「PTR−30」を用い、測定モード:プルテスト、測定スピード:0.5mm/secで測定した。プル強度が0.04N以上の場合を成功、0.04Nより小さい場合を失敗とした。ワイヤーボンド成功率は、これらの測定結果から成功の割合を算出した値である。
Claims (14)
- ダイパッドと、
電極を有する半導体素子と、
ダイパッドの周囲に配置された複数の導電部と、
半導体素子の電極と導電部とを接続するワイヤーと、
少なくとも半導体素子、導電部、およびワイヤーを封止する封止樹脂とを備え、
導電部は金属箔と、金属箔の上下両側に設けられた導電部めっき層とを有し、
ダイパッドは導電部の下側の導電部めっき層と同一平面に設けられたダイパッドめっき層を有し、
半導体素子はダイパッドのダイパッドめっき層上に搭載され、
導電部の下側の導電部めっき層とダイパッドのダイパッドめっき層は、その裏面が封止樹脂の外方へ露出していることを特徴とする半導体装置。 - ダイパッドは内部に凹部を形成する土手部を有し、この土手部は導電部の金属箔および上下両側の導電部めっき層と各々同一平面に設けられた金属箔および上下両側のめっき層を有するとともに、土手部の下側のめっき層はダイパッドめっき層に一体に形成され、
半導体素子は土手部の凹部内に配置され、半導体素子の電極と土手部とが追加ワイヤーにより接続されていることを特徴とする請求項1記載の半導体装置。 - 半導体素子の電極は、ワイヤーにより導電部の上側の導電部めっき層と接続され、かつ追加ワイヤーにより土手部の上側のめっき層と接続されていることを特徴とする請求項2記載の半導体装置。
- 導電部の上下両側の導電部めっき層は、各々貴金属めっき層を含む多層構成を有していることを特徴とする請求項2記載の半導体装置。
- 導電部および土手部の中央の金属箔は、上下両側の導電部めっき層に対してくびれていることを特徴とする請求項2記載の半導体装置。
- 導電部の下側の導電部めっき層と、土手部の下側のめっき層と、ダイパッドめっき層は、いずれも封止樹脂から外方へ突出していることを特徴とする請求項2記載の半導体装置。
- 土手部に封止樹脂通過用の通路を設けたことを特徴とする請求項2記載の半導体装置。
- 半導体装置を製造するための半導体装置製造用基板において、
基材層と、基材層上の接着剤層とを有する接着シートと、
接着シートの接着剤層上に設けられたダイパッド、およびダイパッド周囲に配置された複数の導電部とを備え、
導電部は金属箔と、金属箔の上下両側に設けられた導電部めっき層とを有し、
ダイパッドは導電部の下側の導電部めっき層と同一平面に設けられた半導体素子搭載用のダイパッドめっき層を有することを特徴とする半導体装置製造用基板。 - ダイパッドは内部に凹部を形成する土手部を有し、この土手部は導電部の金属箔および上下両側の導電部めっき層と各々同一平面に設けられた金属箔および上下両側のめっき層を有し、
土手部の凹部は半導体素子用の凹部であることを特徴とする請求項8記載の半導体装置製造用基板。 - 導電部の上下両側の導電部めっき層は、各々貴金属めっき層を含む多層構成を有していることを特徴とする請求項9記載の半導体装置製造用基板。
- 導電部および土手部の中央の金属箔は、上下両側の導電部めっき層に対してくびれていることを特徴とする請求項9記載の半導体装置製造用基板。
- 土手部に封止樹脂通過用の通路を設けたことを特徴とする請求項9記載の半導体装置製造用基板。
- 接着シートの基材層は金属製となっていることを特徴とする請求項8記載の半導体装置製造用基板。
- 半導体装置製造用基板の製造方法において、
金属箔を準備する工程と、
金属箔の導電部に対応する部分と、金属箔のダイパッドに対応する部分に各々部分めっき層を設ける工程と、
部分めっき層が設けられた金属箔の下側を、基材層と接着剤層とを有する接着シートの接着剤層側に貼り付ける工程と、
部分めっき層をレジストとして金属箔をエッチングすることにより、金属箔と、金属箔の上下両側に設けられた導電部めっき層とを有する導電部を形成するとともに、導電部の下側の導電部めっき層と同一平面に設けられた半導体素子搭載用のダイパッドめっき層を有するダイパッドを形成する工程と、
接着シートを加工して接着シートの外形を定める工程と、を備えたことを特徴とする半導体装置用基板の製造方法。
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DE112005001661T5 (de) * | 2004-07-15 | 2007-05-31 | Dai Nippon Printing Co., Ltd. | Halbleitervorrichtung, Substrat zum Herstellen einer Halbleitervorrichtung und Verfahren zum Herstellen derselben |
DE102006037538B4 (de) * | 2006-08-10 | 2016-03-10 | Infineon Technologies Ag | Elektronisches Bauteil, elektronischer Bauteilstapel und Verfahren zu deren Herstellung sowie Verwendung einer Kügelchenplatziermaschine zur Durchführung eines Verfahrens zum Herstellen eines elektronischen Bauteils bzw. Bauteilstapels |
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JP5131206B2 (ja) * | 2009-01-13 | 2013-01-30 | セイコーエプソン株式会社 | 半導体装置 |
JP5195647B2 (ja) * | 2009-06-01 | 2013-05-08 | セイコーエプソン株式会社 | リードフレームの製造方法及び半導体装置の製造方法 |
MY171813A (en) * | 2009-11-13 | 2019-10-31 | Semiconductor Components Ind Llc | Electronic device including a packaging substrate having a trench |
JP5144634B2 (ja) * | 2009-12-22 | 2013-02-13 | 日東電工株式会社 | 基板レス半導体パッケージ製造用耐熱性粘着シート、及びその粘着シートを用いる基板レス半導体パッケージ製造方法 |
TW201351515A (zh) * | 2012-06-07 | 2013-12-16 | Subtron Technology Co Ltd | 封裝載板及其製作方法 |
JP2014203861A (ja) * | 2013-04-02 | 2014-10-27 | 三菱電機株式会社 | 半導体装置および半導体モジュール |
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JP2001110945A (ja) * | 1999-09-07 | 2001-04-20 | Motorola Inc | 半導体素子および半導体素子の製造・パッケージング方法 |
JP2001244385A (ja) * | 1999-12-24 | 2001-09-07 | Dainippon Printing Co Ltd | 半導体搭載用部材およびその製造方法 |
JP2004119726A (ja) * | 2002-09-26 | 2004-04-15 | Sanyo Electric Co Ltd | 回路装置の製造方法 |
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CN1998076A (zh) | 2007-07-11 |
DE112005001681T5 (de) | 2007-06-06 |
CN100466237C (zh) | 2009-03-04 |
KR100881476B1 (ko) | 2009-02-05 |
JPWO2006009029A1 (ja) | 2008-05-01 |
TWI354354B (ja) | 2011-12-11 |
US20110291303A1 (en) | 2011-12-01 |
WO2006009029A1 (ja) | 2006-01-26 |
US20070241445A1 (en) | 2007-10-18 |
US8018044B2 (en) | 2011-09-13 |
KR20070032702A (ko) | 2007-03-22 |
TW200618212A (en) | 2006-06-01 |
US8525351B2 (en) | 2013-09-03 |
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