WO2017195517A1 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
WO2017195517A1
WO2017195517A1 PCT/JP2017/014680 JP2017014680W WO2017195517A1 WO 2017195517 A1 WO2017195517 A1 WO 2017195517A1 JP 2017014680 W JP2017014680 W JP 2017014680W WO 2017195517 A1 WO2017195517 A1 WO 2017195517A1
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Prior art keywords
connection
semiconductor
semiconductor device
manufacturing
adhesive
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PCT/JP2017/014680
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English (en)
French (fr)
Inventor
一尊 本田
幸一 茶花
慎 佐藤
永井　朗
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日立化成株式会社
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Application filed by 日立化成株式会社 filed Critical 日立化成株式会社
Priority to SG11201809734RA priority Critical patent/SG11201809734RA/en
Priority to KR1020187031285A priority patent/KR102190177B1/ko
Priority to US16/099,753 priority patent/US10734350B2/en
Priority to JP2018516901A priority patent/JP6477971B2/ja
Priority to CN201780028064.4A priority patent/CN109075088B/zh
Publication of WO2017195517A1 publication Critical patent/WO2017195517A1/ja

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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
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    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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Definitions

  • the present invention relates to a method for manufacturing a semiconductor device.
  • FC connection method in which conductive protrusions called bumps are formed on a semiconductor chip or substrate and the semiconductor chip and substrate are directly connected.
  • FC connection methods there are a method of metal bonding using solder, tin, gold, silver, copper, etc., a method of metal bonding by applying ultrasonic vibration, a method of maintaining mechanical contact by the shrinkage force of the resin, etc.
  • a method of metal bonding using solder, tin, gold, silver, copper or the like is common.
  • COB Chip On Board
  • BGA Bit Grid Array
  • CSP Chip Size Package
  • FC connection method is also widely used in a COC (Chip On Chip) type connection method in which bumps or wirings are formed on semiconductor chips and the semiconductor chips are connected to each other.
  • COC Chip On Chip
  • the package can be made smaller by arranging it in a three-dimensional shape instead of a flat shape, the above technology is frequently used, and it is also effective for improving semiconductor performance, reducing noise, reducing mounting area, and reducing power consumption. It is attracting attention as a wiring technology.
  • COW Chip On Wafer
  • a WOW Wafer On Wafer
  • a semiconductor chip or a semiconductor chip supplied with a semiconductor adhesive is picked up from a diced wafer with a collet and supplied to a crimping tool through the collet.
  • the chip-chip or chip-substrate is aligned and crimped.
  • the temperature of the crimping tool is raised so that the metal at one or more of the upper and lower or upper and lower connections reaches the melting point or higher so that a metal bond is formed.
  • chip stack packages that are stacked / multi-staged, chip pickup, alignment, and crimping are repeated.
  • a sealing body is formed by sealing the upper surface of the chip with a sealing resin.
  • warpage may occur in the semiconductor package after crimping due to a difference in thermal expansion coefficient between the chip and the semiconductor sealing material or between the chip and the substrate. This warpage causes problems that overmolding cannot be performed and package connection failure occurs.
  • the present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method for manufacturing a semiconductor device that can suppress warpage when semiconductor members are connected to each other.
  • the present invention is for solving the above-described problems, and provides a method for manufacturing a semiconductor device capable of suppressing warpage of the semiconductor device.
  • Crimping and obtaining a temporary connection body (B) a second step of sealing at least a part of the temporary connection body using a sealing resin to obtain a sealed temporary connection body; (C) A third step of heating the sealed temporary connection body at a temperature equal to or higher than the melting point of the metal of the connection portion to obtain the sealed connection body, and a method for manufacturing a semiconductor device.
  • a semiconductor device including a semiconductor chip having a connection portion and a printed circuit board having a connection portion, and each connection portion being electrically connected to each other via a connection bump, or a plurality of semiconductor chips having connection portions Each of the connection portions is electrically connected to each other via a connection bump, wherein the connection portion and the connection bump are made of metal, (A) Each connection part comes into contact with the connection bump at a temperature lower than the melting point of the metal of the connection bump, with the semiconductor chip and the printed circuit board or between the semiconductor chips interposed, with a semiconductor adhesive interposed therebetween.
  • first step to obtain a temporary connection body (B) a second step of sealing at least a part of the temporary connection body using a sealing resin to obtain a sealed temporary connection body; (C) A third step of heating the sealed temporary connection body at a temperature equal to or higher than the melting point of the metal of the connection bump to obtain the sealed connection body, and a method for manufacturing a semiconductor device.
  • the semiconductor device and the printed circuit board, or the semiconductor chip are bonded by heating and pressing by sandwiching the semiconductor chips between a pair of opposing pressure bonding members.
  • the semiconductor adhesive contains a compound having a weight average molecular weight of 10,000 or less and a curing agent, and has a melt viscosity at 80 to 130 ° C. of 6000 Pa ⁇ s or less.
  • the high molecular weight component is a component having a weight average molecular weight of 30,000 or more and a glass transition temperature of 100 ° C. or less.
  • the present invention it is possible to provide a method for manufacturing a semiconductor device that can suppress warpage when semiconductor members are connected to each other. That is, as described above, heat treatment is performed at a temperature higher than the melting point of the metal such as the connection portion, and the semiconductor chip is sealed with a resin and a sealing body is formed before the step of forming the metal bond. Can be suppressed.
  • 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device.
  • 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device.
  • 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device.
  • 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device. It is process drawing which shows an example of the process of temporarily crimping
  • a chip, a substrate, and the like used in the semiconductor device manufacturing method of the present embodiment will be described below.
  • FIG. 1 shows a cross-sectional structure when a connection is made between a semiconductor chip and a substrate
  • FIG. 2 shows a cross-sectional structure when the connection is made between semiconductor chips.
  • FIG. 1 is a schematic cross-sectional view showing an embodiment of a semiconductor device.
  • a semiconductor device 100 shown in FIG. 1A includes a semiconductor chip 10 and a substrate (circuit wiring board) 20 that face each other, wiring 15 that is disposed on the mutually facing surfaces of the semiconductor chip 10 and the substrate 20, and a semiconductor chip. 10 and the connection bump 30 that connects the wiring 15 of the substrate 20 to each other, the adhesive layer 40 that is filled in the gap between the semiconductor chip 10 and the substrate 20 without any gap, and the connection portion of the semiconductor chip 10 and the substrate 20 are sealed. And a sealing resin 60.
  • the semiconductor chip 10 and the substrate 20 are flip-chip connected by wiring 15 and connection bumps 30.
  • the wiring 15 and the connection bump 30 are sealed by the adhesive layer 40 and are shielded from the external environment.
  • the semiconductor chip 10 and the adhesive layer 40 are sealed with a sealing resin 60 and are shielded from the external environment.
  • a semiconductor device 200 shown in FIG. 1B includes a semiconductor chip 10 and a substrate 20 that face each other, a bump 32 that is disposed on each surface of the semiconductor chip 10 and the substrate 20 that face each other, and a gap between the semiconductor chip 10 and the substrate 20. And an adhesive layer 40 filled with no gaps.
  • the semiconductor chip 10 and the substrate 20 are flip-chip connected by connecting opposing bumps 32 to each other.
  • the bump 32 is sealed by the adhesive layer 40 and is blocked from the external environment.
  • the semiconductor chip 10 and the adhesive layer 40 are sealed with a sealing resin 60 and are shielded from the external environment.
  • the adhesive layer 40 is a cured product of a semiconductor adhesive.
  • FIG. 2 is a schematic cross-sectional view showing another embodiment of the semiconductor device.
  • the semiconductor device 300 shown in FIG. 2A is the same as the semiconductor device 100 except that the two semiconductor chips 10 are flip-chip connected by the wiring 15 and the connection bump 30.
  • the semiconductor device 400 shown in FIG. 2B is the same as the semiconductor device 200 except that the two semiconductor chips 10 are flip-chip connected by the bumps 32.
  • the upper semiconductor chip 10 in the drawing has copper pillars and solder (solder bumps) as connection portions
  • the lower semiconductor chip 10 in the drawing has pads as connection portions.
  • An embodiment having (a gold plating in the connection part) is mentioned.
  • the main components are gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin) -Silver-copper, etc.), tin, nickel, etc. are used and may be composed of only a single component or a plurality of components. Moreover, you may form so that the structure where these metals were laminated
  • the bump may be formed on a semiconductor chip or a substrate.
  • the metal of the connection portion may include relatively inexpensive copper or solder. From the viewpoint of improving connection reliability and suppressing warpage, the metal of the connection portion may contain solder.
  • Gold, silver, copper, solder main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper, etc.
  • Tin, nickel or the like is used, and it may be composed of only a single component or a plurality of components. Moreover, you may form so that the structure where these metals were laminated
  • the pad may contain gold or solder from the viewpoint of connection reliability.
  • the main components are gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper, etc.) ),
  • a metal layer made of tin, nickel or the like may be formed, and this metal layer may be composed of a single component or a plurality of components.
  • the metal of the connection portion may include relatively inexpensive copper or solder. From the viewpoint of improving connection reliability and suppressing warpage, the metal of the connection portion may contain solder.
  • the semiconductor device is connected, for example, between the above-described bump-bump, bump-pad, and bump-wiring.
  • the metal at one of the connection portions has a melting point or higher.
  • the semiconductor chip 10 is not particularly limited, and various semiconductors such as elemental semiconductors such as silicon and germanium, and compound semiconductors such as gallium arsenide and indium phosphide can be used.
  • the substrate 20 is not particularly limited as long as it is a normal circuit substrate.
  • a wiring 15 (wiring) formed by etching away unnecessary portions of a metal film on an insulating substrate surface mainly composed of glass epoxy, polyimide, polyester, ceramic, epoxy resin, bismaleimide triazine or the like.
  • a circuit board having a pattern a circuit board on which the wiring 15 is formed by metal plating on the surface of the insulating substrate, a circuit board on which the wiring 15 is formed by printing a conductive material on the surface of the insulating substrate, and the like. Can do.
  • a plurality of structures (packages) as shown in the semiconductor devices 100 to 400 may be stacked.
  • the semiconductor devices 100 to 400 include gold, silver, copper, solder (main components are, for example, tin-silver, tin-lead, tin-bismuth, tin-copper, tin-silver-copper), tin, nickel, etc. May be electrically connected to each other by a bump or wiring including
  • FIG. 3 is a schematic cross-sectional view showing another embodiment of a semiconductor device, which is a semiconductor device using TSV technology.
  • the wiring 15 formed on the interposer 50 is connected to the wiring 15 of the semiconductor chip 10 via the connection bumps 30, so that the semiconductor chip 10 and the interposer 50 are flip-chip connected. ing.
  • the gap between the semiconductor chip 10 and the interposer 50 is filled with the adhesive layer 40 without any gap.
  • the semiconductor chip 10 On the surface of the semiconductor chip 10 opposite to the interposer 50, the semiconductor chip 10 is repeatedly stacked via the wiring 15, the connection bumps 30, and the adhesive layer 40.
  • the wiring 15 on the pattern surface on the front and back sides of the semiconductor chip 10 (excluding the outermost layer) is connected to each other by a through electrode 34 filled in a hole penetrating the inside of the semiconductor chip 10.
  • a through electrode 34 As the material of the through electrode 34, copper, aluminum, or the like can be used.
  • the laminated body composed of a plurality of semiconductor chips 10 is sealed with a sealing resin 60 and is cut off from the external environment.
  • Such a TSV technology makes it possible to acquire a signal from the back surface of a semiconductor chip that is not normally used. Furthermore, since the through electrode 34 passes vertically through the semiconductor chip 10, the distance between the semiconductor chips 10 facing each other and between the semiconductor chip 10 and the interposer 50 can be shortened and flexible connection is possible.
  • the semiconductor device manufacturing method of this embodiment can also be applied between the stacked chip and the interposer in such a TSV technology.
  • a semiconductor device 600 shown in FIG. 4 is the same as the semiconductor device 100 except that a plurality of semiconductor chips 10 are flip-chip connected to the substrate 20 by wirings 15 and connection bumps 30.
  • a semiconductor device 700 shown in FIG. 5 is the same as the semiconductor device 100 except that a plurality of semiconductor chips 10 are flip-chip connected to the interposer 50 by wirings 15 and connection bumps 30.
  • the semiconductor device manufacturing method of the first embodiment includes a semiconductor chip having a connection portion and a printed circuit board having a connection portion, and each connection portion is electrically connected to each other via a connection bump, Alternatively, a semiconductor device manufacturing method comprising a plurality of semiconductor chips having connection portions, each connection portion being electrically connected to each other via connection bumps, wherein the connection bumps are made of metal, (A) Each connection part comes into contact with the connection bump at a temperature lower than the melting point of the metal of the connection bump, with the semiconductor chip and the printed circuit board or between the semiconductor chips interposed, with a semiconductor adhesive interposed therebetween.
  • first step to obtain a temporary connection body (B) a second step of sealing at least a part of the temporary connection body using a sealing resin to obtain a sealed temporary connection body; (C) heating the sealed temporary connection body at a temperature equal to or higher than the melting point of the metal of the connection bump to obtain a sealed connection body.
  • a film-like adhesive for semiconductor (hereinafter sometimes referred to as “film-like adhesive”) is stuck on the semiconductor chip 10.
  • the film adhesive can be applied by a hot press, roll lamination, vacuum lamination, or the like.
  • the supply area and thickness of the film adhesive are appropriately set according to the size of the semiconductor chip 10 and the substrate 20, the height of the connection bump 30, and the like.
  • the film adhesive may be affixed to the semiconductor chip 10, and after the film adhesive is affixed to the semiconductor wafer, the film adhesive is diced and separated into the semiconductor chips 10, thereby the semiconductor having the film adhesive affixed thereto.
  • Chip 10 may be fabricated.
  • connection bump 30 solder bump
  • the upper surface of one semiconductor chip 10 in the temporary connection body is sealed to obtain a sealed temporary connection body (second step).
  • the semiconductor chip 10 can be sealed with a compression molding machine, a transfer molding machine, or the like.
  • the sealed temporary connection body is heated so that a temperature equal to or higher than the melting point of the connection bump 30 is applied, and a metal bond is formed between the wiring 15 and the connection bump 30 to obtain a sealed connection body (third step).
  • the heat treatment can be performed by a thermocompression bonding machine, a reflow furnace, a pressure oven, or the like.
  • FIG. 6 is a process diagram showing an example of a process of temporarily press-bonding a substrate to a semiconductor chip.
  • the semiconductor chip body 12 and the semiconductor chip 10 having the wiring 15 and the connection bumps 30 are connected to the substrate body 22 and the substrate 20 having the wiring 15 as a connection portion.
  • the laminated body 3 is formed by stacking the adhesive layer 40 between them.
  • the semiconductor chip 10 is picked up and transported to the substrate 20, and is aligned so that the connection bumps 30 and the wiring 15 of the substrate 20 are arranged to face each other.
  • the stacked body 3 is formed on a stage 42 of a pressing device 43 having a pressure-bonding head 41 and a stage 42 as a pair of provisional pressure-bonding pressing members arranged opposite to each other.
  • the connection bumps 30 are provided on the wiring 15 provided on the semiconductor chip body 12.
  • the wiring 15 of the substrate 20 is provided at a predetermined position on the substrate body 22.
  • Each of the connection bumps 30 and the wiring 15 has a surface formed of a metal material.
  • the laminate 3 is heated and pressed by being sandwiched between a stage 42 and a pressure-bonding head 41 as a temporary pressure-bonding pressing member, whereby the substrate 20 is applied to the semiconductor chip 10. Is temporarily crimped.
  • the crimping head 41 is disposed on the semiconductor chip 10 side of the stacked body 3
  • the stage 42 is disposed on the substrate 20 side of the stacked body 3.
  • the melting point of the metal material forming the surface of the connection bump 30 of the semiconductor chip 10 and the substrate 20 You may heat to the temperature lower than melting
  • the temperature at which the crimping tool (pressing member for temporary crimping) picks up the semiconductor chip 10 (with a film adhesive) (temperature of the pressing member) It is preferable that the temperature is low so as not to transfer to the chip 10 or the like.
  • the temperature at the time of temporary pressing (temperature of the pressing member) may be heated to a high temperature so as to increase the fluidity of the film adhesive and eliminate voids at the time of entrainment, but the reaction of the film adhesive starts It is preferable that the temperature is lower than the temperature.
  • the difference between the temperature at which the crimping tool picks up the semiconductor chip 10 and the temperature at the temporary crimping may be small.
  • the difference may be 100 ° C. or lower, or 60 ° C. or lower.
  • the temperature may be constant when picking up and during temporary bonding.
  • the reaction start temperature is On- when measured using DSC (manufactured by Perkin Elmer, DSC-Pyrs1) under the conditions of a sample amount of 10 mg, a heating rate of 10 ° C./min, and measurement atmosphere: air or nitrogen atmosphere. Refers to the set temperature.
  • the temperature of the stage 42 and / or the pressure-bonding head 41 is, for example, 30 ° C. or higher and 130 ° C. or lower during pick-up of the semiconductor chip, and is 50, for example, during heating and pressurization of the laminate 3 for temporary pressure bonding. It may be from 150 ° C to 150 ° C.
  • connection load in the first process depends on the number of bumps, but is set in consideration of absorption of bump height variation and control of bump deformation.
  • the void may be eliminated, and the load may be increased because the semiconductor chip 10 or the connection portion metal between the semiconductor chip 10 and the substrate 20 contacts the connection bump.
  • the load may be 0.009 N to 0.2 N per pin (one bump) of the semiconductor chip 10.
  • the crimping time required for temporary crimping may be set to a short time from the viewpoint of improving productivity.
  • the short crimping time means that the time during which the connection portion is heated to 230 ° C. or more during connection formation (for example, the time when solder is used) is 5 seconds or less.
  • the connection time may be 4 seconds or less, or 3 seconds or less.
  • the effect of the manufacturing method of this invention can express more that each crimping
  • the temporary connection body (semiconductor package) after the first process is carried into a mold for forming the temporary sealing connection body, and the sealing resin 60 is supplied thereon. Thereafter, the sealing resin 60 is washed away and cured to form a temporary sealing connection body.
  • the heat treatment in the third step requires a temperature equal to or higher than the melting point of the metal of the connection bump 30 in the temporary sealing connection body.
  • the connection bump 30 is a solder bump, it may be 230 ° C. or higher and 330 ° C. or lower. If the temperature is low, the metal of the connection bump 30 does not melt and a sufficient metal bond tends not to be formed.
  • connection time in the third step may be set to a short time from the viewpoint of productivity improvement, the connection bump 30 (solder bump) is melted, the oxide film and the surface impurities are removed, and the metal joint is used as the connection portion. It is good also as time which can be formed.
  • connection in a short time means that the time required for 230 ° C. or more is 5 seconds or less during the connection formation time (main pressure bonding time) if the connection bump 30 is a solder bump.
  • the connection time may be 4 seconds or less, or 3 seconds or less. The shorter the connection time, the easier it is to improve productivity.
  • the heat treatment is not particularly limited as long as a temperature higher than the melting point of the metal of the connection bump 30 of the sealing temporary connection body can be applied, and can be performed by a thermocompression bonding machine, a reflow furnace, a pressure oven, or the like.
  • a thermocompression bonding machine since heat can be locally applied, warpage reduction can be expected. Therefore, from the viewpoint of reducing warpage, a thermocompression bonding machine may be used.
  • a reflow furnace and a pressure oven that can heat-process many packages at once may be used.
  • a plurality of semiconductor chips 10 may be pressure bonded.
  • a plurality of semiconductor chips 10 are preliminarily pressure-bonded one by one (first step), and then a plurality of chips are sealed together (second). Process).
  • a plurality of semiconductor chips 10 are three-dimensionally pressure bonded. Also in this case, the plurality of semiconductor chips 10 may be stacked one by one and pressed (first process), and then the plurality of chips may be sealed (second process).
  • a method for manufacturing a semiconductor device includes a semiconductor chip having a connection portion and a printed circuit board having a connection portion, and each connection portion is electrically connected to each other.
  • a method for manufacturing a semiconductor device comprising a plurality of semiconductor chips, wherein each connection portion is electrically connected to each other, wherein the connection portion is made of metal, (A) The semiconductor chip and the printed circuit board, or the semiconductor chips are in contact with each other at a temperature lower than the melting point of the metal of the connection part with a semiconductor adhesive interposed therebetween.
  • Crimping and obtaining a temporary connection body (B) a second step of sealing at least a part of the temporary connection body using a sealing resin to obtain a sealed temporary connection body; (C) The third step of heating the sealed temporary connection body at a temperature equal to or higher than the melting point of the metal of the connection portion to obtain the sealed connection body.
  • the semiconductor device shown in FIG. 1B or FIG. 2B can be obtained.
  • the second embodiment is the same as the first embodiment except that the connection portions are connected without using the connection bump 30.
  • the adhesive for semiconductors may contain various components as described below, including a compound having a weight average molecular weight of 10,000 or less and a curing agent.
  • Compound having a weight average molecular weight of 10,000 or less Although there is no restriction
  • Epoxy resin is not particularly limited as long as it has two or more epoxy groups in the molecule.
  • the epoxy resin include bisphenol A type, bisphenol F type, naphthalene type, phenol novolac type, cresol novolac type, phenol aralkyl type, biphenyl type, triphenylmethane type, dicyclopentadiene type, various polyfunctional epoxy resins, and the like. Can be used. These can be used alone or as a mixture of two or more. From the viewpoint of heat resistance and handleability, bisphenol F type, phenol novolac type, cresol novolak type, biphenyl type, and triphenylmethane type may be selected.
  • the compounding amount of the epoxy resin can be, for example, 10 to 50 parts by mass with respect to 100 parts by mass of the total adhesive for semiconductor. In the case of 10 parts by mass or more, since the curing component is sufficiently present, it is easy to sufficiently control the flow of the resin even after curing. Tend.
  • the (meth) acrylic compound is not particularly limited as long as it has one or more (meth) acryloyl groups in the molecule.
  • (meth) acrylic compounds include bisphenol A type, bisphenol F type, naphthalene type, phenol novolac type, cresol novolac type, phenol aralkyl type, biphenyl type, triphenylmethane type, dicyclopentadiene type, fluorene type, adamantane.
  • a mold, various polyfunctional acrylic compounds, etc. can be used. These can be used alone or as a mixture of two or more.
  • the compounding amount of the (meth) acrylic compound may be 10 to 50 parts by mass or 15 to 40 parts by mass with respect to 100 parts by mass as a whole of the adhesive for semiconductor.
  • 10 parts by mass or more since the curing component is sufficiently present, the flow of the resin can be sufficiently controlled even after curing. When it is 50 parts by mass or less, the cured product does not become too hard, and the warpage of the package can be further suppressed.
  • (Meth) acrylic compound may be solid at room temperature (25 ° C.). Solids are less likely to generate voids than liquids, and the viscosity (tack) of the adhesive for semiconductors before curing (B stage) is small and excellent in handling.
  • the number of functional groups of the (meth) acrylic compound may be 3 or less. When the number of functional groups is 3 or less, curing in a short time sufficiently proceeds, and it is easier to suppress a decrease in curing reaction rate (a network of curing proceeds rapidly and unreacted groups may remain). The cured product characteristics are more likely to be improved.
  • the weight average molecular weight of the compound having a weight average molecular weight of 10,000 or less may be 100 to 9000 or 300 to 7000 from the viewpoint of heat resistance and fluidity.
  • the method for measuring the weight average molecular weight is the same as the method for measuring the weight average molecular weight of a high molecular weight component having a weight average molecular weight exceeding 10,000, which will be described later.
  • curing agent examples include a phenol resin curing agent, an acid anhydride curing agent, an amine curing agent, an imidazole curing agent and a phosphine curing agent, an azo compound, and an organic peroxide.
  • Phenolic resin-based curing agent The phenolic resin-based curing agent is not particularly limited as long as it has two or more phenolic hydroxyl groups in the molecule.
  • phenol resin-based curing agent for example, phenol novolak, cresol novolak, phenol aralkyl resin, cresol naphthol formaldehyde polycondensate, triphenylmethane type polyfunctional phenol and various polyfunctional phenol resins can be used. These can be used alone or as a mixture of two or more.
  • the equivalent ratio of the phenol resin-based curing agent to the epoxy resin is 0.3 to 1.5, 0.00 from the viewpoint of good curability, adhesion, and storage stability. It may be 4 to 1.0, or 0.5 to 1.0.
  • the equivalence ratio is 0.3 or more, the curability is improved and the adhesive force tends to be further improved, and when it is 1.5 or less, the unreacted phenolic hydroxyl group does not remain excessively, and the water absorption rate However, the insulation reliability tends to be further improved.
  • Acid anhydride curing agent examples include methylcyclohexanetetracarboxylic dianhydride, trimellitic anhydride, pyromellitic anhydride, benzophenonetetracarboxylic dianhydride, and ethylene glycol bis.
  • Anhydro trimellitate can be used. These can be used alone or as a mixture of two or more.
  • the equivalent ratio of the acid anhydride curing agent to the epoxy resin is 0.3 to 1.5 from the viewpoint of good curability, adhesiveness and storage stability. It may be 0.4 to 1.0, or 0.5 to 1.0.
  • the equivalence ratio is 0.3 or more, the curability is improved and the adhesive force tends to be further improved, and when it is 1.5 or less, the unreacted acid anhydride does not remain excessively, and the water absorption rate However, the insulation reliability tends to be further improved.
  • Amine-based curing agent for example, dicyandiamide can be used.
  • the equivalent ratio of amine curing agent to the above epoxy resin is 0.3 to 1.5, 0.4 to 1. in terms of good curability, adhesiveness and storage stability. It may be 0, or 0.5 to 1.0.
  • the equivalent ratio is 1.5 or less, the unreacted amine does not remain excessively, and the insulation reliability is improved. There is a tendency to improve.
  • Imidazole-based curing agent examples include 2-phenylimidazole, 2-phenyl-4-methylimidazole, 1-benzyl-2-methylimidazole, 1-benzyl-2-phenylimidazole, 1- Cyanoethyl-2-undecylimidazole, 1-cyano-2-phenylimidazole, 1-cyanoethyl-2-undecylimidazole trimellitate, 1-cyanoethyl-2-phenylimidazolium trimellitate, 2,4-diamino-6 -[2'-methylimidazolyl- (1 ')]-ethyl-s-triazine, 2,4-diamino-6- [2'-undecylimidazolyl- (1')]-ethyl-s-triazine, 2, 4-Diamino-6- [2′-ethyl-4′-methylimidazolyl
  • the content of the imidazole curing agent may be 0.1 to 20 parts by mass, or 0.1 to 10 parts by mass with respect to 100 parts by mass of the epoxy resin. If the content of the imidazole-based curing agent is 0.1 parts by mass or more, the curability tends to be improved, and if it is 20 parts by mass or less, the adhesive for a semiconductor is hard to be cured before a metal bond is formed. There is a tendency that poor connection is unlikely to occur.
  • (V) Phosphine curing agent examples include triphenylphosphine, tetraphenylphosphonium tetraphenylborate, tetraphenylphosphonium tetra (4-methylphenyl) borate and tetraphenylphosphonium (4-fluorophenyl) borate. Can be mentioned.
  • the content of the phosphine curing agent may be 0.1 to 10 parts by mass, or 0.1 to 5 parts by mass with respect to 100 parts by mass of the epoxy resin. If the content of the phosphine-based curing agent is 0.1 parts by mass or more, the curability tends to be improved, and if it is 10 parts by mass or less, the adhesive for a semiconductor is hard to be cured before a metal bond is formed. There is a tendency that poor connection is unlikely to occur.
  • a phenol resin curing agent, an acid anhydride curing agent, and an amine curing agent can be used singly or as a mixture of two or more.
  • the imidazole-based curing agent and the phosphine-based curing agent may each be used alone, but may be used together with a phenol resin-based curing agent, an acid anhydride-based curing agent, or an amine-based curing agent.
  • Organic peroxide examples include ketone peroxide, peroxyketal, hydroperoxide, dialkyl peroxide, diacyl peroxide, peroxydicarbonate, and peroxyester. From the viewpoint of storage stability, it may be selected from hydroperoxide, dialkyl peroxide, and peroxyester. Furthermore, you may select from a hydroperoxide and a dialkyl peroxide from a heat resistant viewpoint.
  • the content of the organic peroxide may be 0.5 to 10% by weight, or 1 to 5% by weight based on the total weight of the (meth) acrylic compound.
  • the amount is 0.5% by weight or more, curing is likely to proceed sufficiently, and when the amount is 10% by weight or less, curing proceeds rapidly and the number of reactive sites increases, resulting in shorter molecular chains or remaining unreacted groups. It tends to be possible to suppress the decrease in reliability.
  • organic peroxides can be used alone or as a mixture of two or more.
  • the combination of the epoxy resin and (meth) acrylic compound and the curing agents (i) to (vi) is not particularly limited as long as curing proceeds.
  • the curing agent combined with the epoxy resin may be selected from phenol and imidazole, acid anhydride and imidazole, amine and imidazole, or imidazole alone, from the viewpoints of handleability, storage stability, and curability. Since productivity improves when connected in a short time, imidazole excellent in rapid curability may be used alone. When cured in a short time, volatile components such as low-molecular components can be suppressed, so that generation of voids can be suppressed.
  • the curing agent combined with the (meth) acrylic compound may be an organic peroxide from the viewpoints of handleability and storage stability.
  • the curing reaction rate may be 80% or more, or 90% or more. If the curing reaction rate at 200 ° C (solder melting temperature or lower) / 5s is 80% or higher, solder will not flow or scatter during connection (solder melting temperature or higher), resulting in poor connection and poor insulation reliability. It tends to be difficult.
  • the curing system may be a radical polymerization system.
  • a radical polymerization system for example, as a compound having a weight average molecular weight of 10,000 or less, a radically-polymerized (meth) acrylic compound (acrylic-peroxide-curing system) is preferable as compared with an anionic polymerization epoxy resin (an epoxy-curing agent curing system).
  • an anionic polymerization epoxy resin an epoxy-curing agent curing system
  • an anionic polymerization epoxy resin or the like it may be difficult to achieve a curing reaction rate of 80% or more.
  • 20 mass parts or less of an epoxy resin may be sufficient with respect to 80 mass parts of (meth) acrylic compounds.
  • An acrylic curing system may be used alone.
  • silanol compound The silanol compound is represented by the following general formula (1). [Wherein, R 1 represents an alkyl group or a phenyl group, and R 2 represents an alkylene group. ]
  • the silanol compound may be solid at 25 ° C. from the viewpoint of heat resistance.
  • R 1 may be an alkyl group or a phenyl group from the viewpoints of heat resistance and fluidity. A mixture of an alkyl group and a phenyl group may be used. Examples of the group represented by R 1 include phenyl, propyl, phenylpropyl, and phenylmethyl groups.
  • R 2 is not particularly limited. From the viewpoint of heat resistance, it may be an alkylene group having a weight average molecular weight of 100 to 5,000. From the viewpoint of high reactivity (cured product strength), trifunctional silanol may be used.
  • a silanol compound added to the adhesive for semiconductors, fluidity is improved and void suppression and high connectivity are improved.
  • fluidity viscosity is lowered
  • Generation of voids can be further suppressed by using a silanol compound having high heat resistance (low thermal weight loss). If the amount of decrease in thermal weight is small, the amount of volatile matter is small and voids are reduced, and the reliability (reflow resistance) is further improved.
  • the content of the silanol compound may be 2 to 20% by mass based on the total amount of the adhesive for semiconductor, and 2 to 10% by mass or 2 from the viewpoint of high fluidity and cured product strength (adhesive strength etc.) It may be up to 9% by mass.
  • the content is 2% by mass or more, the effect (high fluidization) is easily exhibited, and when the content is 20% by mass or less, the curing strength tends to increase and high adhesive strength tends to be exhibited. If the content is small to some extent, the ratio of the cured product of epoxy resin or acrylic resin is increased, so that it is presumed that higher adhesive force is expressed.
  • High molecular weight component having a weight average molecular weight exceeding 10,000 are epoxy resin, phenoxy resin, polyimide resin, polyamide resin, polycarbodiimide resin, cyanate ester resin, acrylic resin, polyester resin, polyethylene resin, polyethersulfone resin, polyetherimide resin, A polyvinyl acetal resin, a urethane resin, an acrylic rubber, etc. are mentioned.
  • an epoxy resin, a phenoxy resin, a polyimide resin, an acrylic resin, an acrylic rubber, a cyanate ester resin, a polycarbodiimide resin, and the like that are excellent in heat resistance and film formability may be selected.
  • These high molecular weight components can be used alone or as a mixture or copolymer of two or more.
  • the weight ratio of the high molecular weight component having a weight average molecular weight exceeding 10,000 and the epoxy resin is not particularly limited. Since it is easy to maintain a film shape, 0.01 to 5 parts by weight, 0.05 to 4 parts by weight, or 0.1 to 3 parts by weight of an epoxy resin per 1 part by weight of a high molecular weight component having a weight average molecular weight exceeding 10,000. Part by weight may be used. When this weight ratio is 0.01 parts by weight or more, the curability tends to be improved and the adhesive force tends to be further improved. When this weight ratio is 5 parts by weight or less, film formability and film formability tend to be particularly excellent.
  • the weight ratio of the high molecular weight component having a weight average molecular weight exceeding 10,000 and the (meth) acrylic compound is not particularly limited.
  • the (meth) acryl compound may be 0.01 to 10 parts by weight, 0.05 to 5 parts by weight, or 0.1 to 5 parts by weight with respect to 1 part by weight of the high molecular weight component having a weight average molecular weight exceeding 10,000. Good.
  • this weight ratio is 0.01 parts by weight or more, the curability tends to be improved and the adhesive force tends to be further improved.
  • this weight ratio is larger than 10 parts by weight, the film formability tends to be particularly excellent.
  • the glass transition temperature (Tg) of the high molecular weight component having a weight average molecular weight exceeding 10,000 is 120 ° C. or lower, 100 ° C. or lower, or 85 ° C. or lower from the viewpoint of excellent adhesiveness to the substrate and chip of the semiconductor adhesive. Also good.
  • Tg is 120 ° C. or less, bumps formed on a semiconductor chip, electrodes or wiring patterns formed on a substrate, etc., are easily embedded with an adhesive composition, so that bubbles hardly remain and voids are generated. It tends to be difficult.
  • the Tg is a Tg measured using a DSC (DSC-7 model manufactured by Perkin Elmer) under the conditions of a sample amount of 10 mg, a heating rate of 10 ° C./min, and a measurement atmosphere: air.
  • the weight average molecular weight of the high molecular weight component having a weight average molecular weight of more than 10,000 is more than 10,000 in terms of polystyrene, but in order to show better film-formability alone, it may be 30000 or more, 40000 or more, or 50000 or more. Good. When the weight average molecular weight exceeds 10,000, the film formability tends to be particularly excellent.
  • the weight average molecular weight means a weight average molecular weight when measured in terms of polystyrene using high performance liquid chromatography (C-R4A manufactured by Shimadzu Corporation).
  • the semiconductor adhesive may contain a flux component, that is, a flux activator which is a compound exhibiting flux activity (activity for removing oxides and impurities).
  • a flux activator which is a compound exhibiting flux activity (activity for removing oxides and impurities).
  • the flux activator include nitrogen-containing compounds having an unshared electron pair such as imidazoles and amines, carboxylic acids, phenols, and alcohols. Compared with alcohol etc., the organic acid has a stronger flux activity and tends to improve the connectivity. Carboxylic acid can further improve connectivity and stability.
  • the adhesive for semiconductors is blended with filler.
  • the insulating inorganic filler include glass, silica, alumina, titanium oxide, carbon black, mica, boron nitride, and the like.
  • silica, alumina, titanium oxide, boron nitride, and the like from the viewpoint of handleability, from silica, alumina, titanium oxide, boron nitride, and the like. It may be selected, or may be selected from silica, alumina, and boron nitride from the viewpoint of shape uniformity (handleability).
  • whiskers examples include aluminum borate, aluminum titanate, zinc oxide, calcium silicate, magnesium sulfate, and boron nitride.
  • resin filler polyurethane, polyimide, methyl methacrylate resin, methyl methacrylate-butadiene-styrene copolymer resin (MBS), or the like can be used.
  • MFS methyl methacrylate-butadiene-styrene copolymer resin
  • whiskers and whiskers can be used alone or as a mixture of two or more. There is no particular limitation on the shape, particle size, and blending amount of the filler.
  • a surface-treated filler may be used.
  • the surface treatment include glycidyl (epoxy), amine, phenyl, phenylamino, acrylic, and vinyl.
  • fillers and whiskers can be used alone or as a mixture of two or more. There is no particular limitation on the shape, particle size, and blending amount of the filler. Further, the physical properties may be appropriately adjusted by surface treatment.
  • the average particle size may be 1.5 ⁇ m or less from the viewpoint of preventing biting at the time of flip chip connection, and from the viewpoint of visibility (transparency), the average particle size is 1.0 ⁇ m or less. There may be.
  • the surface treatment may be a silane treatment with a silane compound such as an epoxy silane, amino silane, or acrylic silane for ease of surface treatment.
  • a silane compound such as an epoxy silane, amino silane, or acrylic silane for ease of surface treatment.
  • the surface treatment agent may be a compound selected from glycidyl, phenylamino, acrylic, and methacrylic compounds from the viewpoint of excellent dispersibility and fluidity and further improving the adhesive force.
  • the surface treating agent may be a compound selected from phenyl, acrylic and methacrylic compounds from the viewpoint of storage stability.
  • Resin fillers are suitable for improving reflow resistance because they can impart flexibility at high temperatures such as 260 ° C. compared to inorganic fillers. Moreover, since flexibility is imparted, it is also effective in improving film formability.
  • the filler may be insulative.
  • the adhesive for semiconductors which does not contain electroconductive metal fillers, such as a silver filler and a solder filler, may be sufficient.
  • the blending amount of the filler may be 30 to 90% by mass or 40 to 80% by mass based on the total solid content of the semiconductor adhesive.
  • the blending amount is 30% by mass or more, heat dissipation tends to be high, and void generation and moisture absorption tend to be further suppressed.
  • it is 90% by mass or less, since the viscosity is increased, it is easy to suppress the decrease in fluidity of the adhesive composition and the occurrence of trapping of the filler into the connection portion (trapping), so that the connection reliability is further improved.
  • an ion trapper, an antioxidant, a silane coupling agent, a titanium coupling agent, a leveling agent, etc. may be blended in the semiconductor adhesive. These may be used singly or in combination of two or more. About these compounding quantities, what is necessary is just to adjust suitably so that the effect of each additive may express.
  • ⁇ Semiconductor adhesive can be crimped at a high temperature of 200 ° C or higher.
  • a flip chip package in which a connection is formed by melting a metal such as solder is more effective.
  • the semiconductor adhesive may be in the form of a film. When it is in the form of a film, productivity tends to be improved.
  • a resin varnish is prepared by adding a high molecular weight component having a weight average molecular weight of more than 10,000, a compound having a weight average molecular weight of 10,000 or less, a curing agent, a filler, other additives, etc. To prepare. Then, after applying the resin varnish on the base film subjected to the release treatment using a knife coater, roll coater, applicator, die coater, or comma coater, the organic solvent is reduced by heating, and the base material is reduced. A film adhesive is formed on the film. In addition, before the organic solvent is reduced by heating, a resin varnish may be spin-coated on a wafer or the like to form a film, and then the solvent may be dried to form a semiconductor adhesive on the wafer. .
  • the base film is not particularly limited as long as it has heat resistance that can withstand the heating conditions when the organic solvent is volatilized.
  • Examples of the base film include a polyester film, a polypropylene film, a polyethylene terephthalate film, a polyimide film, a polyetherimide film, a polyether naphthalate film, and a methylpentene film.
  • the base film is not limited to a single layer made of these films, and may be a multilayer film made of two or more materials.
  • the condition for volatilizing the organic solvent from the resin varnish after application may be, for example, heating at 50 to 200 ° C. for 0.1 to 90 minutes. If there is no influence on the void and viscosity adjustment after mounting, the organic solvent may be volatilized to 1.5% by mass or less.
  • the melt viscosity during the first step (temporary pressure bonding) for bonding at a temperature lower than the melting point of the connection bumps 30 or 32 (80 to 130 ° C.) improves fluidity and eliminates entrained voids. It may be 6000 Pa ⁇ s or less, 5500 Pa ⁇ s or less, 5000 Pa ⁇ s or less, or 4000 Pa ⁇ s or less. However, if the melt viscosity is too low, the resin creeps up the side of the chip and adheres to the crimping tool, which tends to reduce productivity. Therefore, the melt viscosity at the time of temporary pressure bonding may be 1000 Pa ⁇ s or more.
  • the melt viscosity can be measured using, for example, a rheometer (MCR301, manufactured by Anton Paar Japan).
  • the sealing resin is not particularly limited as long as it is a resin used for sealing a semiconductor device.
  • resins include bisphenol A type epoxy resins, bisphenol F type epoxy resins, bisphenol AD type epoxy resins, bisphenol S type epoxy resins, naphthalenediol type epoxy resins, hydrogenated bisphenol A type epoxy resins, and glycidylamine type epoxies. Examples thereof include resins.
  • Each resin varnish produced was coated on a base film whose surface was release-treated with a small precision coating device (manufactured by Yasui Seiki Co., Ltd.), and the coated resin varnish was cleaned in a clean oven (ESPEC Corporation) Two types of film adhesives A and B were obtained by drying (70 degreeC / 10min) by company.
  • Example 1 Step 1 Cut out the film adhesive prepared above (8 mm ⁇ 8 mm ⁇ 0.045 mm t ), substrate (20 mm ⁇ 27 mm, 0.41 mm thickness, connection part metal: Cu (OSP treatment), product name: HCTEG -P1180-02, manufactured by Hitachi Chemical Electronics Co., Ltd.).
  • a semiconductor chip with solder bumps (chip size: 7.3 mm ⁇ 7.3 mm ⁇ 0.15 mm t , bump height: copper pillar + solder meter about 45 ⁇ m, number of bumps 328 pins, pitch 80 ⁇ m, product name: SM487A -HC-PLT, manufactured by Sumitomo Corporation Kyushu Co., Ltd.) using a thermocompression bonding machine (FCB3, manufactured by Panasonic Corporation) with a stage temperature of 80 ° C, a temporary pressure bonding temperature of 130 ° C, and a temporary pressure bonding time of 2 seconds. did.
  • FCB3 thermocompression bonding machine
  • Step 2 For the semiconductor package (temporary connection body) subjected to the temporary pressure bonding, the upper surface of the chip is sealed using a molding apparatus (manufactured by Technomarti Co., Ltd.), and the sealing body (sealing temporary connection body) Formed.
  • Step 3 The obtained sealing body is subjected to heat treatment at a stage temperature of 80 ° C. and a pressing temperature of 280 ° C. using the thermocompression bonding machine (FCB3, manufactured by Panasonic Corporation), and a semiconductor device (sealed connection body). Was made.
  • FCB3 thermocompression bonding machine
  • thermocompression bonding machine FCB3, manufactured by Panasonic Corporation
  • a reflow apparatus produced by Tamura Corporation
  • a film adhesive A or B as a film adhesive.
  • the temperature of the pressure bonding was 130 ° C. (when the film adhesive A was used) or 80 ° C. (when the film adhesive B was used).
  • Example 2 As shown in Table 2, the heat treatment was performed using a thermocompression bonding machine (FCB3, manufactured by Panasonic Corporation) or a reflow apparatus (produced by Tamura Corporation), and a film adhesive A or B as a film adhesive. , The steps 2 and 3 were replaced, and the temporary press bonding temperature was 130 ° C. (when the film-like adhesive A was used) or 80 ° C. (when the film-like adhesive B was used), and A semiconductor device was fabricated in the same manner as in Example 1 except that. Note that the replacement of the step 2 and the step 3 means that after the connection between the substrate and the semiconductor chip is completed, a sealing process is performed using a molding apparatus.
  • FCB3 thermocompression bonding machine
  • a reflow apparatus produced by Tamura Corporation
  • SYMBOLS 10 Semiconductor chip, 12 ... Semiconductor chip main body, 15 ... Wiring (connection part), 20 ... Board

Abstract

接続部を有する半導体チップ及び接続部を有する配線回路基板を備え、それぞれの接続部が互いに電気的に接続された半導体装置、又は、接続部を有する複数の半導体チップを備え、それぞれの接続部が互いに電気的に接続された半導体装置の製造方法が開示される。接続部は金属からなる。上記方法は、（ａ）半導体チップ及び配線回路基板、又は半導体チップ同士を、間に半導体用接着剤を介した状態で、接続部の金属の融点より低い温度で、それぞれの接続部が互いに接触するように圧着し、仮接続体を得る第一工程と、（ｂ）仮接続体の少なくとも一部を封止用樹脂を用いて封止し、封止仮接続体を得る第二工程と、（ｃ）封止仮接続体を接続部の金属の融点以上の温度で加熱し、封止接続体を得る第三工程とを備える。

Description

半導体装置の製造方法
　本発明は、半導体装置の製造方法に関する。
　これまで、半導体チップと基板を接続するには、金ワイヤなどの金属細線を用いるワイヤーボンディング方式が広く適用されてきた。しかしながら、半導体装置に対する高機能・高集積・高速化等の要求に対応するため、半導体チップ又は基板にバンプと呼ばれる導電性突起を形成して、半導体チップと基板とを直接接続するフリップチップ接続方式（ＦＣ接続方式）が広まりつつある。
　ＦＣ接続方式としては、はんだ、スズ、金、銀、銅等を用いて金属接合させる方法、超音波振動を印加して金属接合させる方法、樹脂の収縮力によって機械的接触を保持する方法などが知られているが、接続部の信頼性の観点から、はんだ、スズ、金、銀、銅等を用いて金属接合させる方法が一般的である。
　例えば、半導体チップと基板間の接続においては、ＢＧＡ（Ｂａｌｌ　Ｇｒｉｄ　Ａｒｒａｙ）、ＣＳＰ（Ｃｈｉｐ　Ｓｉｚｅ　Ｐａｃｋａｇｅ）等に盛んに用いられているＣＯＢ（Ｃｈｉｐ　Ｏｎ　Ｂｏａｒｄ）型の接続方式もＦＣ接続方式である。
　ＦＣ接続方式は半導体チップ上にバンプまたは配線を形成して、半導体チップ間で接続するＣＯＣ（Ｃｈｉｐ　Ｏｎ　Ｃｈｉｐ）型接続方式にも広く用いられている。
特開２００８－２９４３８２
　さらなる小型化、薄型化、高機能化が強く要求されるパッケージでは、上述した接続方式を積層・多段化したチップスタック型パッケージ、ＰＯＰ（Ｐａｃｋａｇｅ　Ｏｎ　Ｐａｃｋａｇｅ）、ＴＳＶ（Ｔｈｒｏｕｇｈ－Ｓｉｌｉｃｏｎ　Ｖｉａ）等も広く普及し始めている。
　平面状でなく立体状に配置することでパッケージを小さくできることから、上記の技術は多用され、半導体の性能向上及びノイズ低減、実装面積の削減、省電力化にも有効であり、次世代の半導体配線技術として注目されている。
　生産性向上の観点から、ウエハ上に半導体チップを圧着（接続）して後に個片化して半導体パッケージを作製するＣＯＷ（Ｃｈｉｐ　Ｏｎ　Ｗａｆｅｒ）、ウエハ同士を圧着（接続）して後に個片化して半導体パッケージを作製するＷＯＷ（Ｗａｆｅｒ　Ｏｎ　Ｗａｆｅｒ）も注目されている。
　上述したフリップチップパッケージの組立では、まず、ダイシングしたウエハから半導体チップ、又は、半導体用接着剤が供給された半導体チップをコレットでピックアップし、コレットを介して圧着ツールに供給する。
　次に、チップ－チップ、又は、チップ－基板の位置合わせを行い、圧着する。
　金属結合が形成されるように、上下、又は、上下どちらかの一方以上の接続部の金属が融点以上に達するように圧着ツールの温度を上昇させる。
　積層・多段化するチップスタックパッケージでは、チップピックアップ、位置合わせ、圧着を繰り返す。
　その後、半導体パッケージの保護を行うために、封止用の樹脂でチップ上面を封止することにより、封止体を形成する。
　しかしながら、従来のフリップチップパッケージの組立では、チップと半導体用封止材、又は、チップと基板との熱膨張率の差により、圧着後に半導体パッケージに反りが発生する場合がある。この反りにより、オーバーモールドが行えないこと、及び、パッケージの接続不良が発生するといった問題が生じる。
　本発明は上記事情に鑑みてなされたものであり、半導体部材同士を接続する際の反りを抑制することのできる、半導体装置の製造方法を提供することを目的とする。
　本発明は、上述した課題を解決するためのものであり、半導体装置の反りを抑制することのできる半導体装置の製造方法を提供する。
（１）接続部を有する半導体チップ及び接続部を有する配線回路基板を備え、それぞれの接続部が互いに電気的に接続された半導体装置、又は、接続部を有する複数の半導体チップを備え、それぞれの接続部が互いに電気的に接続された半導体装置の製造方法であって、接続部は金属からなり、
（ａ）半導体チップ及び配線回路基板、又は、半導体チップ同士を、間に半導体用接着剤を介した状態で、接続部の金属の融点より低い温度で、それぞれの接続部が互いに接触するように圧着し、仮接続体を得る第一工程と、
（ｂ）仮接続体の少なくとも一部を封止用樹脂を用いて封止し、封止仮接続体を得る第二工程と、
（ｃ）封止仮接続体を接続部の金属の融点以上の温度で加熱し、封止接続体を得る第三工程と、を備える、半導体装置の製造方法。
（２）接続部を有する半導体チップ及び接続部を有する配線回路基板を備え、それぞれの接続部が接続バンプを介して互いに電気的に接続された半導体装置、又は、接続部を有する複数の半導体チップを備え、それぞれの接続部が接続バンプを介して互いに電気的に接続された半導体装置の製造方法であって、接続部及び接続バンプは金属からなり、
（ａ）半導体チップ及び配線回路基板、又は、半導体チップ同士を、間に半導体用接着剤を介した状態で、接続バンプの金属の融点より低い温度で、それぞれの接続部が接続バンプに接触するように圧着し、仮接続体を得る第一工程と、
（ｂ）仮接続体の少なくとも一部を封止用樹脂を用いて封止し、封止仮接続体を得る第二工程と、
（ｃ）封止仮接続体を接続バンプの金属の融点以上の温度で加熱し、封止接続体を得る第三工程と、を備える、半導体装置の製造方法。
（３）第一工程では、半導体チップ及び配線回路基板、又は、半導体チップ同士を、対向する一対の仮圧着用押圧部材で挟むことによって加熱及び加圧することにより、圧着する、上記半導体装置の製造方法。
（４）半導体用接着剤が、重量平均分子量１００００以下の化合物及び硬化剤を含有し、８０～１３０℃における溶融粘度が６０００Ｐａ・ｓ以下である、上記半導体装置の製造方法。
（５）半導体用接着剤が、重量平均分子量１００００以下の化合物、硬化剤、及び下記一般式（１）で表されるシラノール化合物を含有する、上記半導体装置の製造方法。
Figure JPOXMLDOC01-appb-C000002
 ［式中、Ｒ１はアルキル基又はフェニル基を示し、Ｒ２はアルキレン基を示す。］
（６）Ｒ１がフェニル基である、上記半導体装置の製造方法。
（７）シラノール化合物が２５℃で固形である、上記半導体装置の製造方法。
（８）半導体用接着剤が、重量平均分子量１００００超の高分子量成分を含有する、上記半導体装置の製造方法。
（９）高分子量成分が、重量平均分子量３００００以上であり且つガラス転移温度が１００℃以下の成分である、上記半導体装置の製造方法。
（１０）半導体接着剤がフィルム状である、上記半導体装置の製造方法。
　本発明によれば、半導体部材同士を接続する際の反りを抑制することのできる、半導体装置の製造方法を提供することができる。すなわち、上記のとおり、接続部等の金属の融点より高温で加熱処理を行い、金属結合を形成する工程の前に、半導体チップを樹脂で封止し、封止体を形成することで、パッケージの反りを抑制することができる。
半導体装置の一実施形態を示す模式断面図である。 半導体装置の一実施形態を示す模式断面図である。 半導体装置の一実施形態を示す模式断面図である。 半導体装置の一実施形態を示す模式断面図である。 半導体装置の一実施形態を示す模式断面図である。 半導体チップに基板を仮圧着する工程の一例を示す工程図である。
　本実施形態の半導体装置の製造方法で用いられるチップ、基板等について以下説明する。
＜半導体装置＞
　本実施形態の半導体装置の製造方法により得られる半導体装置について、図１及び図２を用いて以下説明する。図１は半導体チップと基板間で接続が行われる場合、図２は半導体チップ間で接続が行われる場合の断面構造を示している。
　図１は、半導体装置の一実施形態を示す模式断面図である。図１（ａ）に示す半導体装置１００は、互いに対向する半導体チップ１０及び基板（回路配線基板）２０と、半導体チップ１０及び基板２０の互いに対向する面にそれぞれ配置された配線１５と、半導体チップ１０及び基板２０の配線１５を互いに接続する接続バンプ３０と、半導体チップ１０及び基板２０間の空隙に隙間なく充填された接着剤層４０と、半導体チップ１０及び基板２０の接続部分を封止する封止用樹脂６０と、を有している。半導体チップ１０及び基板２０は、配線１５及び接続バンプ３０によりフリップチップ接続されている。配線１５及び接続バンプ３０は、接着剤層４０により封止されており外部環境から遮断されている。同様に、半導体チップ１０及び接着剤層４０は、封止用樹脂６０により封止されており外部環境から遮断されている。
　図１（ｂ）に示す半導体装置２００は、互いに対向する半導体チップ１０及び基板２０と、半導体チップ１０及び基板２０の互いに対向する面にそれぞれ配置されたバンプ３２と、半導体チップ１０及び基板２０間の空隙に隙間なく充填された接着剤層４０とを有している。半導体チップ１０及び基板２０は、対向するバンプ３２が互いに接続されることによりフリップチップ接続されている。バンプ３２は、接着剤層４０により封止されており外部環境から遮断されている。同様に、半導体チップ１０及び接着剤層４０は、封止用樹脂６０により封止されており外部環境から遮断されている。接着剤層４０は、半導体用接着剤の硬化物である。
　図２は、半導体装置の他の実施形態を示す模式断面図である。図２（ａ）に示す半導体装置３００は、２つの半導体チップ１０が配線１５及び接続バンプ３０によりフリップチップ接続されている点を除き、半導体装置１００と同様である。図２（ｂ）に示す半導体装置４００は、２つの半導体チップ１０がバンプ３２によりフリップチップ接続されている点を除き、半導体装置２００と同様である。図２（ａ）のより具体的な態様としては、図中上側の半導体チップ１０が接続部として銅ピラー及びはんだ（はんだバンプ）を有し、図中下側の半導体チップ１０が接続部としてパッド（接続部に金メッキ）を有するような態様が挙げられる。
　バンプ（接続バンプ）と呼ばれる導電性突起の材質としては、主な成分として、金、銀、銅、ハンダ（主成分は例えば、スズ－銀、スズ－鉛、スズ－ビスマス、スズ－銅、スズ－銀－銅等）、スズ、ニッケル等が用いられ、単一の成分のみで構成されていても、複数の成分から構成されていてもよい。また、これらの金属が積層された構造をなすように形成されていてもよい。バンプは半導体チップ、又は、基板に形成されていてもよい。接続部の金属は、比較的安価な銅、又ははんだを含んでいてもよい。接続信頼性の向上及び反り抑制の観点から、接続部の金属ははんだを含んでいてもよい。
　パッドと呼ばれる接続部の金属面には主な成分として、金、銀、銅、ハンダ（主成分は例えば、スズ‐銀、スズ－鉛、スズ－ビスマス、スズ－銅、スズ－銀－銅等）、スズ、ニッケル等が用いられ、単一の成分のみで構成されていても、複数の成分から構成されていてもよい。また、これらの金属が積層された構造をなすように形成されていてもよい。パッドは、接続信頼性の観点から、金、又ははんだを含んでいてもよい。
　配線（配線パターン）の表面には、主な成分として、金、銀、銅、ハンダ（主成分は例えば、スズ‐銀、スズ－鉛、スズ－ビスマス、スズ－銅、スズ－銀－銅等）、スズ、ニッケル等からなる金属層が形成されていてもよく、この金属層は単一の成分のみで構成されていても、複数の成分から構成されていてもよい。また、複数の金属層が積層された構造を有していてもよい。接続部の金属は、比較的安価な銅、又ははんだを含んでいてもよい。接続信頼性の向上及び反り抑制の観点から、接続部の金属ははんだを含んでいてもよい。
　半導体装置は、例えば上述したバンプ－バンプ間、バンプ－パッド間、バンプ－配線間で接続する。この場合、後述する加熱処理（第三工程）ではどちらか一方の接続部の金属が融点以上になればよい。
　半導体チップ１０としては、特に限定はなく、シリコン、ゲルマニウム等の元素半導体、ガリウムヒ素、インジウムリンなどの化合物半導体等、各種半導体を用いることができる。
　基板２０（半導体基板）としては、通常の回路基板であれば特に制限はない。基板２０としては、ガラスエポキシ、ポリイミド、ポリエステル、セラミック、エポキシ樹脂、ビスマレイミドトリアジン等を主な成分とする絶縁基板表面に、金属膜の不要な箇所をエッチング除去して形成された配線１５（配線パターン）を有する回路基板、上記絶縁基板表面に金属めっきなどによって配線１５が形成された回路基板、上記絶縁基板表面に導電性物質を印刷することにより配線１５が形成された回路基板などを用いることができる。
　半導体装置１００～４００に示すような構造（パッケージ）が複数積層されていてもよい。この場合、半導体装置１００～４００は、金、銀、銅、はんだ（主成分は、例えばスズ－銀、スズ－鉛、スズ－ビスマス、スズ－銅、スズ－銀－銅）、スズ、ニッケル等を含むバンプ又は配線で互いに電気的に接続されていてもよい。
　半導体装置を複数積層する手法としては、図３に示すように、例えばＴＳＶ（Ｔｈｒｏｕｇｈ－Ｓｉｌｉｃｏｎ　Ｖｉａ）技術が挙げられる。ＴＳＶ技術では、半導体用接着剤を半導体チップ間に介してフリップチップ接続又は積層する。図３は、半導体装置の他の実施形態を示す模式断面図であり、ＴＳＶ技術を用いた半導体装置である。図３に示す半導体装置５００では、インターポーザ５０上に形成された配線１５が半導体チップ１０の配線１５と接続バンプ３０を介して接続されることにより、半導体チップ１０とインターポーザ５０とはフリップチップ接続されている。半導体チップ１０とインターポーザ５０との間の空隙には接着剤層４０が隙間なく充填されている。上記半導体チップ１０におけるインターポーザ５０と反対側の表面上には、配線１５、接続バンプ３０及び接着剤層４０を介して半導体チップ１０が繰り返し積層されている。半導体チップ１０（最外層のものを除く）の表裏におけるパターン面の配線１５は、半導体チップ１０の内部を貫通する孔内に充填された貫通電極３４により互いに接続されている。貫通電極３４の材質としては、銅、アルミニウム等を用いることができる。複数の半導体チップ１０からなる積層体は、封止用樹脂６０により封止されており外部環境から遮断されている。
　このようなＴＳＶ技術により、通常は使用されない半導体チップの裏面からも信号を取得することが可能となる。さらには、半導体チップ１０内に貫通電極３４を垂直に通すため、対向する半導体チップ１０間、並びに、半導体チップ１０及びインターポーザ５０間の距離を短くし、柔軟な接続が可能である。本実施形態の半導体装置の製造方法は、このようなＴＳＶ技術において、積層チップとインタポーザ間にも適用できる。
　図４及び５は、半導体装置の他の実施形態を示す模式断面図である。図４に示す半導体装置６００は、複数の半導体チップ１０が配線１５及び接続バンプ３０により、基板２０にフリップチップ接続されている点を除き、半導体装置１００と同様である。図５に示す半導体装置７００は、複数の半導体チップ１０が配線１５及び接続バンプ３０により、インターポーザ５０にフリップチップ接続されている点を除き、半導体装置１００と同様である。
＜半導体装置の製造方法＞
　第一の実施形態の半導体装置の製造方法は、接続部を有する半導体チップ及び接続部を有する配線回路基板を備え、それぞれの接続部が接続バンプを介して互いに電気的に接続された半導体装置、又は、接続部を有する複数の半導体チップを備え、それぞれの接続部が接続バンプを介して互いに電気的に接続された半導体装置の製造方法であって、接続バンプは金属からなり、
（ａ）半導体チップ及び配線回路基板、又は、半導体チップ同士を、間に半導体用接着剤を介した状態で、接続バンプの金属の融点より低い温度で、それぞれの接続部が接続バンプに接触するように圧着し、仮接続体を得る第一工程と、
（ｂ）仮接続体の少なくとも一部を封止用樹脂を用いて封止し、封止仮接続体を得る第二工程と、
（ｃ）封止仮接続体を接続バンプの金属の融点以上の温度で加熱し、封止接続体を得る第三工程と、を備える。
　これにより、例えば図１（ａ）又は図２（ａ）に示される半導体装置を得ることができる。以下、図２（ａ）を例にとり、各工程について説明する。
　まず、半導体チップ１０上に、フィルム状の半導体用接着剤（以下、「フィルム状接着剤」という場合もある）を貼付する。フィルム状接着剤の貼付は、加熱プレス、ロールラミネート、真空ラミネートなどによって行うことができる。フィルム状接着剤の供給面積及び厚みは、半導体チップ１０及び基板２０のサイズ、接続バンプ３０の高さなどによって適宜設定される。フィルム状接着剤は半導体チップ１０に貼付してもよく、半導体ウエハにフィルム状接着剤を貼付した後、ダイシングして、半導体チップ１０に個片化することによって、フィルム状接着剤を貼付した半導体チップ１０を作製してよい。
　半導体チップ１０の配線１５同士をフリップチップボンダーなどの接続装置を用いて位置合わせした後、接続バンプ３０（はんだバンプ）の融点以下の温度で仮圧着を行い、仮接続体を得る（第一工程）。
　次に、仮接続体における一方の半導体チップ１０の上面を封止し、封止仮接続体を得る（第二工程）。半導体チップ１０の封止は、コンプレッション成形機、トランスファ成形機などによって行うことができる。
　その後、封止仮接続体を、接続バンプ３０の融点以上の温度が加わるよう加熱し、配線１５と接続バンプ３０間に金属結合を形成することで、封止接続体を得る（第三工程）。加熱処理は、熱圧着機、リフロー炉、加圧オーブンなどによって行うことができる。
　第一工程の一例を説明する。図６は、半導体チップに基板を仮圧着する工程の一例を示す工程図である。
　まず、図１の（ａ）に示されるように、半導体チップ本体１２、並びに、配線１５及び接続バンプ３０を有する半導体チップ１０を、基板本体２２、及び接続部としての配線１５を有する基板２０に、これらの間に接着剤層４０を配置しながら重ねあわせて、積層体３を形成させる。半導体チップ１０は、半導体ウエハのダイシングによって形成された後、ピックアップされて基板２０上まで搬送され、接続バンプ３０と基板２０の配線１５とが対向配置されるように、位置合わせされる。積層体３は、対向配置された一対の仮圧着用押圧部材としての圧着ヘッド４１及びステージ４２を有する押圧装置４３のステージ４２上で形成される。接続バンプ３０は、半導体チップ本体１２上に設けられた配線１５上に設けられている。基板２０の配線１５は、基板本体２２上の所定の位置に設けられている。接続バンプ３０及び配線１５は、それぞれ、金属材料によって形成された表面を有する。
　続いて、図１の（ｂ）に示されるように、積層体３を、仮圧着用押圧部材としてのステージ４２及び圧着ヘッド４１で挟むことによって加熱及び加圧し、それにより半導体チップ１０に基板２０を仮圧着する。図６の実施形態の場合、圧着ヘッド４１は、積層体３の半導体チップ１０側に配置され、ステージ４２は、積層体３の基板２０側に配置されている。
　ステージ４２及び圧着ヘッド４１のうち少なくとも一方が、仮圧着のために積層体３を加熱及び加圧する時に、半導体チップ１０の接続バンプ３０の表面を形成している金属材料の融点、及び基板２０の接続部としての配線１５の表面を形成している金属材料の融点よりも低い温度に加熱されてよい。
　第一工程における仮圧着時に、圧着ツール（仮圧着用押圧部材）が（フィルム状接着剤付き）半導体チップ１０をピックアップする際の温度（押圧部材の温度）は、圧着ツールの熱がコレット、半導体チップ１０等に転写しないように低温であることが好ましい。一方、仮圧着時の温度（押圧部材の温度）は、フィルム状接着剤の流動性を高め、巻き込み時のボイドを排除できるよう、高温に加熱されてもよいが、フィルム状接着剤の反応開始温度よりも低い温度であることが好ましい。また、冷却時間を短縮するため、圧着ツールが半導体チップ１０をピックアップする際の温度と仮圧着時の温度の差は小さくてもよい。その差が、１００℃以下、又は６０℃以下であってもよい。ピックアップする際と仮圧着時とで温度は一定であってもよい。両者の差が１００℃以下である場合は、圧着ツールの冷却の時間が短縮されて、生産性がより向上する傾向がある。なお、反応開始温度とはＤＳＣ（パーキンエルマー社製、ＤＳＣ－Ｐｙｉｒｓ１）を用いて、サンプル量１０ｍｇ、昇温速度１０℃／分、測定雰囲気：空気または窒素雰囲気の条件で測定したときのＯｎ－ｓｅｔ温度をいう。
　以上の観点から、ステージ４２及び／又は圧着ヘッド４１の温度は、半導体チップをピックアップする間は例えば３０℃以上１３０℃以下で、仮圧着のために積層体３を加熱及び加圧する間は例えば５０℃以上１５０℃以下であってもよい。
　第一工程における接続荷重は、バンプ数に依存するが、バンプの高さばらつき吸収、バンプ変形量の制御等を考慮して設定される。圧着の際に、ボイドを排除し、半導体チップ１０、又は、半導体チップ１０と基板２０の接続部金属が接続バンプに接触するために、荷重は大きくしてもよい。荷重が大きいと、ボイドを排除し易く、接続部の金属と接続バンプとが接触し易い。例えば、半導体チップ１０の１ピン（１バンプ）当り０．００９Ｎから０．２Ｎであってもよい。
　仮圧着にかかる圧着時間は、生産性向上の観点から、短時間に設定してもよい。短時間の圧着時間とは、接続形成中に接続部が２３０℃以上に加熱される時間（例えば、はんだ使用時の時間）が５秒以下であることをいう。接続時間は、４秒以下、又は３秒以下であってもよい。また、各圧着時間が冷却時間よりも短時間であると、より本発明の製造方法の効果が発現し得る。
　第二工程時においては、封止仮接続体を形成するための金型に、第一工程後の仮接続体（半導体パッケージ）を搬入し、その上に封止用樹脂６０を供給する。その後、封止用樹脂６０を押し流し、硬化させることで、封止仮接続体を形成する。
　第三工程時の加熱処理には、封止仮接続体における接続バンプ３０の金属の融点以上の温度が必要である。例えば、接続バンプ３０がはんだバンプであれば、２３０℃以上３３０℃以下であってもよい。低温であると接続バンプ３０の金属が溶融せず、十分な金属結合が形成されない傾向がある。
　第三工程における接続時間は生産性向上の観点から、短時間に設定してもよく、接続バンプ３０（はんだバンプ）を溶融させ、酸化膜及び表面の不純物を除去し、金属接合を接続部に形成できる程度の時間としてもよい。なお、短時間での接続とは、接続形成時間（本圧着時間）中に、接続バンプ３０がはんだバンプであれば２３０℃以上かかる時間が５秒以下であることをいう。接続時間は、４秒以下、又は３秒以下であってもよい。接続時間が短時間であるほど生産性が向上し易い。
　加熱処理は、封止仮接続体の接続バンプ３０の金属の融点以上の温度を加えることができれば特に制限されず、熱圧着機、リフロー炉、加圧オーブンなどで行うことができる。熱圧着機では、局所的に熱を加えることができるため、反り低減が期待できる。そのため、反り低減の観点からは、熱圧着機であってもよい。一方、生産性向上の観点からは、一度に多くのパッケージを加熱処理できるリフロー炉及び加圧オーブンであってもよい。
　第一工程（仮圧着）では複数の半導体チップ１０を圧着してもよい。この場合、例えば、ウエハ、インターポーザ、又、マップ基板上で、平面的に複数の半導体チップ１０を一つずつ仮圧着（第一工程）し、その後、一括で複数のチップを封止（第二工程）してもよい。
　また、ＴＳＶ構造のパッケージで多く見られるスタック圧着では、立体的に複数の半導体チップ１０を圧着する。この場合も複数の半導体チップ１０を一つずつ積み重ねて圧着（第一工程）し、その後、複数のチップを封止（第二工程）してもよい。
　第二の実施形態の半導体装置の製造方法は、接続部を有する半導体チップ及び接続部を有する配線回路基板を備え、それぞれの接続部が互いに電気的に接続された半導体装置、又は、接続部を有する複数の半導体チップを備え、それぞれの接続部が互いに電気的に接続された半導体装置の製造方法であって、接続部は金属からなり、
（ａ）半導体チップ及び配線回路基板、又は、半導体チップ同士を、間に半導体用接着剤を介した状態で、接続部の金属の融点より低い温度で、それぞれの接続部が互いに接触するように圧着し、仮接続体を得る第一工程と、
（ｂ）仮接続体の少なくとも一部を封止用樹脂を用いて封止し、封止仮接続体を得る第二工程と、
（ｃ）封止仮接続体を接続部の金属の融点以上の温度で加熱し、封止接続体を得る第三工程と、を備える。
　これにより、例えば図１（ｂ）又は図２（ｂ）に示される半導体装置を得ることができる。
　第二の実施形態は、接続バンプ３０を介さずに接続部同士が接続される点を除き、第一の実施形態と同様である。
＜半導体用接着剤＞
　半導体用接着剤は、重量平均分子量１００００以下の化合物及び硬化剤をはじめ、下記のとおり様々な成分を含有し得る。
（重量平均分子量１００００以下の化合物）
　重量平均分子量１００００以下の化合物としては特に制限はないが、共に含有される硬化剤と反応するものである。重量平均分子量が１００００以下と小さい成分は加熱時に分解等してボイドの原因となり得るが、硬化剤と反応することで高い耐熱性が確保され易い。このような化合物としては、例えば、エポキシ樹脂、（メタ）アクリル化合物、等が挙げられる。
（ｉ）エポキシ樹脂
　エポキシ樹脂としては、分子内に２個以上のエポキシ基を有するものであれば特に制限はない。エポキシ樹脂としては、例えば、ビスフェノールＡ型、ビスフェノールＦ型、ナフタレン型、フェノールノボラック型、クレゾールノボラック型、フェノールアラルキル型、ビフェニル型、トリフェニルメタン型、ジシクロペンタジエン型、各種多官能エポキシ樹脂などを使用することができる。これらは単独または２種以上の混合体として使用することができる。耐熱性、取り扱い性の観点から、ビスフェノールＦ型、フェノールノボラック型、クレゾールノボラック型、ビフェニル型、トリフェニルメタン型から選択してもよい。エポキシ樹脂の配合量は、半導体用接着剤の全体１００質量部に対して、例えば１０～５０質量部とすることができる。１０質量部以上の場合、硬化成分が十分に存在するため、硬化後も樹脂の流動を十分に制御し易く、５０質量部以下では、硬化物が硬くなりすぎず、パッケージの反りをより抑制できる傾向がある。
（ｉｉ）（メタ）アクリル化合物
　（メタ）アクリル化合物としては、分子内に１個以上の（メタ）アクリロイル基を有するものであれば特に制限はない。（メタ）アクリル化合物としては、例えば、ビスフェノールＡ型、ビスフェノールＦ型、ナフタレン型、フェノールノボラック型、クレゾールノボラック型、フェノールアラルキル型、ビフェニル型、トリフェニルメタン型、ジシクロペンタジエン型、フルオレン型、アダマンタン型、各種多官能アクリル化合物等を使用することができる。これらは単独または２種以上の混合体として使用することができる。（メタ）アクリル化合物の配合量は、半導体用接着剤の全体１００質量部に対して、１０～５０質量部、又は１５～４０質量部であってもよい。１０質量部以上の場合、硬化成分が十分に存在するため、硬化後も樹脂の流動を十分に制御し易くなる。５０質量部以下では、硬化物が硬くなりすぎず、パッケージの反りを更に抑制できる。
　（メタ）アクリル化合物は室温（２５℃）で固形であってもよい。液状に比べて固形の方が、ボイドが発生し難く、また、硬化前（Ｂステージ）の半導体用接着剤の粘性（タック）が小さく取り扱いに優れる。
　（メタ）アクリル化合物の官能基数は３以下であってもよい。官能基数が３以下であると、短時間での硬化が十分に進行し、硬化反応率の低下（硬化のネットワークが急速に進み、未反応基が残存する場合がある）をより抑制し易いため、硬化物特性がより向上し易い。
　重量平均分子量１００００以下の化合物の重量平均分子量は、耐熱性、流動性の観点から、１００～９０００、又は３００～７０００であってもよい。重量平均分子量の測定方法は、後述する重量平均分子量１００００超の高分子量成分の重量平均分子量の測定方法と同様である。
（硬化剤）
　硬化剤としては、例えば、フェノール樹脂系硬化剤、酸無水物系硬化剤、アミン系硬化剤、イミダゾール系硬化剤及びホスフィン系硬化剤、アゾ化合物、有機過酸化物等が挙げられる。
（ｉ）フェノール樹脂系硬化剤
　フェノール樹脂系硬化剤としては、分子内に２個以上のフェノール性水酸基を有するものであれば特に制限はない。フェノール樹脂系硬化剤としては、例えば、フェノールノボラック、クレゾールノボラック、フェノールアラルキル樹脂、クレゾールナフトールホルムアルデヒド重縮合物、トリフェニルメタン型多官能フェノール及び各種多官能フェノール樹脂を使用することができる。これらは単独で又は２種以上の混合物として使用することができる。
　上記エポキシ樹脂に対するフェノール樹脂系硬化剤の当量比（フェノール性水酸基／エポキシ基、モル比）は、良好な硬化性、接着性及び保存安定性の観点から、０．３～１．５、０．４～１．０、又は０．５～１．０であってもよい。当量比が０．３以上であると、硬化性が向上し接着力がより向上する傾向があり、１．５以下であると未反応のフェノール性水酸基が過剰に残存することがなく、吸水率が低く抑えられ、絶縁信頼性がより向上する傾向がある。
（ｉｉ）酸無水物系硬化剤
　酸無水物系硬化剤としては、例えば、メチルシクロヘキサンテトラカルボン酸二無水物、無水トリメリット酸、無水ピロメリット酸、ベンゾフェノンテトラカルボン酸二無水物及びエチレングリコールビスアンヒドロトリメリテートを使用することができる。これらは単独で又は２種以上の混合物として使用することができる。
　上記エポキシ樹脂に対する酸無水物系硬化剤の当量比（酸無水物基／エポキシ基、モル比）は、良好な硬化性、接着性及び保存安定性の観点から、０．３～１．５、０．４～１．０、又は０．５～１．０であってもよい。当量比が０．３以上であると、硬化性が向上し接着力がより向上する傾向があり、１．５以下であると未反応の酸無水物が過剰に残存することがなく、吸水率が低く抑えられ、絶縁信頼性がより向上する傾向がある。
（ｉｉｉ）アミン系硬化剤
　アミン系硬化剤としては、例えばジシアンジアミドを使用することができる。
　上記エポキシ樹脂に対するアミン系硬化剤の当量比（アミン／エポキシ基、モル比）は、良好な硬化性、接着性及び保存安定性の観点から０．３～１．５、０．４～１．０、又は０．５～１．０であってもよい。当量比が０．３以上であると、硬化性が向上し接着力がより向上する傾向があり、１．５以下であると未反応のアミンが過剰に残存することがなく、絶縁信頼性がより向上する傾向がある。
（ｉｖ）イミダゾール系硬化剤
　イミダゾール系硬化剤としては、例えば、２－フェニルイミダゾール、２－フェニル－４－メチルイミダゾール、１－ベンジル－２－メチルイミダゾール、１－ベンジル－２－フェニルイミダゾール、１－シアノエチル－２－ウンデシルイミダゾール、１－シアノ－２－フェニルイミダゾール、１－シアノエチル－２－ウンデシルイミダゾールトリメリテイト、１－シアノエチル－２－フェニルイミダゾリウムトリメリテイト、２，４－ジアミノ－６－［２’－メチルイミダゾリル－（１’）］－エチル－ｓ－トリアジン、２，４－ジアミノ－６－［２’－ウンデシルイミダゾリル－（１’）］－エチル－ｓ－トリアジン、２，４－ジアミノ－６－［２’－エチル－４’－メチルイミダゾリル－（１’）］－エチル－ｓ－トリアジン、２，４－ジアミノ－６－［２’－メチルイミダゾリル－（１’）］－エチル－ｓ－トリアジンイソシアヌル酸付加体、２－フェニルイミダゾールイソシアヌル酸付加体、２－フェニル－４，５－ジヒドロキシメチルイミダゾール、２－フェニル－４－メチル－５－ヒドロキシメチルイミダゾール、及び、エポキシ樹脂とイミダゾール類の付加体が挙げられる。これらの中でも、優れた硬化性、保存安定性及び接続信頼性の観点から、１－シアノエチル－２－ウンデシルイミダゾール、１－シアノ－２－フェニルイミダゾール、１－シアノエチル－２－ウンデシルイミダゾールトリメリテイト、１－シアノエチル－２－フェニルイミダゾリウムトリメリテイト、２，４－ジアミノ－６－［２’－メチルイミダゾリル－（１’）］－エチル－ｓ－トリアジン、２，４－ジアミノ－６－［２’－エチル－４’－メチルイミダゾリル－（１’）］－エチル－ｓ－トリアジン、２，４－ジアミノ－６－［２’－メチルイミダゾリル－（１’）］－エチル－ｓ－トリアジンイソシアヌル酸付加体、２－フェニルイミダゾールイソシアヌル酸付加体、２－フェニル－４，５－ジヒドロキシメチルイミダゾール及び２－フェニル－４－メチル－５－ヒドロキシメチルイミダゾールから選択してもよい。これらは単独で又は２種以上を併用して用いることができる。また、これらをマイクロカプセル化した潜在性硬化剤としてもよい。
　イミダゾール系硬化剤の含有量は、エポキシ樹脂１００質量部に対して、０．１～２０質量部、又は０．１～１０質量部であってもよい。イミダゾール系硬化剤の含有量が０．１質量部以上であると硬化性が向上する傾向があり、２０質量部以下であると金属接合が形成される前に半導体用接着剤が硬化し難いため、接続不良が発生し難い傾向がある。
（ｖ）ホスフィン系硬化剤
　ホスフィン系硬化剤としては、例えば、トリフェニルホスフィン、テトラフェニルホスホニウムテトラフェニルボレート、テトラフェニルホスホニウムテトラ（４－メチルフェニル）ボレート及びテトラフェニルホスホニウム（４－フルオロフェニル）ボレートが挙げられる。
　ホスフィン系硬化剤の含有量は、エポキシ樹脂１００質量部に対して、０．１～１０質量部、又は０．１～５質量部であってもよい。ホスフィン系硬化剤の含有量が０．１質量部以上であると硬化性が向上する傾向があり、１０質量部以下であると金属接合が形成される前に半導体用接着剤が硬化し難いため、接続不良が発生し難い傾向がある。
　フェノール樹脂系硬化剤、酸無水物系硬化剤及びアミン系硬化剤は、それぞれ１種を単独で又は２種以上の混合物として使用することができる。イミダゾール系硬化剤及びホスフィン系硬化剤はそれぞれ単独で用いてもよいが、フェノール樹脂系硬化剤、酸無水物系硬化剤又はアミン系硬化剤と共に用いてもよい。
（ｖｉ）有機過酸化物
　有機過酸化物としては、例えば、ケトンパーオキサイド、パーオキシケタール、ハイドロパーオキサイド、ジアルキルパーオキサイド、ジアシルパーオキサイド、パーオキシジカーボネイト、パーオキシエステル等が挙げられる。保存安定性の観点から、ハイドロパーオキサイド、ジアルキルパーオキサイド、パーオキシエステルから選択してもよい。さらに、耐熱性の観点から、ハイドロパーオキサイド、ジアルキルパーオキサイドから選択してもよい。
　有機過酸化物の含有量は（メタ）アクリル化合物の全重量に対して０．５～１０重量％、又は１～５重量％であってもよい。０．５重量％以上の場合、十分に硬化が進行し易く、１０重量％以下の場合、硬化が急激に進行して反応点が多くなるために分子鎖が短くなったり、未反応基が残存したりして信頼性が低下することを抑制できる傾向がある。
　上記有機過酸化物は単独または２種以上の混合体として使用することができる。
　エポキシ樹脂及び（メタ）アクリル化合物と、硬化剤（ｉ）～（ｖｉ）との組み合わせは、硬化が進行すれば特に制限はない。エポキシ樹脂と組み合わせる硬化剤は、取り扱い性、保存安定性、硬化性の観点から、フェノールとイミダゾール、酸無水物とイミダゾール、アミンとイミダゾール、又はイミダゾール単独から選択してもよい。短時間で接続すると生産性が向上することから、速硬化性に優れたイミダゾールを単独で用いてもよい。短時間で硬化すると低分子成分等の揮発分が抑制できることから、ボイド発生抑制も可能である。（メタ）アクリル化合物と組み合わせる硬化剤は、取り扱い性、保存安定性の観点から、有機過酸化物であってもよい。
　硬化反応率は８０％以上、又は９０％以上であってもよい。２００℃（はんだ溶融温度以下）／５ｓの硬化反応率が８０％以上であると、接続時（はんだ溶融温度以上）ではんだが流動・飛散が起こり難く、接続不良及び絶縁信頼性不良が発生し難い傾向がある。
　硬化系はラジカル重合系であってもよい。例えば、重量平均分子量１００００以下の化合物としては、アニオン重合のエポキシ樹脂（エポキシ－硬化剤の硬化系）と比較してラジカル重合の（メタ）アクリル化合物（アクリル－過酸化物の硬化系）が好ましい。アクリル硬化系の方が硬化反応率が高いため、ボイドをより抑制し易く、接続部金属の流動・飛散がより抑制し易い。アニオン重合のエポキシ樹脂等を含有すると、硬化反応率が８０％以上になる事が難しい場合がある。エポキシ樹脂を併用する場合には、（メタ）アクリル化合物８０質量部に対してエポキシ樹脂は２０質量部以下であってもよい。アクリル硬化系を単独で用いてもよい。
（シラノール化合物）
　シラノール化合物は、下記一般式（１）で表されるものである。
Figure JPOXMLDOC01-appb-C000003
 ［式中、Ｒ１はアルキル基又はフェニル基を示し、Ｒ２はアルキレン基を示す。］
　シラノール化合物は、耐熱性の観点から、２５℃で固形であってもよい。Ｒ１は耐熱性、流動性の観点からアルキル基又はフェニル基であってもよい。アルキル基とフェニル基の混合でもよい。Ｒ１で示される基としては、例えば、フェニル系、プロピル系、フェニルプロピル系、フェニルメチル系等が挙げられる。Ｒ２は特に制限はない。耐熱性の観点から重量平均分子量１００～５０００のアルキレン基であってもよい。高反応性（硬化物強度）の観点から３官能シラノールであってもよい。
　半導体用接着剤にシラノール化合物を添加することで、流動性が向上しボイド抑制性と高接続性が向上する。流動性が向上する（粘度が下がる）とチップコンタクト時に巻き込んだボイドを排除し易くなる。耐熱性の高い（熱重量減少量の小さい）シラノール化合物を用いることでボイド発生をより抑制できる。熱重量減少量が小さいと揮発分が少ないためボイドが減少し、信頼性（耐リフロ性）もより向上する。
　シラノール化合物の含有量は、半導体用接着剤総量を基準として２～２０質量％であってもよく、高流動化と硬化物強度（接着力等）の観点から、２～１０質量％、又は２～９質量％であってもよい。含有量が２質量％以上であると効果（高流動化）が発現し易く、２０質量％以下であると硬化強度が増加して高い接着力が発現する傾向がある。含有量がある程度少ないと、エポキシ樹脂又はアクリル樹脂の硬化物の比率が大きくなるため、より高い接着力が発現されると推測される。
（重量平均分子量１００００超の高分子量成分）
　重量平均分子量１００００超の高分子量成分は、エポキシ樹脂、フェノキシ樹脂、ポリイミド樹脂、ポリアミド樹脂、ポリカルボジイミド樹脂、シアネートエステル樹脂、アクリル樹脂、ポリエステル樹脂、ポリエチレン樹脂、ポリエーテルスルホン樹脂、ポリエーテルイミド樹脂、ポリビニルアセタール樹脂、ウレタン樹脂、アクリルゴム等が挙げられる。その中でも耐熱性およびフィルム形成性に優れるエポキシ樹脂、フェノキシ樹脂、ポリイミド樹脂、アクリル樹脂、アクリルゴム、シアネートエステル樹脂、ポリカルボジイミド樹脂等から選択してもよい。さらに耐熱性、フィルム形成性に優れるエポキシ樹脂、フェノキシ樹脂、ポリイミド樹脂、アクリル樹脂、アクリルゴムから選択してもよい。これらの高分子量成分は単独または２種以上の混合体又は共重合体として使用することもできる。
　半導体用接着剤がエポキシ樹脂を含む場合、重量平均分子量１００００超の高分子量成分とエポキシ樹脂の重量比は、特に制限されない。フィルム状を保持し易いことから、重量平均分子量１００００超の高分子量成分１重量部に対して、エポキシ樹脂が０．０１～５重量部、０．０５～４重量部、又は０．１～３重量部であってもよい。この重量比が０．０１重量部以上であると、硬化性が向上して接着力が更に向上する傾向がある。この重量比が５重量部以下であると、フィルム形成性及び膜形成性が特に優れる傾向がある。
　半導体用接着剤が（メタ）アクリル化合物を含む場合、重量平均分子量１００００超の高分子量成分と（メタ）アクリル化合物の重量比は、特に制限されない。重量平均分子量１００００超の高分子量成分１重量部に対して、（メタ）アクリル化合物は０．０１～１０重量部、０．０５～５重量部、又は０．１～５重量部であってもよい。この重量比が０．０１重量部以上であると、硬化性が向上して接着力が更に向上する傾向がある。この重量比が１０重量部より大きいとフィルム形成性が特に優れる傾向がある。
　重量平均分子量１００００超の高分子量成分のガラス転移温度（Ｔｇ）は、半導体用接着剤の基板及びチップへの貼付性に優れる観点から、１２０℃以下、１００℃以下、又は８５℃以下であってもよい。Ｔｇが１２０℃以下であると、半導体チップに形成されたバンプ、基板に形成された電極又は配線パターン等の凹凸を接着剤組成物により埋め込み易くなるため、気泡が残存し難くなりボイドが発生し難くなる傾向がある。なお、上記Ｔｇとは、ＤＳＣ（パーキンエルマー社製ＤＳＣ－７型）を用いて、サンプル量１０ｍｇ、昇温速度１０℃／分、測定雰囲気：空気の条件で測定したときのＴｇである。
　重量平均分子量１００００超の高分子量成分の重量平均分子量は、ポリスチレン換算で１００００超であるが、単独でより良好なフィルム形成性を示すために、３００００以上、４００００以上、又は５００００以上であってもよい。重量平均分子量が１００００を超える場合にはフィルム形成性が特に優れる傾向がある。なお、本明細書において、重量平均分子量とは、高速液体クロマトグラフィー（島津製作所製Ｃ－Ｒ４Ａ）を用いて、ポリスチレン換算で測定したときの重量平均分子量を意味する。
　半導体用接着剤にはフラックス成分、すなわち、フラックス活性（酸化物及び不純物を除去する活性）を示す化合物であるフラックス活性剤を含有することができる。フラックス活性剤としては、イミダゾール類及びアミン類のように非共有電子対を有する含窒素化合物、カルボン酸類、フェノール類、並びにアルコール類が挙げられる。アルコール等に比べて有機酸の方がフラックス活性を強く発現し、接続性がより向上する傾向がある。カルボン酸は、接続性及び安定性をより向上させることができる。
　半導体用接着剤には、粘度及び硬化物の物性を制御するため、並びに、半導体チップ同士又は半導体チップと基板とを接続した際のボイドの発生及び吸湿率の抑制のために、フィラを配合してもよい。絶縁性無機フィラとしては、例えば、ガラス、シリカ、アルミナ、酸化チタン、カーボンブラック、マイカ、窒化ホウ素等が挙げられ、その中でも、取扱い性の観点から、シリカ、アルミナ、酸化チタン、窒化ホウ素等から選択してもよいし、形状統一性（取扱い性）の観点から、シリカ、アルミナ、窒化ホウ素から選択してもよい。ウィスカーとしてはホウ酸アルミニウム、チタン酸アルミニウム、酸化亜鉛、珪酸カルシウム、硫酸マグネシウム、窒化ホウ素等が挙げられる。樹脂フィラとしては、ポリウレタン、ポリイミド、メタクリル酸メチル樹脂、メタクリル酸メチル－ブタジエン－スチレン共重合樹脂（ＭＢＳ）などを用いることができる。これらのフィラおよびウィスカーは単独または２種以上の混合体として使用することもできる。フィラの形状、粒径、および配合量については、特に制限されない。
　分散性及び接着力向上の観点から、表面処理フィラであってもよい。表面処理としては、グリシジル系（エポキシ系）、アミン系、フェニル系、フェニルアミノ系、アクリル系、ビニル系等が挙げられる。
　これらのフィラおよびウィスカーは単独または２種以上の混合体として使用することもできる。フィラの形状、粒径、および配合量については、特に制限されない。また、表面処理によって物性を適宜調整してもよい。
　粒径に関しては、フリップチップ接続時のかみ込み防止の観点から、平均粒径が１．５μｍ以下であってもよく、視認性（透明性）の観点から、平均粒径が１．０μｍ以下であってもよい。
　表面処理としては、表面処理のし易さから、エポキシシラン系、アミノシラン系、アクリルシラン系等のシラン化合物によるシラン処理であってもよい。
　表面処理剤は、分散性及び流動性に優れ、接着力を更に向上させる観点から、グリシジル系、フェニルアミノ系、アクリル系、メタクリル系の化合物から選ばれる化合物であってもよい。表面処理剤は、保存安定性の観点から、フェニル系、アクリル系、メタクリル系の化合物から選ばれる化合物であってもよい。
　樹脂フィラは無機フィラに比べて、２６０℃等の高温で柔軟性を付与することができるため、耐リフロ性向上に適している。また、柔軟性付与のため、フィルム形成性向上にも効果がある。
　絶縁信頼性の観点から、フィラは絶縁性であってもよい。銀フィラ、はんだフィラ等導電性の金属フィラは含有していない半導体用接着剤であってもよい。
　フィラの配合量は、半導体用接着剤の固形分全体を基準として、３０～９０質量％、又は４０～８０質量％であってもよい。この配合量が３０質量％以上であると、放熱性が高くなり易く、また、ボイド発生及び吸湿率を更に抑制することができる傾向がある。９０質量％以下であると、粘度が高くなって接着剤組成物の流動性の低下及び接続部へのフィラの噛み込み（トラッピング）が生じることを抑制し易いため、接続信頼性がより向上する傾向がある。
　さらに、半導体用接着剤には、イオントラッパー、酸化防止剤、シランカップリング剤、チタンカップリング剤、レベリング剤等を配合してもよい。これらは１種を単独で用いてもよいし、２種以上組み合わせて用いてもよい。これらの配合量については、各添加剤の効果が発現するように適宜調整すればよい。
　半導体用接着剤は２００℃以上の高温での圧着が可能である。また、はんだ等金属を溶融させて接続を形成するフリップチップパッケージではより効果を発現する。
　半導体用接着剤はフィルム状であってもよい。フィルム状であると生産性が向上する傾向がある。
　半導体用接着剤（フィルム状）の作製方法の一例は次のとおりである。重量平均分子量１００００超の高分子量成分、重量平均分子量１００００以下の化合物、硬化剤、フィラ、その他添加剤等を有機溶媒中に加え、攪拌混合、混錬などにより、溶解または分散させて、樹脂ワニスを調製する。その後、離型処理を施した基材フィルム上に、樹脂ワニスをナイフコーター、ロールコーター、アプリケーター、ダイコーター、又はコンマコーター等を用いて塗布した後、加熱により有機溶媒を減少させて、基材フィルム上にフィルム状接着剤を形成する。また、加熱により有機溶媒を減少させる前に、樹脂ワニスをウエハなどにスピンコートして膜を形成して、その後、溶媒乾燥を行う方法で、ウエハ上に半導体用接着剤を形成してもよい。
　基材フィルムとしては、有機溶媒を揮発させる際の加熱条件に耐え得る耐熱性を有するものであれば特に制限はない。基材フィルムとしては、ポリエステルフィルム、ポリプロピレンフィルム、ポリエチレンテレフタレートフィルム、ポリイミドフィルム、ポリエーテルイミドフィルム、ポリエーテルナフタレートフィルム、メチルペンテンフィルム等が例示できる。基材フィルムは、これらのフィルムからなる単層のものに限られず、２種以上の材料からなる多層フィルムであってもよい。
　塗布後の樹脂ワニスから有機溶媒を揮発させる際の条件は、例えば、５０～２００℃、０．１～９０分間の加熱を行うことであってもよい。実装後のボイド及び粘度調整に影響がなければ、有機溶媒が１．５質量％以下まで揮発する条件としてもよい。
　半導体用接着剤は、接続バンプ３０又はバンプ３２の融点よりも低い温度（８０～１３０℃）で圧着する第一工程（仮圧着）時の溶融粘度が、流動性を高め、巻き込みボイドをより排除できるよう、６０００Ｐａ・ｓ以下、５５００Ｐａ・ｓ以下、５０００Ｐａ・ｓ以下、又は４０００Ｐａ・ｓ以下であってもよい。ただし、溶融粘度が低すぎると樹脂がチップ側面を這い上がり、圧着ツールに付着し、生産性を低下させる傾向がある。そのため、仮圧着時の溶融粘度は１０００Ｐａ・ｓ以上であってもよい。溶融粘度は、例えばレオメーター（アントンパール　ジャパン社製、ＭＣＲ３０１）を用いて測定することができる。
＜封止用樹脂＞
　封止用樹脂としては、半導体装置の封止用に用いられる樹脂であれば特に制限されない。そのような樹脂としては、例えばビスフェノールＡ型エポキシ樹脂、ビスフェノールＦ型エポキシ樹脂、ビスフェノールＡＤ型エポキシ樹脂、ビスフェノールＳ型エポキシ樹脂、ナフタレンジオール型エポキシ樹脂、水添ビスフェノールＡ型エポキシ樹脂、グリシジルアミン型エポキシ樹脂等が挙げられる。
　以下、実施例を用いて本発明を説明するが、本発明はこれらによって制限されるものではない。
＜フィルム状接着剤の作製＞
　使用した化合物を以下に示す。
（ｉ）重量平均分子量１００００超の高分子量成分
　アクリルゴム（日立化成株式会社製、ＫＨ－Ｃ８６５、Ｔｇ：０～１２℃、Ｍｗ：４５００００～６５００００）
　フェノキシ樹脂（東都化成株式会社、ＺＸ－１３５６－２、Ｔｇ：約７１℃、Ｍｗ：約６３０００）
（ｉｉ）重量平均分子量１００００以下の化合物：（メタ）アクリル化合物
　フルオレン骨格アクリレート（大阪ガスケミカル株式会社、ＥＡ０２００、２官能基）
（ｉｉｉ）重量平均分子量１００００以下の化合物：エポキシ樹脂
　トリフェノールメタン骨格含有多官能固形エポキシ（三菱化学株式会社、ＥＰ１０３２Ｈ６０）
　ビスフェノールＦ型液状エポキシ（三菱化学株式会社、ＹＬ９８３Ｕ）
（ｉｖ）硬化剤
　ジクミル過酸化物（日油株式会社、パークミルＤ）
　２，４－ジアミン－６［２’－メチルイミダゾリル－（１’）－エチル－ｓ－トリアジンイソシアヌル酸付加体（四国化成株式会社、２ＭＡＯＫ－ＰＷ））
（ｖ）無機フィラ
　シリカフィラ（株式会社アドマテックス、ＳＥ２０５０、平均粒径０．５μｍ）
　エポキシシラン表面処理シリカフィラ（株式会社アドマテックス、ＳＥ２０５０ＳＥＪ、平均粒径０．５μｍ）
　メタクリル表面処理ナノシリカフィラ（株式会社アドマテックス、ＹＡ０５０Ｃ－ＳＭ、以下ＳＭナノシリカとする、平均粒径約５０ｎｍ）
（ｖｉ）樹脂フィラ
　有機フィラ（ロームアンドハースジャパン株式会社製、ＥＸＬ－２６５５：コアシェルタイプ有機微粒子）
（ｖｉｉ）フラックス剤
　２－メチルグルタル酸（アルドリッチ、融点：約７７℃）
（フィルム状接着剤の作製方法）
　表１に示す質量割合の（メタ）アクリル化合物又はエポキシ樹脂、無機フィラ、樹脂フィラ及びフラックス剤に対し、ＮＶ６０％（溶媒４０質量％に対し、液状成分、固形成分、フィラ等の接着剤を構成する成分全てが６０質量％）になるように有機溶媒（メチルエチルケトン）を添加した。その後、Φ１．０ｍｍ及びΦ２．０ｍｍのビーズを固形分と同重量加え、ビーズミル（フリッチュ・ジャパン株式会社、遊星型微粉砕機Ｐ－７）で３０分撹拌した。その後、高分子量成分を加え、再度、ビーズミルで３０分撹拌した。撹拌後、硬化剤を添加して攪拌し、その後に用いたビーズをろ過によって除去し、二種類の樹脂ワニスを得た。
　作製した各樹脂ワニスを、表面が離型処理された基材フィルム上に小型精密塗工装置（株式会社廉井精機製）でそれぞれ塗工し、塗工された樹脂ワニスをクリーンオーブン（エスペック株式会社製）で乾燥（７０℃／１０ｍｉｎ）することで、二種類のフィルム状接着剤Ａ及びＢを得た。
Figure JPOXMLDOC01-appb-T000004
＜半導体装置の製造＞
（実施例１）
工程１：上記にて作製したフィルム状接着剤を切り抜き（８ｍｍ×８ｍｍ×０．０４５ｍｍｔ）、基板（２０ｍｍ×２７ｍｍ、０．４１ｍｍ厚、接続部金属：Ｃｕ（ＯＳＰ処理）、製品名：ＨＣＴＥＧ－Ｐ１１８０－０２、日立化成エレクトロニクス株式会社製）上に貼付した。その上に、はんだバンプ付き半導体チップ（チップサイズ：７．３ｍｍ×７．３ｍｍ×０．１５ｍｍｔ、バンプ高さ：銅ピラー＋はんだ計約４５μｍ、バンプ数３２８ピン、ピッチ８０μｍ、製品名：ＳＭ４８７Ａ－ＨＣ－ＰＬＴ、住友商事九州株式会社製）を、熱圧着機（ＦＣＢ３、パナソニック株式会社製）を用いて、ステージ温度８０℃、仮圧着温度１３０℃、仮圧着時間２秒間の条件で仮圧着した。
工程２：仮圧着を行った半導体パッケージ（仮接続体）に対し、モールド装置（株式会社テクノマルチシ製）を用いて、チップ上面の封止を行い、封止体（封止仮接続体）を形成した。
工程３：得られた封止体に対し、上記熱圧着機（ＦＣＢ３、パナソニック株式会社製）を用いてステージ温度８０℃、圧着温度２８０℃で加熱処理を行い、半導体装置（封止接続体）を作製した。
（その他の実施例）
　表２に示すように、加熱処理を熱圧着機（ＦＣＢ３、パナソニック株式会社製）又はリフロー装置（株式会社タムラ製作所製）を用いて行ったこと、フィルム状接着剤としてフィルム状接着剤Ａ又はＢを用いたこと、そして仮圧着温度を１３０℃（フィルム状接着剤Ａを用いた場合）又は８０℃（フィルム状接着剤Ｂを用いた場合）、としたこと以外は、実施例１と同様にして半導体装置を作製した。
（比較例）
　表２に示すように、加熱処理を熱圧着機（ＦＣＢ３、パナソニック株式会社製）又はリフロー装置（株式会社タムラ製作所製）を用いて行ったこと、フィルム状接着剤としてフィルム状接着剤Ａ又はＢを用いたこと、工程２と工程３とを入れ替えたこと、そして仮圧着温度を１３０℃（フィルム状接着剤Ａを用いた場合）又は８０℃（フィルム状接着剤Ｂを用いた場合）、としたこと以外は、実施例１と同様にして半導体装置を作製した。なお、工程２と工程３とを入れ替えるとは、基板と半導体チップとの接続が完了した後に、モールド装置を用いて封止処理を行ったということである。
＜評価＞
・溶融粘度評価
　上記にて作製したフィルム状接着剤に対し、レオメーター（アントンパール　ジャパン社製、ＭＣＲ３０１）及び治具（ディスポーザブルプレート（直径８ｍｍ）とディスポーザブルサンプルディッシュ）を用いて、サンプル厚み４００μｍ、昇温速度１０℃／分、周波数１Ｈｚ、の条件で、工程１（仮圧着温度：８０～１３０℃）における溶融粘度を測定した。結果を表２に示す。
・反り評価
　上記にて作製した各半導体装置に対し、非接触式形状測定装置（ＳＯＮＹ製）を用いて、チップの対角方向の２辺の形状を計測した。ＥＸＣＥＬを用いて、計測データの傾きを補正し、１辺の凹凸の最大値と最小値の差を反り量（μｍ）とした。結果を表２に示す。
Figure JPOXMLDOC01-appb-T000005
　１０…半導体チップ、１２…半導体チップ本体、１５…配線（接続部）、２０…基板（配線回路基板）、２２…基板本体、３０…接続バンプ、３２…バンプ（接続部）、３４…貫通電極、４０…接着剤層、５０…インターポーザ、６０…封止用樹脂、１００，２００，３００，４００，５００，６００，７００…半導体装置。

Claims (10)

  1. 　接続部を有する半導体チップ及び接続部を有する配線回路基板を備え、それぞれの前記接続部が互いに電気的に接続された半導体装置、又は、接続部を有する複数の半導体チップを備え、それぞれの前記接続部が互いに電気的に接続された半導体装置の製造方法であって、
    　前記接続部は金属からなり、
    （ａ）前記半導体チップ及び前記配線回路基板、又は、前記半導体チップ同士を、間に半導体用接着剤を介した状態で、前記接続部の金属の融点より低い温度で、それぞれの前記接続部が互いに接触するように圧着し、仮接続体を得る第一工程と、
    （ｂ）前記仮接続体の少なくとも一部を封止用樹脂を用いて封止し、封止仮接続体を得る第二工程と、
    （ｃ）前記封止仮接続体を前記接続部の金属の融点以上の温度で加熱し、封止接続体を得る第三工程と、
    を備える、半導体装置の製造方法。
  2. 　接続部を有する半導体チップ及び接続部を有する配線回路基板を備え、それぞれの前記接続部が接続バンプを介して互いに電気的に接続された半導体装置、又は、接続部を有する複数の半導体チップを備え、それぞれの前記接続部が接続バンプを介して互いに電気的に接続された半導体装置の製造方法であって、
    　前記接続部及び前記接続バンプは金属からなり、
    （ａ）前記半導体チップ及び前記配線回路基板、又は、前記半導体チップ同士を、間に半導体用接着剤を介した状態で、前記接続バンプの金属の融点より低い温度で、それぞれの前記接続部が前記接続バンプに接触するように圧着し、仮接続体を得る第一工程と、
    （ｂ）前記仮接続体の少なくとも一部を封止用樹脂を用いて封止し、封止仮接続体を得る第二工程と、
    （ｃ）前記封止仮接続体を前記接続バンプの金属の融点以上の温度で加熱し、封止接続体を得る第三工程と、
    を備える、半導体装置の製造方法。
  3. 　前記第一工程では、前記半導体チップ及び前記配線回路基板、又は、前記半導体チップ同士を、対向する一対の押圧部材で挟むことによって加熱及び加圧することにより、圧着する、請求項１又は２に記載の半導体装置の製造方法。
  4. 　前記半導体用接着剤が、重量平均分子量１００００以下の化合物及び硬化剤を含有し、８０～１３０℃における溶融粘度が６０００Ｐａ・ｓ以下である、請求項１～３のいずれか一項に記載の半導体装置の製造方法。
  5. 　前記半導体用接着剤が、重量平均分子量１００００以下の化合物、硬化剤、及び下記一般式（１）で表されるシラノール化合物を含有する、請求項１～４のいずれか一項に記載の半導体装置の製造方法。
    Figure JPOXMLDOC01-appb-C000001
     ［式中、Ｒ１はアルキル基又はフェニル基を示し、Ｒ２はアルキレン基を示す。］
  6. 　前記Ｒ１がフェニル基である、請求項５に記載の半導体装置の製造方法。
  7. 　前記シラノール化合物が２５℃で固形である、請求項５又は６に記載の半導体装置の製造方法。
  8. 　前記半導体用接着剤が、重量平均分子量１００００超の高分子量成分を含有する、請求項１～７のいずれか一項に記載の半導体装置の製造方法。
  9. 　前記高分子量成分が、重量平均分子量３００００以上であり且つガラス転移温度が１００℃以下の成分である、請求項８に記載の半導体装置の製造方法。
  10. 　前記半導体用接着剤がフィルム状である、請求項１～９のいずれか一項に記載の半導体装置の製造方法。
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