TWI820200B - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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TWI820200B
TWI820200B TW108131588A TW108131588A TWI820200B TW I820200 B TWI820200 B TW I820200B TW 108131588 A TW108131588 A TW 108131588A TW 108131588 A TW108131588 A TW 108131588A TW I820200 B TWI820200 B TW I820200B
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semiconductor wafer
semiconductor device
manufacturing
adhesive layer
semiconductor
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TW108131588A
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TW202036738A (zh
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上野恵子
本田一尊
小川剛
柳田裕貴
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日商力森諾科股份有限公司
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Abstract

本揭示的製造方法用以製造半導體裝置，所述半導體裝置包括：第一構件，具有第一連接部且具有呈直線狀延伸的邊；第二構件，具有第二連接部；以及接著劑層，配置於第一構件及第二構件之間。本揭示的製造方法包括：積層步驟，準備第一構件、接著劑層及第二構件依次積層而成的積層體；以及壓接步驟，於對積層體沿厚度方向施加按壓力的狀態下，對積層體照射用於加熱的雷射，於壓接步驟中，以從第一構件的邊的一端的周緣部朝向另一端的周緣部依次形成有雷射照射部、雷射非照射部及雷射照射部的方式，對積層體照射雷射。

Description

半導體裝置及其製造方法
本揭示是有關於一種半導體裝置及其製造方法。
先前，半導體晶片(chip)與基板的連接一直廣泛地應用打線接合(wire bonding)。打線接合是使用金線等金屬細線將半導體晶片與基板連接的方式。為了應對針對半導體裝置的高功能化、高積體化及高速化等要求，被稱為覆晶連接(FC(flip chip)連接)的方式正在推廣。FC連接是於半導體晶片或基板上形成被稱為凸塊(bump)的導電性突起，於半導體晶片與基板間直接連接的方式。
作為FC連接的形態，已知有以下方法：使用焊料、錫、金、銀及銅等進行金屬接合的方法；施加超音波振動而進行金屬接合的方法；藉由樹脂的收縮力來保持機械接觸的方法等。該些方法中，就連接部的可靠性的觀點而言，通常是使用焊料、錫、金、銀及銅等進行金屬接合的方法。
作為將半導體晶片與基板連接的方式，已知有板上晶片(Chip On Board，COB)型的連接方式。COB為FC連接的一種。另外，將半導體晶片與半導體晶片連接的疊層晶片(Chip On Chip，CoC)、以及將半導體晶片與具有凸塊或配線的半導體晶圓 連接的晶片堆疊晶圓(Chip On Wafer，CoW)亦被分類為FC連接。專利文獻1揭示了半導體晶圓的接合方法。
[現有技術文獻]
[專利文獻]
專利文獻1：日本專利特開2008-294382號公報
如上所述，半導體裝置(以下，視情況稱為「封裝體」)強烈要求高功能化，具體而言，要求薄型化、小型化、針腳(凸塊及/或配線)數的增加、間距或間隙的狹小化。作為製作要求進一步的小型化、薄型化及高功能化的封裝體的技術，將所述連接方式進行多段化的晶片堆疊(chip stack)型封裝、封裝堆疊封裝(Package On Package，POP)、矽通孔(Through-Silicon Via，TSV)等技術亦開始廣泛普及。該些技術將構件配置成立體狀而非平面狀，因此可減小封裝，另外對於半導體裝置的性能提高及雜訊減少、安裝面積的削減、省電力化亦有效，作為下一代的配線技術而受到矚目。
就低成本化及高生產性化的觀點而言，存在封裝體組裝時的半導體晶片間隔變窄的傾向。藉由使相鄰的半導體晶片的間隔變窄，可於基板上或晶圓上搭載大量的半導體晶片，可實現低成本化。另外，藉由使相鄰的半導體晶片的間隔變窄，可於小範圍內組裝不同種類的半導體晶片，亦可實現高密度安裝。
且說，於經由接著劑層將半導體晶片壓接於基板或半導體晶圓上來確保連接的情況下，接著劑層的形狀大多為與半導體晶片相同的正方形或長方形。於壓接步驟後，構成接著劑層的樹脂材料自半導體晶片滲出的部分被稱為焊點(fillet)。於壓接時，樹脂材料呈圓狀流動，因此與半導體晶片的邊部分的焊點相比，半導體晶片的角部的焊點變小。半導體晶片的角部(半導體晶片的邊的端部)的焊點被稱為覆蓋範圍(coverage)。
於半導體晶片的角部不存在焊點(接著劑)的情況下，半導體裝置的可靠性有下降的傾向。為了確保覆蓋範圍，考慮提高接著劑的流動性，或者使壓接時的條件高負荷化或高溫化。但是，即便可利用該些方法確保覆蓋範圍，另一方面，半導體晶片的邊的焊點變大，難以實現低成本化及高密度安裝。即，難以兼具減小半導體晶片的邊的焊點與確保覆蓋範圍。
本揭示的目的在於提供一種半導體晶片的邊的焊點小且覆蓋範圍得到確保的半導體裝置及其製造方法。
本揭示的製造方法用以製造半導體裝置，所述半導體裝置包括：第一構件，具有第一連接部且具有呈直線狀延伸的邊；第二構件，具有第二連接部；以及接著劑層，配置於第一構件與第二構件之間，並且第一連接部與第二連接部電氣連接。
本揭示的第一形態的製造方法包括：積層步驟，準備第一構件、接著劑層及第二構件依次積層而成的積層體；以及壓接 步驟，於對積層體沿厚度方向施加按壓力的狀態下，對積層體照射用於加熱的雷射，於壓接步驟中，以從第一構件的邊的一端的周緣部朝向另一端的周緣部依次形成有雷射照射部、雷射非照射部及雷射照射部的方式，對積層體照射雷射。
根據第一形態的製造方法，藉由將具有呈直線狀延伸的邊的第一構件(例如正方形或長方形的半導體晶片)的角部設為雷射照射部，將其之間設為雷射非照射部，可利用雷射對角部進行局部加熱，可確保第一構件的角部的覆蓋範圍且可抑制第一構件的邊的焊點。
本揭示的第二形態的製造方法包括：積層步驟，準備第一構件、接著劑層及第二構件依次積層而成的積層體；以及壓接步驟，於對積層體沿厚度方向施加按壓力的狀態下，對積層體施加熱，第一構件為具有正方形或長方形的形狀的半導體晶片，於壓接步驟中，以滿足以下的條件1的方式，對積層體施加熱。
<條件1>
於將半導體晶片的邊三等分而分割為合計九個區域，將該九個區域中包含半導體晶片的一個角部的區域設為區域1，將從區域1沿著半導體晶片的周緣部排列的區域設為區域2~區域8時，區域1、區域3、區域5、區域7的各中心部的半導體晶片的外表面的平均溫度Tc與區域2、區域4、區域6、區域8的各中心部的半導體晶片的外表面的平均溫度Ts之差(Tc-Ts)為15℃以上。
根據第二形態的製造方法，藉由局部提高半導體晶片的 角部(區域1、區域3、區域5、區域7)的溫度，可確保第一構件的角部的覆蓋範圍且抑制第一構件的邊的焊點。再者，於第二形態的製造方法中，於藉由雷射照射加熱積層體的情況下，區域2、區域4、區域6、區域8可為雷射非照射部，亦可並非為雷射非照射部。例如亦可對區域2、區域4、區域6、區域8照射比區域1、區域3、區域5、區域7少的能量的雷射照射。
就更高度地確保覆蓋範圍且抑制焊點的觀點而言，較佳為於第二形態的製造方法的壓接步驟中，以更滿足以下條件2的方式對積層體施加熱。
<條件2>
於所述九個區域中，若將包含半導體晶片的中心的區域設為區域9，則區域2、區域4、區域6、區域8的各中心部的半導體晶片的外表面的平均溫度Ts與區域9的中心部的半導體晶片的外表面的溫度T9之差(Ts-T9)為5℃以上。
於本揭示中，作為第二構件的具體例，可列舉配線基板、半導體晶片及半導體晶圓。
就抑制空隙產生的觀點而言，接著劑層例如含有重量平均分子量未滿10000的熱硬化性樹脂、以及硬化劑，亦可更含有重量平均分子量10000以上的高分子成分。就壓接步驟的效率化的觀點而言，接著劑層較佳為膜狀接著劑。
本揭示提供一種藉由所述製造方法製造的半導體裝置。本揭示的半導體裝置的半導體晶片的邊的焊點短且覆蓋範圍 得到確保。藉由該些特性，可實現高密度安裝且具有優異的可靠性。
根據本揭示，可提供一種半導體晶片的邊的焊點小且覆蓋範圍得到確保的半導體裝置及其製造方法。
1、2、3、4、5、6、7、8、9:區域
10:半導體晶片(第一構件)
10a:銅柱(第一連接部)
10b:焊料凸塊(第一連接部)
11、12、13:半導體晶片
11a、12a、13a:貫通電極部分
20:基板(第二構件)
20a:配線(第二連接部)
30:接著劑層
40:積層體
50、70:半導體裝置
60:內插器(第二構件)
A1:雷射照射部
A2:雷射非照射部
C:角部
F:按壓力
L:雷射
S:邊
Sa:一端
Sb:另一端
w1、w2、WF:寬度
圖1是示意性地表示本揭示的半導體裝置的一實施形態的剖面圖。
圖2的(a)是示意性地表示實施壓接步驟的準備妥當的狀態的剖面圖，圖2的(b)是示意性地表示半導體晶片、接著劑層及基板依次積層而成的積層體，圖2的(c)是示意性地表示對積層體實施壓接步驟的狀況的剖面圖。
圖3是示意性地表示於壓接步驟中對積層體照射雷射的區域的一例的俯視圖。
圖4是示意性地表示於壓接步驟後接著劑層自半導體晶片滲出的狀態的一例的俯視圖。
圖5是示意性地表示藉由TSV技術製造的半導體裝置的一例的剖面圖。
圖6的(a)是示意性地表示實施例1及比較例1中的雷射的照射圖案的俯視圖，圖6的(b)是示意性地表示實施例2及比較例2中的雷射的照射圖案的俯視圖。
圖7是示意性地表示實施例3、實施例4中的雷射的照射圖案的俯視圖。
以下，一邊適宜參照圖式，一邊對本揭示的實施形態進行說明。再者，本發明並不限定於以下的實施形態。
<半導體裝置及其製造方法>
圖1所示的半導體裝置50包括：半導體晶片10(第一構件)，具有銅柱(pillar)10a及焊料凸塊10b(第一連接部)；基板20(第二構件)，具有配線20a(第二連接部)；以及接著劑層30，配置於半導體晶片10與基板20之間，焊料凸塊10b與配線20a電氣連接。焊料凸塊10b例如包含錫-銀合金。配線20a例如於表面實施鍍金。藉由加熱為比焊料的熔點高的溫度，可連接焊料凸塊10b與配線20a。
參照圖2的(a)~圖2的(c)來對半導體裝置50的製造方法進行說明。半導體裝置50例如經過以下的步驟而製造。
．帶有接著劑的晶片製作步驟，準備於半導體晶片10的形成有銅柱10a及焊料凸塊10b的一側的面形成有接著劑層30的晶片(參照圖2的(a))。
．積層步驟，準備半導體晶片10、接著劑層30及基板20依次積層而成的積層體40(參照圖2的(b))。
．壓接步驟，於對積層體40沿厚度方向施加按壓力F的狀態下，對積層體40照射用於加熱的雷射L(參照圖2的(c))。
．固化步驟，對壓接步驟後的積層體40進行加熱。
(帶有接著劑的晶片製作步驟)
帶有接著劑的晶片製作步驟是製作晶片(帶有接著劑的晶片)的步驟，所述晶片具有半導體晶片10、以及以覆蓋範圍半導體晶片10的銅柱10a等的方式形成的接著劑層30。就作業性的觀點而言，較佳為事先準備膜狀接著劑，經過將其層壓於對象物的步驟而製作帶有接著劑的晶片。層壓可藉由加熱壓製、輥層壓及真空層壓等來進行。接著劑層30的尺寸及厚度根據半導體晶片10的尺寸及凸塊高度等而適宜設定。再者，可藉由將被切斷成半導體晶片10的尺寸的膜狀接著劑貼合到半導體晶片上來製作帶有接著劑的晶片，或者亦可於將膜狀接著劑貼合到形成有配線等的半導體晶圓上後，藉由切割而單片化，藉此製作帶有接著劑的晶片。再者，於藉由切割製作帶有接著劑的晶片的情況下，半導體晶片10與接著劑層30為相同的形狀及尺寸。
(積層步驟)
積層步驟是準備半導體晶片10、接著劑層30及基板20依次積層而成的積層體40的步驟。於進行帶有接著劑的晶片與基板20的定位後，對帶有接著劑的晶片與基板20進行臨時壓接，藉此製作積層體40。臨時壓接可使用通常的壓接裝置。
(壓接步驟)
圖3是示意性地表示於壓接步驟中對積層體照射雷射的區域的俯視圖。於本實施形態中，於合計36個區域中使用可分別獨立 地照射加熱用的雷射的雷射連接器。作為具有所述性能的雷射連接器，例如可列舉澀穀工業股份有限公司製造的FDB250。於圖3中，於合計36個區域中，利用帶影線的圓圈表示照射了雷射的區域，利用白色圓圈表示未照射雷射的區域。
如圖3所示，於壓接步驟中，從半導體晶片10的邊S的一端Sa的周緣部(其中一個角部C)朝向另一端Sb的周緣部(另一個角部C)，以依次形成有雷射照射部A1、雷射非照射部A2及雷射照射部A1的方式，對積層體40照射雷射。對於半導體晶片10的剩餘三個邊S，亦從一端朝向另一端，以依次形成有雷射照射部A1、雷射非照射部A2及雷射照射部A1的方式，照射雷射。如圖3所示，將半導體晶片10的邊三等分而分割為合計九個區域，將該九個區域中包含半導體晶片10的一個角部的區域設為區域1，將從區域1沿著半導體晶片10的周緣部排列的區域設為區域2~區域8。於本實施形態中，對區域1、區域3、區域5、區域7選擇性地照射雷射L，對區域2、區域4、區域6、區域8及包含半導體晶片10的中心的區域9不照射雷射。即，區域1、區域3、區域5、區域7為雷射照射部A1，區域2、區域4、區域6、區域8、區域9為雷射非照射部A2。再者，只要可藉由朝向積層體40照射雷射L來加熱接著劑層30，則可對半導體晶片10的外表面直接照射雷射，亦可對用於對半導體晶片10施加按壓力F的板(未圖示)照射雷射。
於本實施形態中，較佳為區域1、區域3、區域5、區域 7的各中心部的半導體晶片10的外表面的平均溫度Tc與區域2、區域4、區域6、區域8的各中心部的半導體晶片10的外表面的平均溫度Ts之差(Tc-Ts)為15℃以上。Tc-Ts為15℃以上是指包含半導體晶片10的角部的區域相較於其他區域而言以局部成為高溫的方式加熱。於壓接步驟中，藉由進行所述加熱，可縮短半導體晶片10的邊S的焊點且可確保覆蓋範圍。Tc-Ts可為15℃~30℃。
於本實施形態中，區域2、區域4、區域6、區域8的各中心部的半導體晶片10的外表面的平均溫度Ts與區域9的中心部的半導體晶片10的外表面的溫度T9的溫度差(Ts-T9)亦可為5℃以上。Ts-T9為5℃以上是指半導體晶片10的區域2、區域4、區域6、區域8相較於區域9而言加熱為更高溫。即，於本實施形態的壓接步驟中，亦可以滿足Tc>Ts>T9的條件且溫度差(Tc-Ts)為15℃以上，溫度差(Ts-T9)為5℃以上的方式進行加熱。再者，溫度差(Ts-T9)的範圍亦可為5℃~40℃。
於使用具有可升溫的壓接工具面的一般的壓接裝置實施壓接步驟的情況下，使壓接工具面與積層體40的表面抵接，於對積層體40施加按壓力F的狀態下，使壓接工具面升溫。壓接工具面通常設計成其表面溫度盡可能均勻。例如若半導體晶片的尺寸為30mm×30mm左右，則壓接時的半導體晶片的表面的溫度偏差通常未滿15℃。若均勻地加熱積層體40並實施壓接步驟，則有半導體晶片的邊的中央部的焊點寬度大且覆蓋範圍不充分的傾 向。再者，若為了確保覆蓋範圍而提高加熱溫度或提高按壓力，則半導體晶片的邊的焊點寬度亦進一步變大。
相對於此，根據本實施形態，藉由於壓接工具面有意附著溫度分佈，可抑制焊點寬度並確保覆蓋範圍。如上所述，藉由將半導體晶片的區域1、區域3、區域5、區域7局部地加熱為高溫，可提高分別位於半導體晶片10的角部C的接著劑層30的流動，且可確保覆蓋範圍。另一方面，藉由相對降低半導體晶片10的區域2、區域4、區域6、區域8的加熱溫度，可相對地抑制半導體晶片10的邊S的中央附近的接著劑層30的流動，且可減小邊S的焊點。藉由將區域2、區域4、區域6、區域8的平均溫度Ts與區域9的溫度T9之差(Ts-T9)設為5℃以上，半導體晶片整體的升溫速度有加快的傾向。藉由加快升溫速度，容易局部加熱半導體晶片的特定區域，因此更容易一面抑制焊點，一面確保覆蓋範圍。另外，藉由升溫速度加快，焊料熔融的時間變長，因此連接變得容易。藉此，可於短時間內製造可靠性優異的半導體裝置。
圖4是示意性地表示接著劑層30自半導體晶片10滲出的狀態的俯視圖。圖4所示的寬度WF為半導體晶片10的邊S的焊點的最大寬度。於半導體晶片10的四個邊S中，測定焊點的最大寬度，將其平均值定義為半導體晶片10的邊的焊點寬度。圖4所示的寬度w1、寬度w2為自半導體晶片10的角部C起200μm的位置處的焊點的寬度(μm)。關於半導體晶片10的四個角部C， 分別測定寬度w1、寬度w2，將合計8個值的平均值定義為半導體晶片10的覆蓋範圍(μm)。
焊點寬度依存於半導體晶片10的尺寸及厚度以及底部填充(包含液狀及膜狀)的供給量。關於焊點寬度，若可靠性無問題，則越小越佳。例如於在晶圓上壓接半導體晶片的情況下及在基板上壓接半導體晶片的情況下，焊點較佳為半導體晶片間隔的距離的一半以下。焊點寬度較佳為50μm~200μm，更佳為50μm~150μm。半導體晶片10的覆蓋範圍較佳為5μm~100μm，更佳為10μm~100μm。若覆蓋範圍為10μm以上，則有可進一步提高半導體裝置50的可靠性的傾向。藉由覆蓋範圍除以焊點寬度，計算出覆蓋範圍指數(無量綱)。覆蓋範圍指數例如為0.1~1，亦可為0.2~0.5。若覆蓋範圍指數為0.1以上，則有可充分提高半導體裝置50的可靠性的傾向。
(固化步驟)
固化步驟是對壓接步驟後的積層體40進行加熱的步驟。就減少空隙的觀點而言，所述步驟較佳為使用加壓烘箱或加壓回流裝置，於加壓環境下實施。加熱溫度例如為130℃~200℃。壓力例如為0.1MPa~1MPa。
於本實施形態中，例示了於壓接步驟中使用雷射連接器並以Tc-Ts成為15℃以上的方式進行加熱的情況，但是只要可使Tc-Ts為15℃以上，則亦可使用雷射連接器以外的壓接裝置。例如為了使僅半導體晶片10的角部C的溫度容易傳遞，亦可使用在對 應於角部C的位置具有凸部的壓接工具。或者，亦可使用對應於半導體晶片10的角部C的區域局部由導熱性高的材質構成的壓接工具，或者亦可使用所述區域以外的部分由導熱性低的材質構成的壓接工具。
於本實施形態中，例示了將區域2、區域4、區域6、區域8設為雷射非照射部的情況，但只要可使Tc-Ts為15℃以上，則亦可對區域2、區域4、區域6、區域8照射雷射(參照實施例3、實施例4)。
於本實施形態中，例示了具有半導體晶片10與基板20的連接部的半導體裝置50，可為半導體晶片與其他半導體晶片連接的形態，亦可為半導體晶片與半導體晶圓連接的形態。另外，連接部並不限於利用凸塊與配線的金屬接合，亦可為利用凸塊與凸塊的金屬接合。
本實施形態的壓接步驟例如亦可應用於利用TSV(Throug-Silicon Via)技術製造的半導體裝置。圖5是示意性地表示藉由TSV技術製造的半導體裝置的一例的剖面圖。該圖所示的半導體裝置70包括：三個半導體晶片11、半導體晶片12、半導體晶片13，經由接著劑層30進行覆晶連接且積層而成；以及內插器60，經由半導體晶片13與接著劑層30連接而成。再者，半導體晶片11、半導體晶片12、半導體晶片13具有貫通電極部分11a、貫通電極部分12a、貫通電極部分13a。根據所述構成的半導體裝置70，亦可從半導體晶片的背面獲取信號。於半導體晶片中 可垂直地穿過配線，因此可將半導體晶片間或晶片與內插器之間最短且柔軟地連接。本實施形態的壓接步驟可應用於包含半導體晶片11、半導體晶片12、半導體晶片13的積層晶片的製造，亦可應用於積層晶片與內插器60的壓接。
以下對本實施形態的半導體裝置的製造方法中使用的半導體晶片、基板及接著劑層等進行說明。
半導體晶片具有呈直線狀延伸的邊，例如具有正方形或長方形的形狀。半導體晶片的一邊的長度例如為0.1mm~300mm，亦可為5mm~150mm。作為構成半導體晶片的半導體，並無特別限定，可列舉由矽、鍺等元素半導體；砷化鎵、磷化銦等化合物半導體等。
半導體晶片可具有被稱為凸塊的導電性突起。凸塊包含金、銀、銅、焊料、錫、鎳等作為主要成分。該些金屬可單獨為一種或者併用兩種以上。另外，亦可以形成積層有該些金屬的結構的方式來形成。再者，焊料的主成分例如為錫-銀、錫-鉛、錫-鉍、錫-銅、錫-銀-銅等合金。另外，凸塊亦可形成於與半導體晶片連接的配線基板等。作為構成凸塊的金屬，就低成本的方面而言，較佳為銅、焊料，就連接可靠性及翹曲抑制的方面而言，進而較佳為焊料。
半導體晶片及配線基板可具有被稱為焊墊的導電性面。焊墊包含金、銀、銅、焊料、錫、鎳等作為主要成分。該些金屬可單獨為一種或者併用兩種以上。另外，亦可以形成積層有 該些金屬的結構的方式來形成。再者，焊料的主成分例如為錫-銀、錫-鉛、錫-鉍、錫-銅、錫-銀-銅等合金。另外，作為構成焊墊的金屬，就連接可靠性的方面而言，較佳為金、焊料。
作為配線基板，只要為通常的電路基板，則並無特別限制，可列舉藉由蝕刻處理而於絕緣基板形成配線圖案的配線基板、於絕緣基板的表面印刷導電性物質而形成配線圖案的配線基板等。絕緣基板包含玻璃環氧基、聚酯、陶瓷、環氧基、雙馬來醯亞胺三嗪、聚醯亞胺等樹脂材料。
於配線圖案的表面亦可形成有金屬層。金屬層包含金、銀、銅、焊料、錫、鎳等作為主要成分。該些金屬可單獨為一種或者併用兩種以上。另外，亦可以形成積層有該些金屬的結構的方式來形成。作為構成金屬層的金屬，就低成本的方面而言，較佳為銅、焊料，就連接可靠性及翹曲抑制的方面而言，進而較佳為焊料。
半導體裝置亦可具有所述凸塊-凸塊之間的連接部、凸塊-焊墊之間的連接部或者凸塊-配線之間的連接部。
接著劑層為了可於200℃以上的溫度條件下進行壓接處理，較佳為具有優異的耐熱性。藉由於200℃以上的溫度條件下進行壓接處理，可使焊料等金屬熔融。就抑制空隙產生的觀點而言，接著劑層含有重量平均分子量未滿10000的樹脂成分。接著劑層進一步含有重量平均分子量10000以上的高分子成分。就壓接步驟的效率化的觀點而言，接著劑層較佳為膜狀接著劑。再者，此 處所述的「重量平均分子量」是指使用高效液相層析儀(島津製作所股份有限公司製造的C-R4A)藉由聚苯乙烯換算測定的值。
(a)重量平均分子量未滿10000的樹脂成分
重量平均分子量未滿10000的樹脂成分(以下，(a)成分)可列舉：環氧樹脂及丙烯酸樹脂。(a)成分較佳為熱硬化性樹脂，該情況下，接著劑層較佳為包含(b)硬化劑。分子量較小的樹脂成分於加熱時分解等而成為空隙的原因，因此就耐熱性的觀點而言，較佳為與硬化劑反應。
環氧樹脂只要為於分子中具有兩個以上的環氧基者，則並無特別限制，例如可使用：雙酚A型、雙酚F型、萘型、苯酚酚醛清漆型、甲酚酚醛清漆型、苯酚芳烷基型、聯苯型、三苯基甲烷型、二環戊二烯型、各種多官能環氧樹脂。該些可單獨為一種或者併用兩種以上。
相對於接著劑層的總質量100質量份，環氧樹脂的含量例如為10質量份~50質量份。藉由環氧樹脂的含量為10質量份以上，可容易控制硬化後的樹脂的流動，另一方面，藉由為50質量份以下，可抑制封裝體的翹曲。
丙烯酸樹脂只要為於分子中具有一個以上的丙烯醯基者，則並無特別限制，例如可使用：雙酚A型、雙酚F型、萘型、苯酚酚醛清漆型、甲酚酚醛清漆型、苯酚芳烷基型、聯苯型、三苯基甲烷型、二環戊二烯型、芴型、金剛烷型、各種多官能丙烯酸。該些可單獨為一種或者併用兩種以上。
相對於接著劑層的總質量100質量份，丙烯酸樹脂的含量較佳為10質量份~50質量份，更佳為15質量份~40質量份。藉由丙烯酸樹脂的含量為10質量份以下，可容易控制硬化後的樹脂的流動，另一方面，藉由為50質量份以下，可抑制封裝體的翹曲。
丙烯酸樹脂較佳為於室溫(25℃)下為固體。與液狀相比，固體的情況下更不易產生空隙，另外，硬化前(B階段)的接著劑層的黏性(tack)小而操作優異。丙烯醯基的官能基數較佳為3官能基以下。藉由丙烯醯基的官能基數為3官能基以下，可於短時間內充分進行硬化，達成充分高的硬化反應率。
(b)硬化劑
作為硬化劑，例如可列舉：酚樹脂系硬化劑、酸酐系硬化劑、胺系硬化劑、咪唑系硬化劑、膦系硬化劑、偶氮化合物及有機過氧化物。
(酚樹脂系硬化劑)
作為酚樹脂系硬化劑，若為分子中具有兩個以上的酚性羥基者，則並無特別限制，例如可使用：苯酚酚醛清漆、甲酚酚醛清漆、苯酚芳烷基樹脂、甲酚萘酚甲醛縮聚物、三苯基甲烷型多官能酚及各種多官能酚樹脂。該些可單獨使用或者作為兩種以上的混合物來使用。
就良好的硬化性、接著性及保存穩定性的觀點而言，酚樹脂系硬化劑相對於環氧樹脂的當量比(酚性羥基/環氧基、莫耳 比)較佳為0.3~1.5，更佳為0.4~1.0，進而較佳為0.5~1.0。若當量比為0.3以上，則有硬化性提高，接著力提高的傾向，若為1.5以下，則不會過剩地殘存未反應的酚性羥基，吸水率被抑制為低值，有絕緣可靠性提高的傾向。
(酸酐系硬化劑)
作為酸酐系硬化劑，例如可使用：甲基環己烷四羧酸二酐、偏苯三甲酸酐、均苯四甲酸酐、二苯甲酮四羧酸二酐及乙二醇雙偏苯三甲酸酐酯。該些可單獨使用或者作為兩種以上的混合物來使用。
就良好的硬化性、接著性及保存穩定性的觀點而言，酸酐系硬化劑相對於環氧樹脂的當量比(酸酐基/環氧基、莫耳比)較佳為0.3~1.5，更佳為0.4~1.0，進而較佳為0.5~1.0。若當量比為0.3以上，則有硬化性提高，接著力提高的傾向，若為1.5以下，則不會過剩地殘存未反應的酸酐，吸水率被抑制為低值，有絕緣可靠性提高的傾向。
(胺系硬化劑)
作為胺系硬化劑，例如可使用二氰二胺。就良好的硬化性、接著性及保存穩定性的觀點而言，胺系硬化劑相對於環氧樹脂的當量比(胺/環氧基、莫耳比)較佳為0.3~1.5，更佳為0.4~1.0，進而較佳為0.5~1.0。若當量比為0.3以上，則有硬化性提高，接著力提高的傾向，若為1.5以下，則不會過剩地殘存未反應的胺，有絕緣可靠性提高的傾向。
(咪唑系硬化劑)
作為咪唑系硬化劑，例如可列舉：2-苯基咪唑、2-苯基-4-甲基咪唑、1-苄基-2-甲基咪唑、1-苄基-2-苯基咪唑、1-氰基乙基-2-十一烷基咪唑、1-氰基-2-苯基咪唑、1-氰基乙基-2-十一烷基咪唑偏苯三甲酸酯、1-氰基乙基-2-苯基咪唑鎓偏苯三甲酸酯、2,4-二胺基-6-[2'-甲基咪唑基-(1')]-乙基-均三嗪、2,4-二胺基-6-[2'-十一烷基咪唑基-(1')]-乙基-均三嗪、2,4-二胺基-6-[2'-乙基-4'-甲基咪唑基-(1')]-乙基-均三嗪、2,4-二胺基-6-[2'-甲基咪唑基-(1')]-乙基-均三嗪異三聚氰酸加成物、2-苯基咪唑異三聚氰酸加成物、2-苯基-4,5-二羥基甲基咪唑、2-苯基-4-甲基-5-羥基甲基咪唑、及環氧樹脂與咪唑類的加成物。該些中，就優異的硬化性、保存穩定性及連接可靠性的觀點而言，較佳為1-氰基乙基-2-十一烷基咪唑、1-氰基-2-苯基咪唑、1-氰基乙基-2-十一烷基咪唑偏苯三甲酸酯、1-氰基乙基-2-苯基咪唑鎓偏苯三甲酸酯、2,4-二胺基-6-[2'-甲基咪唑基-(1')]-乙基-均三嗪、2,4-二胺基-6-[2'-乙基-4'-甲基咪唑基-(1')]-乙基-均三嗪、2,4-二胺基-6-[2'-甲基咪唑基-(1')]-乙基-均三嗪異三聚氰酸加成物、2-苯基咪唑異三聚氰酸加成物、2-苯基-4,5-二羥基甲基咪唑及2-苯基-4-甲基-5-羥基甲基咪唑。該些可單獨使用或者將兩種以上併用而使用。另外，亦可形成將該些進行微膠囊化而成的潛在性硬化劑。
相對於環氧樹脂100質量份，咪唑系硬化劑的含量較佳為0.1質量份~20質量份，更佳為0.1質量份~10質量份。若咪 唑系硬化劑的含量為0.1質量份以上，則有硬化性提高的傾向，若為20質量份以下，則於金屬接合形成之前接著劑組成物不會硬化，有不易產生連接不良的傾向。
(膦系硬化劑)
作為膦系硬化劑，例如可列舉：三苯基膦、四苯基鏻四苯基硼酸鹽、四苯基鏻四(4-甲基苯基)硼酸鹽及四苯基鏻(4-氟苯基)硼酸鹽。
相對於環氧樹脂100質量份，膦系硬化劑的含量較佳為0.1質量份~10質量份，更佳為0.1質量份~5質量份。若膦系硬化劑的含量為0.1質量份以上，則有硬化性提高的傾向，若為10質量份以下，則於金屬接合形成之前接著劑組成物不會硬化，有不易產生連接不良的傾向。
酚樹脂系硬化劑、酸酐系硬化劑及胺系硬化劑分別可單獨為一種或者併用兩種以上。咪唑系硬化劑及膦系硬化劑分別可單獨使用，但亦可與酚樹脂系硬化劑、酸酐系硬化劑或胺系硬化劑一起使用。
(有機過氧化物)
作為有機過氧化物，例如可列舉：過氧化酮、過氧化縮酮、氫過氧化物、二烷基過氧化物、二醯基過氧化物、過氧化二碳酸酯、過氧化酯。就保存穩定性的觀點而言，較佳為氫過氧化物、二烷基過氧化物、過氧化酯。進而，就耐熱性的觀點而言，較佳為氫過氧化物、二烷基過氧化物。該些溶劑可單獨為一種或者併 用兩種以上。
相對於丙烯酸樹脂的質量，過氧化物的含量較佳為0.5質量%~10質量%，更佳為1質量%~5質量%。藉由過氧化物的含量為0.5質量%以上，容易充分進行硬化反應，另一方面，藉由為10質量%以下，可充分抑制分子鏈變短，或者未反應基殘存且可靠性下降。
再者，環氧樹脂、丙烯酸樹脂及硬化劑的組合只要可進行硬化則並無特別限制，就操作性、保存穩定性及硬化性的觀點而言，作為與環氧樹脂一起使用的硬化劑，較佳為使用苯酚與咪唑、酸酐與咪唑、胺與咪唑或者單獨使用咪唑。若以短時間連接，則生產性提高，因此更佳為單獨使用速硬化性優異的咪唑。若以短時間硬化，則可抑制低分子成分等揮發成分，因此空隙的產生得到進一步抑制。就操作性及保存穩定性的觀點而言，作為與丙烯酸樹脂一起使用的硬化劑，較佳為使用有機過氧化物。
(c)重量平均分子量10000以上的高分子成分
作為重量平均分子量10000以上的高分子成分(以下稱為「(c)成分」)，可列舉：環氧樹脂、苯氧基樹脂、聚醯亞胺樹脂、聚醯胺樹脂、聚碳二醯亞胺樹脂、氰酸酯樹脂、丙烯酸樹脂、聚酯樹脂、聚乙烯樹脂、聚醚碸樹脂、聚醚醯亞胺樹脂、聚乙烯縮醛樹脂、胺基甲酸酯樹脂、丙烯酸橡膠、雙馬來醯亞胺樹脂等。該些中，更佳為耐熱性及膜形成性優異的環氧樹脂、苯氧基樹脂、聚醯亞胺樹脂、丙烯酸樹脂、丙烯酸橡膠、雙馬來醯亞胺樹脂。 該些可單獨為一種或者併用兩種以上，亦可作為兩種以上的共聚物使用。
(c)成分與環氧樹脂的質量比並無特別限制，於將接著劑層中的(c)成分的量設為100質量份時，較佳為環氧樹脂的質量為1質量份~500質量份，更佳為5質量份~400質量份，進而較佳為10質量份~300質量份。藉由環氧樹脂的量為1質量份以上，容易確保充分的接著力，藉由設為500質量份以下，容易確保充分的膜形成性。再者，此處所述的環氧樹脂為具有縮水甘油基的分子量未滿10000的硬化成分。
(c)成分與丙烯酸樹脂的質量比並無特別限制，於將接著劑層中的(c)成分的量設為100質量份時，較佳為丙烯酸樹脂的質量為1質量份~1000質量份，更佳為5質量份~500質量份，進而較佳為10質量份~500質量份。藉由丙烯酸樹脂的量為1質量份以上，容易確保充分的接著力，藉由設為1000質量份以下，容易確保充分的膜形成性。
就對接著劑層的基板及半導體晶片的貼附性優異的觀點而言，(c)成分的玻璃轉移溫度(Tg)較佳為50℃~200℃。藉由(c)成分的Tg為50℃以上，可充分提高接著劑層的黏性(tack)力，操作性優異。另一方面，藉由(c)成分的Tg為200℃以下，容易將形成於半導體晶片上的凸塊、或者形成於基板上的電極或者配線圖案等的凹凸埋入接著劑層，可抑制空隙的產生。再者，接著劑層的Tg是使用DSC(珀金埃爾默(Perkin Elmer)公司製 造的DSC-7型)，以樣品量為10mg、升溫速度為10℃/min、測定環境：空氣的條件來測定而得的值。
如上所述，(c)成分的重量平均分子量以聚苯乙烯換算計而為10000以上，就單獨地達成良好的膜形成性的觀點而言，較佳為30000以上。藉由(c)成分的重量平均分子量為10000以上，容易達成充分的膜形成性。
接著劑層亦可進一步含有助熔劑。助熔劑為顯示助熔活性(將氧化物或雜質去除的活性)的化合物。助熔劑可列舉：如咪唑類及胺類般具有非共價電子對的含氮化合物、羧酸類、酚類、以及醇類。再者，與醇等相比，有機酸強烈地表現出助熔活性，連接性提高。有機酸中，較佳為使用羧酸。羧酸與環氧樹脂反應，因此具有接著劑層中殘存的量充分變少的優點。就耐熱性的觀點而言，作為助熔劑的羧酸，較佳為固體。就穩定性及操作性的觀點而言，助熔劑的熔點較佳為70℃~150℃。
接著劑層亦可進一步含有具有絕緣性的填料。藉由於接著劑層中調配填料，可控制黏度及硬化物的物性，並且可抑制將半導體晶片彼此或半導體晶片與基板連接時的空隙的產生且可抑制吸濕率。作為具有絕緣性的填料，可列舉：無機填料、晶鬚(whisker)及樹脂填料。再者，就絕緣可靠性的觀點而言，接著劑層較佳為不含具有導電性的金屬填料(例如銀離子及焊料粒子)。
作為無機填料，例如可列舉：玻璃、二氧化矽、氧化鋁、 氧化鈦、碳黑、雲母及氮化硼。該些中，較佳為二氧化矽、氧化鋁、氧化鈦及氮化硼，更佳為二氧化矽、氧化鋁及氮化硼。作為晶鬚，例如可列舉：硼酸鋁、鈦酸鋁、氧化鋅、矽酸鈣、硫酸鎂、氮化硼。作為樹脂填料，例如可列舉：聚胺基甲酸酯、聚醯亞胺、甲基丙烯酸甲酯樹脂、甲基丙烯酸甲酯-丁二烯-苯乙烯共聚樹脂(Methylmethacrylate-Butadiene-Styrene，MBS)。該些填料可單獨為一種或者併用兩種以上。與無機填料相比，樹脂填料可對接著劑層賦予高溫環境下(例如260℃)的柔軟性，因此可有助於耐回焊性提高。藉由柔軟性提高，亦可提高膜形成性。
就提高分散性或接著力的觀點而言，亦可使用實施了表面處理的填料。藉由對填料實施表面處理，可適宜調整填料的物性。作為表面處理，可列舉：縮水甘油基系(環氧系)、胺系、苯基系、苯基胺基系、丙烯酸(甲基丙烯酸)系或乙烯基系的處理。就分散性、流動性及接著力的觀點而言，較佳為縮水甘油基系、苯基胺基系、丙烯酸(甲基丙烯酸)系。就保存穩定性的觀點而言，進而較佳為苯基系、丙烯酸(甲基丙烯酸)系。就表面處理的容易性而言，較佳為環氧基矽烷系、胺基矽烷系、丙烯酸矽烷系等的矽烷處理。
關於填料的平均粒徑，就防止覆晶連接時的卡入的觀點而言，較佳為1.5μm以下，就視認性(透明性)的觀點而言，更佳為1.0μm以下。此處所述的「平均粒徑」是指利用雷射繞射式粒度分佈測定裝置將甲基乙基酮(methyl ethyl ketone，MEK)作 為溶媒進行分析而獲得的值。
以接著劑層的固體成分的質量為基準，填料的含量較佳為30質量%~90質量%，更佳為40質量%~80質量%。藉由填料的含量為30質量%以上，容易達成充分的散熱性，另外可抑制空隙的產生且可減小吸濕率。另一方面，藉由填料的含量為90質量%以下，可抑制黏度變得過高，可確保充分高的流動性，並且可充分抑制填料對連接部的卡入(trapping)。
接著劑層亦可進一步含有離子捕獲劑、抗氧化劑、矽烷偶合劑、鈦偶合劑及調平劑等添加劑。該些溶劑可單獨為一種或者併用兩種以上。該些添加劑的含量只要以顯現各添加劑的效果的方式適宜調整即可。
如上所述，就作業性的觀點而言，較佳為於製作帶有接著劑的晶片時，事先準備膜狀接著劑。膜狀接著劑可以如下方式製作。即，藉由將所述各成分加入有機溶媒中，將混合液攪拌或混煉而製備清漆。於實施了脫模處理的基材膜上塗佈清漆後，利用加熱而使有機溶媒減少，藉此於基材膜上形成膜狀接著劑。清漆的塗佈例如可使用刮刀塗佈機、輥塗佈機、敷料器、模塗佈機或缺角輪塗佈機來實施。
作為基材膜，只要是具有可經得起使有機溶媒揮發時的加熱條件的耐熱性者，則並無特別限制，可例示：聚酯膜、聚丙烯膜、聚對苯二甲酸乙二酯膜、聚醯亞胺膜、聚醚醯亞胺膜、聚醚萘二甲酸酯膜、甲基戊烯膜。基材膜並不限定於包含該些膜的 單層者，亦可為包含兩種以上的材料的多層膜。
使有機溶媒自清漆中揮發時的條件具體而言較佳為進行50℃~200℃、0.1分鐘~90分鐘的加熱。只要不對安裝後的空隙的產生或黏度調整造成影響，則較佳為有機溶媒的含量減少至1.5質量%以下。
再者，於藉由對於表面形成有接著劑層的半導體晶圓進行切割而製作帶有接著劑的晶片的情況下，例如只要藉由旋塗於半導體晶圓的表面形成清漆的膜，其後藉由加熱使溶媒減少即可。
[實施例]
以下，基於實施例而對本揭示進行說明。本發明並不限定於以下的實施例。
<實施例1>
(接著劑層形成用清漆的製備)
藉由以表1所示的比例混合以下化合物，並且進行真空脫氣，而製備清漆。再者，使用MEK作為溶劑。
(1)重量平均分子量未滿10000的熱硬化性樹脂(環氧樹脂)
．含三苯酚甲烷骨架的多官能固體環氧樹脂(三菱化學股份有限公司製造、EP1032H60(以下表述為「EP1032」)、重量平均分子量：800~2000)
．雙酚F型液狀環氧樹脂(三菱化學股份有限公司製造、YL983U(以下表述為「YL983」)、分子量：約336)
．可撓性半固體狀環氧樹脂(三菱化學股份有限公司製造、 YL7175-1000(以下表述為「YL7175」)、重量平均分子量：1000~5000)
(2)硬化劑
．2,4-二胺基-6-[2'-甲基咪唑-(1')]-乙基-均三嗪異三聚氰酸加成物(四國化成工業股份有限公司製造、2MAOK-PW(以下表述為「2MAOK」)
(3)重量平均分子量10000以上的高分子成分
．苯氧基樹脂(東都化成工業股份有限公司、ZX1356-2(以下表述為「ZX1356」)、Tg：約71℃、重量平均分子量：約63000)
(4)助熔劑(羧酸)
．戊二酸(奧德里奇(Aldrich)公司製造、熔點：約98℃)
(5)樹脂填料
．有機填料(日本羅門哈斯(Rohm and Haas Japan)股份有限公司製造、EXL-2655：核殼型有機微粒子)
(6)無機填料
．二氧化矽填料(雅都瑪(Admatechs)股份有限公司、SE2050、平均粒徑：0.5μm)
．甲基丙烯酸表面處理奈米二氧化矽填料(雅都瑪(Admatechs)股份有限公司、YA050C-SM(以下表述為「SM奈米二氧化矽」)、平均粒徑：約50nm)
[表1]
Figure 108131588-A0305-02-0030-1
(膜狀接著劑的製作)
將清漆塗敷於厚度50μm的表面脫模處理聚對苯二甲酸乙二酯膜(帝人膜解決方案(Teijin film solutions)股份有限公司製造、商品名：帝人帝特綸膜(teijin tetoron film)A-63)上。經過乾燥步驟，獲得厚度為45μm的膜狀接著劑。
(半導體裝置的製造)
準備作為第一構件的帶有焊料凸塊的半導體晶片(WALTS-TEG CC80(製品名)、沃爾茨股份有限公司製造)。所述半導體晶片的構成為如下所述。
．晶片尺寸：7.3mm×7.3mm×0.05mmt
．凸塊高度：約45μm(銅柱及焊料的高度的合計)
．凸塊數：1048針腳
．凸塊間距：80μm
將所製作的膜狀接著劑切成與所述半導體晶片為相同尺寸(7.3mm×7.3mm)而獲得接著劑片。將所述接著劑片層壓至半導體晶片的表面(形成有焊料的一側的面)。層壓是使用真空層壓機V130(日光材料(nikko-materials)股份有限公司)，於80℃/0.5 MPa/60s的條件下實施。
準備作為第二構件的半導體晶片(WALTS-TEG IP80、沃爾茨股份有限公司製造)。所述半導體晶片的構成為如下所述。
．晶片尺寸：10mm×10mm×0.1mmt
．構成連接部的金屬：Ni/Au
於半導體晶片(第二構件)的形成有連接部的一側的面上，以所述面與接著劑片接觸的方式載置帶有焊料凸塊的半導體晶片。而且，於使用壓接裝置(FCB3、松下(Panasonic)股份有限公司製造)實施臨時壓接步驟後，使用雷射連接器(FDB250、澀穀工業股份有限公司製造)實施壓接步驟。臨時壓接步驟是於80℃/25N/1s的條件下實施。壓接步驟是於以下條件下實施。
．壓接壓力：30N
．壓接時間：1秒
．雷射照射圖案：圖6的(a)(對區域1、區域3、區域5、區域7照射雷射)
．雷射照射時間：1秒
．區域1、區域3、區域5、區域7的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Tc：235℃
．區域2、區域4、區域6、區域8的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Ts：205℃
．區域9的中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的溫度T9：204℃
．溫度差(Tc-Ts)：30℃
．溫度差(Ts-T9)：1℃
於壓接步驟後，使用加壓烘箱裝置(VSU28、新派克(Shinapex)股份有限公司製造)，於175℃/10min/0.4MPa及升溫速度20℃/min的條件下實施固化步驟。經過所述固化步驟獲得本實施例的半導體裝置。
<實施例2>
除了於以下條件下實施壓接步驟以外，與實施例1同樣地製作半導體裝置。
．壓接壓力：30N
．壓接時間：3秒
．雷射照射圖案：圖6的(a)(照射比實施例1強度弱的雷射)
．雷射照射時間：3秒
．區域1、區域3、區域5、區域7的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Tc：225℃
．區域2、區域4、區域6、區域8的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Ts：200℃
．區域9的中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的溫度T9：200℃
．溫度差(Tc-Ts)：25℃
．溫度差(Ts-T9)：0℃
<比較例1>
除了於以下條件下實施壓接步驟以外，與實施例1同樣地製作半導體裝置。
．壓接壓力：30N
．壓接時間：1秒
．雷射照射圖案：圖6的(b)(對區域1、區域3、區域5、區域7照射雷射並且對區域2、區域4、區域6、區域8照射比所述雷射強度弱的雷射)
．雷射照射時間：1秒
．區域1、區域3、區域5、區域7的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Tc：225℃
．區域2、區域4、區域6、區域8的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Ts：215℃
．溫度差(Tc-Ts)：10℃
<比較例2>
除了於以下條件下實施壓接步驟以外，與實施例2同樣地製作半導體裝置。
．壓接壓力：30N
．壓接時間：3秒
．雷射照射圖案：圖6的(b)(照射比比較例1強度弱的雷射)
．雷射照射時間：3秒
．區域1、區域3、區域5、區域7的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Tc：210℃
．區域2、區域4、區域6、區域8的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Ts：205℃
．溫度差(Tc-Ts)：5℃
<實施例3>
除了於以下條件下實施壓接步驟以外，與實施例1同樣地製作半導體裝置。再者，於壓接步驟後，使用加壓烘箱裝置(PCOA-01、恩梯梯尖端技術(NTT Advanced Technology)股份有限公司製造)，於與實施例1相同的條件下實施固化步驟。
．壓接壓力：30N
．壓接時間：1秒
．雷射照射圖案：圖7(以輸出功率100%對區域1、區域3、區域5、區域7照射雷射，且以輸出功率10%對區域2、區域4、區域6、區域8的外側部分照射雷射)
．雷射照射時間：1秒
．區域1、區域3、區域5、區域7的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Tc：240℃
．區域2、區域4、區域6、區域8的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Ts：211℃
．區域9的中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的溫度T9：205℃
．溫度差(Tc-Ts)：29℃
．溫度差(Ts-T9)：6℃
<實施例4>
除了於以下條件下實施壓接步驟以外，與實施例3同樣地製作半導體裝置。
．壓接壓力：30N
．壓接時間：3秒
．雷射照射圖案：圖7(照射比實施例3強度弱的雷射)
．雷射照射時間：3秒
．區域1、區域3、區域5、區域7的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Tc：230℃
．區域2、區域4、區域6、區域8的各中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的平均溫度Ts：205℃
．區域9的中心部的接合工具表面(帶有焊料凸塊的半導體晶片的外表面)的溫度T9：200℃
．溫度差(Tc-Ts)：20℃
．溫度差(Ts-T9)：5℃
<半導體裝置的評價>
對實施例及比較例的半導體裝置進行以下評價。
(1)初期導通性的評價
使用萬用表(R6871E、愛德萬測試(ADVANTEST)股份有限公司製造)測定實施例及比較例的半導體裝置的初期連接電阻值，藉此對初期導通性進行評價。評價基準為如下所述。將結果示於表2及表3中。
A：周邊設備部分的初期連接電阻值為30Ω~35Ω。
B：周邊設備部分的初期連接電阻值超過35Ω。
(2)空隙產生率的評價
藉由以下方法評價實施例及比較例的半導體裝置的空隙產生率。首先，使用超音波影像診斷裝置(英賽特(Insight)-300、英賽特(Insight)股份有限公司製造)來拍攝實施例及比較例的半導體裝置的外觀圖像。利用掃描儀(GT-9300UF、愛普生(EPSON)股份有限公司製造)提取半導體晶片上的接著劑層的圖像。針對所述圖像，藉由圖像處理軟體(奧多比-圖片商店(Adobe Photoshop)(註冊商標)、奧多比系統(Adobe Systems)股份有限公司)，藉由色調修正及二階化來識別空隙部分，藉由直方圖(histogram)算出空隙部分所佔的比例。評價基準為如下所述。將結果示於表2及表3中。
A：以半導體晶片上的接著劑部分的面積為基準，空隙部分所佔的比例為5%以下。
B：以半導體晶片上的接著劑部分的面積為基準，空隙部分所佔的比例超過5%。
(3)焊點寬度的評價
使用數位顯微鏡(VHX-5000、基恩斯(Keyence)股份有限公司製造)自上表面觀察實施例及比較例的半導體裝置。而且，測定自正方形的半導體晶片滲出的部分(焊點)的最大值。於半導體晶片的四個邊中，分別測定焊點寬度的最大值，將其平均值 定義為焊點寬度。將結果示於表2及表3中。
(4)覆蓋範圍的評價
使用數位顯微鏡(VHX-5000、基恩斯(Keyence)股份有限公司製造)自上表面觀察實施例及比較例的半導體裝置。而且，測定作為自正方形的半導體晶片滲出的部分(焊點)的寬度且距離半導體晶片的角200μm的位置的二點的寬度(覆蓋範圍)(參照圖4)。關於半導體晶片的四個角，測定合計8點的覆蓋範圍，計算出其平均值。將結果示於表2及表3中。再者，表2、表3中記載的「覆蓋範圍指數」是藉由覆蓋範圍(平均值)除以焊點寬度(平均值)而計算出的值。表中的「-」是指未測定。
Figure 108131588-A0305-02-0038-2
Figure 108131588-A0305-02-0038-4
[產業上的可利用性]
根據本揭示，可提供一種半導體晶片的邊的焊點小且覆蓋範圍得到確保的半導體裝置及其製造方法。
1、2、3、4、5、6、7、8、9:區域
10:半導體晶片(第一構件)
20:基板(第二構件)
40:積層體
A1:雷射照射部
A2:雷射非照射部
C:角部
S:邊
Sa:一端
Sb:另一端

Claims (9)

  1. 一種半導體裝置的製造方法，所述半導體裝置包括：第一構件，具有第一連接部且具有呈直線狀延伸的邊；第二構件，具有第二連接部；以及接著劑層，配置於所述第一構件與所述第二構件之間，所述第一連接部與所述第二連接部電氣連接，且所述半導體裝置的製造方法包括：積層步驟，準備所述第一構件、所述接著劑層及所述第二構件依次積層而成的積層體；以及壓接步驟，於對所述積層體沿厚度方向施加按壓力的狀態下，對所述積層體照射用於加熱的雷射，且於所述壓接步驟中，以從所述第一構件的所述邊的一端的周緣部朝向另一端的周緣部依次形成有雷射照射部、雷射非照射部及雷射照射部的方式，對所述積層體照射雷射。
  2. 如申請專利範圍第1項所述的半導體裝置的製造方法，其中所述第一構件為具有正方形或長方形的形狀的半導體晶片。
  3. 一種半導體裝置的製造方法，所述半導體裝置包括：第一構件，具有第一連接部且具有呈直線狀延伸的邊；第二構件，具有第二連接部；以及接著劑層，配置於所述第一構件與所述第二構件之間，所述第一連接部與所述第二連接部電氣連接，且所述半導體 裝置的製造方法包括：積層步驟，準備所述第一構件、所述接著劑層及所述第二構件依次積層而成的積層體；以及壓接步驟，於對所述積層體沿厚度方向施加按壓力的狀態下，對所述積層體施加熱，所述第一構件為具有正方形或長方形的形狀的半導體晶片，且於所述壓接步驟中，以滿足以下的條件1的方式，對所述積層體施加熱；<條件1>若將所述半導體晶片的邊三等分而分割為合計九個區域，將所述九個區域中包含所述半導體晶片的一個角部的區域設為區域1，將從所述區域1沿著所述半導體晶片的周緣部排列的區域設為區域2~區域8，則區域1、區域3、區域5、區域7的各中心部的所述半導體晶片的外表面的平均溫度Tc與區域2、區域4、區域6、區域8的各中心部的所述半導體晶片的外表面的平均溫度Ts之差(Tc-Ts)為15℃以上。
  4. 如申請專利範圍第3項所述的半導體裝置的製造方法，其中於所述壓接步驟中，以更滿足以下的條件2的方式，對所述積層體施加熱；<條件2> 於所述九個區域中，若將包含所述半導體晶片的中心的區域設為區域9，則區域2、區域4、區域6、區域8的各中心部的所述半導體晶片的外表面的平均溫度Ts與區域9的中心部的所述半導體晶片的外表面的溫度T9之差(Ts-T9)為5℃以上。
  5. 如申請專利範圍第1項至第4項中任一項所述的半導體裝置的製造方法，其中所述第二構件為選自由配線基板、半導體晶片及半導體晶圓所組成的群組中的構件。
  6. 如申請專利範圍第1項至第4項中任一項所述的半導體裝置的製造方法，其中所述接著劑層含有重量平均分子量未滿10000的熱硬化性樹脂、以及硬化劑。
  7. 如申請專利範圍第6項所述的半導體裝置的製造方法，其中所述接著劑層更含有重量平均分子量10000以上的高分子成分。
  8. 如申請專利範圍第1項至第4項中任一項所述的半導體裝置的製造方法，其中所述接著劑層為膜狀接著劑。
  9. 一種半導體裝置，是藉由如申請專利範圍第1項至第8項中任一項所述的半導體裝置的製造方法所製造而成。
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WO2009001564A1 (ja) * 2007-06-28 2008-12-31 Panasonic Corporation 半導体素子の実装構造体及びその製造方法、半導体素子の実装方法、並びに加圧ツール
JP2011187699A (ja) * 2010-03-09 2011-09-22 Nec Corp 半導体装置およびその製造方法
JP2017218532A (ja) * 2016-06-09 2017-12-14 日立化成株式会社 半導体用接着剤、半導体装置、及び半導体装置の製造方法

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JP2000164633A (ja) * 1998-11-30 2000-06-16 Matsushita Electric Ind Co Ltd 半導体実装方法および半導体実装装置
JP2001148403A (ja) * 1999-11-18 2001-05-29 Seiko Epson Corp 半導体チップの実装方法および装置
JP5175431B2 (ja) * 2005-09-16 2013-04-03 日本電気株式会社 半導体装置のリペア方法
JP5217260B2 (ja) 2007-04-27 2013-06-19 住友ベークライト株式会社 半導体ウエハーの接合方法および半導体装置の製造方法
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009001564A1 (ja) * 2007-06-28 2008-12-31 Panasonic Corporation 半導体素子の実装構造体及びその製造方法、半導体素子の実装方法、並びに加圧ツール
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