USRE41975E1 - Interconnector line of thin film, sputter target for forming the wiring film and electronic component using the same - Google Patents

Interconnector line of thin film, sputter target for forming the wiring film and electronic component using the same Download PDF

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USRE41975E1
USRE41975E1 US10/732,888 US73288896A USRE41975E US RE41975 E1 USRE41975 E1 US RE41975E1 US 73288896 A US73288896 A US 73288896A US RE41975 E USRE41975 E US RE41975E
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ppm
sputter target
amount
interconnector line
thin film
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US10/732,888
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Takashi Ishigami
Koichi Watanabe
Akihisa Nitta
Toshihiro Maki
Noriaki Yagi
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Toshiba Corp
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Toshiba Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051—Deposition of metallic or metal-silicide layers
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C21/00—Alloys based on aluminium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • C23C14/16—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • C23C14/165—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon by cathodic sputtering
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
    • C23C14/3414—Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
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    • H01L23/53219—Aluminium alloys
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/125—Driving means, e.g. electrodes, coils
    • H03H9/145—Driving means, e.g. electrodes, coils for networks using surface acoustic waves
    • H03H9/14538—Formation
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/136295—Materials; Compositions; Manufacture processes
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
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    • H01L2924/161—Cap
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    • H01L2924/181—Encapsulation

Definitions

  • More than one reissue application has been filed for the reissue of U.S. Pat. No. 6 , 329 , 275 .
  • the reissue applications include the present reissue application Ser. No. 10 / 732 , 888 , filed on Dec. 10 , 2003 , and reissue application Ser. Nos. 11 / 386 , 114 , 11 / 386 , 115 , 11 / 386 , 116 , and 11 / 386 , 117 , each filed on Mar. 22 , 2006 , which are continuations of the present reissue application Ser. No. 10 / 732 , 888 .
  • the invention relates to an interconnector line of thin film suitable for forming low-resistance interconnector line, a sputter target for forming an interconnector line of thin film and electronic parts such as a liquid crystal display (LCD) and a semiconductor device applying the low-resistance interconnector line.
  • a sputter target for forming an interconnector line of thin film
  • electronic parts such as a liquid crystal display (LCD) and a semiconductor device applying the low-resistance interconnector line.
  • LCD liquid crystal display
  • An interconnector line of thin film used as a gate line and a source electrode bus-line for a TFT drive type LCD is generally produced by a sputtering method.
  • materials for such an interconnector line of thin film Cr, Ti, Mo, Mo—Ta and the like have been used.
  • a low-resistance interconnector line of thin film is being needed.
  • a large LCD of 10 inches or more is required to have a low resistant interconnector line of 10 ⁇ cm or below.
  • a low-resistance Al is attracting attention as an interconnector line of thin film for a gate line, a signal line and the like.
  • the Al interconnector line of thin film With the Al interconnector line of thin film, low-resistance interconnector line can be achieved, but the Al interconnector line of thin film has a problem of having protrusions called hillocks due to heating at about 473 to 773K by a heat treatment and a CVD process after interconnector line.
  • Al atoms spread along, for example, grain boundaries.
  • Protrusions are caused involved in the spreading of Al atoms.
  • an adverse effect is caused in the subsequent process.
  • the Al interconnector line is stacked with an ITO electrode.
  • an electrochemical reaction is caused at portions where the Al interconnector line and the ITO electrode are directly contacted.
  • the electrochemical reaction between the Al interconnector line and the ITO electrode is caused because the standard electrode potential of Al is lower than that of the ITO.
  • Electrons are moved between the Al interconnector line and the ITO electrode due to the electrochemical reaction, resulting in a problem that the ITO electrode is colored (e.g., blackening) by being reduced and the Al interconnector line is conversely oxidized to lower electrical characteristics.
  • the ITO electrode is colored (e.g., blackening) by being reduced and the Al interconnector line is conversely oxidized to lower electrical characteristics.
  • the Al target with an very small amount of metallic elements added is also used to form the Al interconnector line of thin film containing a very small amount of metallic elements.
  • the above-described Al interconnector line of thin film containing a very small amount of metallic elements suppress the diffusion of Al and the electrochemical reaction with the ITO electrode, but there are problems that the produced intermetallic compound and the added metallic elements cause an adverse effect on the etching property and sputtering property of the Al interconnector line.
  • the Al target and Al interconnector line of thin film used to form low-resistance interconnector line it is a subject to restrain the occurrence of residues in etching and the occurrence of dust in sputtering in addition to suppression of the occurrence of hillocks due to the diffusion of Al and the electrochemical reaction with the ITO electrode.
  • the electrochemical reaction between the Al interconnector line and the ITO electrode is also studied to be suppressed by having a stacked structure of the Al interconnector line and an Mo film or the like. But, such a stacked film involves a complex LCD structure and a high cost, so that it is desired to suppress the electrochemical reaction with the ITO electrode by the Al interconnector line having a single layered structure.
  • the above-described subject is not limited to the Al interconnector line of thin film used for the gate line and signal line of the LCD.
  • the Al interconnector line is applied to a typical semiconductor device such as VLSI and ULSI
  • electromigration is a problem.
  • the above-described metallic elements have an effect to suppress the electromigration (see Japanese Patent Application Laid-Open Publication No. Sho 62-228446 and Japanese Patent Publication No. Hei 4-48854), but there is a problem that residues are caused in etching and dust is caused in sputtering as in the case of the LCD.
  • a surface acoustic wave apparatus such as a surface acoustic wave oscillator (SAW), an electronic part using SAW (SAW device), or interconnector line and electrodes for a thermal printer head (TPH).
  • SAW surface acoustic wave oscillator
  • SAW device electronic part using SAW
  • TPH thermal printer head
  • An object of the invention is to provide a low-resistance interconnector line of thin film with the occurrence of hillocks and etching residues prevented and a sputter target which can form the interconnector line of thin film with good reproducibility with the occurrence of dust in sputtering suppressed.
  • Another object of the invention is to provide a low-resistance interconnector line of thin film which has the electrochemical reaction with the ITO or the like and the occurrence of the etching residues prevented and a sputter target with the occurrence of dust in sputtering suppressed. Besides, it aims to provide an electronic part using such a interconnector line of thin film.
  • a first interconnector line of thin film of the invention comprises 0.001 to 30 at % of at least one type of first element constituting an intermetallic compound of Al and 0.01 at ppm to 50 at % of at least one type of second element selected from C, O, N and H with respect to the amount of the first element, with the balance comprising substantially Al.
  • a second interconnector line of thin film of the invention comprises 0.001 to 30 at % of at least one type of first element having a standard electrode potential higher than Al and 0.01 at ppm to 50 at % of at least one type of second element selected from C, O, N and H with respect to the amount of the first element, with the balance comprising substantially Al.
  • Another interconnector line of thin film of the invention comprises 0.001 to 30 at % of at least one type of first element selected from Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Th, Sr, Ti, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Co, Ni, Pd, Ir, Pt, Cu, Ag, Au, Cd, Si, Pb and B and 0.01 at ppm to 50 at % of at least one type of second element selected from C, O, N and H with respect to the amount of the first element, with the balance comprising substantially Al.
  • first element selected from Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Th, Sr, Ti, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Co, Ni, Pd, Ir, Pt, Cu, Ag, Au, Cd, Si, Pb and
  • a first sputter target of the invention comprises 0.001 to 30 at % of at least one type of first element constituting an intermetallic compound of Al and 0.01 at ppm to 50 at % of at least one type of second element selected from C, O, N and H with respect to the amount of the first element, with the balance comprising substantially Al.
  • a second sputter target of the invention comprises 0.001 to 30 at % of at least one type of first element having a standard electrode potential higher than Al and 0.01 at ppm to 50 at % of at least one type of second element selected from C, O, N and H with respect to the amount of the first element, with the balance comprising substantially Al.
  • Another sputter target of the invention comprises 0.001 to 30 at % of at least one type of first element selected from Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Th, Sr, Ti, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Co, Ni, Pd, Ir, Pt, Cu, Ag, Au, Cd, Si, Pb and B and 0.01 at ppm to 50 at % of at least one type of second element selected from C, O, N and H with respect to the amount of the first element, with the balance comprising substantially Al.
  • first element selected from Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Th, Sr, Ti, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Co, Ni, Pd, Ir, Pt, Cu, Ag, Au, Cd, Si, Pb and B and
  • an electronic part of the invention is characterized by having the interconnector line of thin film of the invention.
  • an intermetallic compound, intermetallic compound forming element and high electrode potential element which exist in the obtained sputter film and are poor in etching workability are finely and uniformly precipitated in Al grains and grain boundaries.
  • the etching property is improved extensively, and the occurrence of dust in sputtering can be suppressed.
  • at least one type of element selected from the added C, O, N and H does not cause an adverse effect on the effect of suppressing the diffusion of Al or the effect of suppressing the electrochemical reaction with ITO or the like. Therefore, the occurrence of hillocks can be prevented effectively by the intermetallic compound-forming element. Otherwise, the electrochemical reaction with the ITO or the like can be prevented effectively by the high electrode potential element.
  • the first interconnector line of thin film of the invention excels in hillock resistance and formability of a fine interconnector line network.
  • the second interconnector line of thin film of the invention excels in preventing property of the electrochemical reaction with the ITO or the like and formability of the fine interconnector line network.
  • the interconnector line of thin film of the invention can concurrently have such properties.
  • FIG. 1 is an equivalent circuit diagram of an embodiment having an electronic part of the invention applied to a liquid crystal display
  • FIG. 2 is a sectional view showing the main structure of the liquid crystal display shown in FIG. 1 ;
  • FIG. 3 is a sectional view showing the main structure of one embodiment having an electronic part of the invention applied to a semiconductor device;
  • FIG. 4 is a sectional view showing the main structure of one embodiment having an electronic part of the invention applied to a thermal printer head;
  • FIG. 5 is a plan view showing the structure of one embodiment having an electronic part of the invention applied to a surface acoustic wave oscillator;
  • FIG. 6 is a plan view showing the structure of another embodiment having an electronic part of the invention applied to a surface acoustic wave oscillator;
  • FIG. 7 is a sectional view showing the main structure of an SAW device using a surface acoustic wave oscillator (SAW) shown in FIGS. 5 and 6 ; and
  • SAW surface acoustic wave oscillator
  • FIG. 8 is a diagram showing electrode potential of a interconnector line of thin film of the invention in comparison with Al and ITO.
  • a first interconnector line of thin film of the invention contains 0.001 to 30 at % of at least one type of first element constituting an intermetallic compound with Al and 0.01 at ppm to 50 at % with respect to the amount of the first element of at least one type of second element selected from C, O, N and H, with the balance comprising substantially Al.
  • the above-described first element can be various types of elements if they constitute an intermetallic compound with Al. Specifically, they can be rare earth metallic elements such as Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Gd and the like, Nb, Ta, Re, Mo, W, Zr, Hf and the like.
  • intermetallic compound forming elements constituting the intermetallic compound with Al form, for example, an intermetallic compound such as Al 3 Y and function as a trap material for Al. Therefore, the diffusion of Al can be suppressed when thermal treatment is applied to an Al interconnector line of thin film or when the Al interconnector line of thin film is formed at a relatively high temperature. As a result, the occurrence of hillocks is prevented. And, electromigration and the like can also be suppressed.
  • the intermetallic compound forming elements used are preferred to have a solid solubility of 1.0 wt % or below with respect to Al. If the solid solubility with respect to Al exceeds 1.0 wt %, a sufficient effect of suppressing hillocks owing to the constitution of an intermetallic compound with Al might not be attained, and specific resistance might increase.
  • Such intermetallic compound forming elements are Ge, Li, Mg, Th, Ti, V, Zn, W and others.
  • a second interconnector line of thin film of the invention contains 0.001 to 30 at % of at least one type of first element having a standard electrode potential higher than that of Al and 0.01 at ppm to 50 at % with respect to the amount of the first element of at least one type of second element selected from C, O, N and H, with the balance comprising substantially Al.
  • the above-described first element of the second interconnector line of thin film can be various types of elements if they have a standard electrode potential higher than that of Al. Specifically, they can be Ag, Au, Cu, Ti, V, Nb, Ta, Cr, Mo, W, Mn, Fe, Co, Ni, Pd, Ir, Pt, Cd, Si, Pb and the like. Among them, Ag, Au, Co, Cu, Mo, W and Mn having a standard electrode potential higher by 2V (298K) or more from that of Al are preferably used in particular.
  • These elements (high electrode potential elements) having a higher standard electrode potential than Al can be contained in the Al interconnector line of thin film to raise a standard electrode potential of the Al interconnector line of thin film.
  • the electrochemical reaction occurring between the Al interconnector line of thin film and the ITO electrode in an alkaline solution is a phenomenon which occurs owing to the movement of electrons because Al has a standard electrode potential lower than that of ITO. Therefore, by containing the high electrode potential elements into the Al interconnector line of thin film to increase the standard electrode potential of the Al interconnector line of thin film to exceed that of, for example, ITO, an electrochemical reaction between the Al interconnector line of thin film and the ITO electrode in the alkaline solution can be prevented.
  • the gate line of, for example, LCD can be formed well with the Al interconnector line of thin film having a single layer structure without degrading the electrical characteristics due to coloring by reduction of the ITO electrode and oxidation of the Al interconnector line of thin film.
  • Improvement of the standard electrode potential of the Al interconnector line of thin film by addition of the high electrode potential elements is effective not only when it is laminated with the ITO electrode but also when the Al interconnector line of thin film is laminated with an electrode, interconnector line and the like made of various types of materials having a standard electrode potential which is higher than that of Al.
  • the above-described high electrode potential elements are preferably elements, which form an intermetallic compound with Al to suppress the specific resistance of the Al interconnector line of thin film from increasing. And, by using the elements constituting the intermetallic compound with Al as the high electrode potential element, the occurrence of hillocks and the electromigration can also be suppressed as described above. Thus, the elements, which have a standard electrode potential higher than that of Al and constitute an intermetallic compound with Al, are particularly effective.
  • the Al interconnector line of thin film containing such elements can be used satisfactorily for either the signal line or the gate line of LCD and can be said having high general-purpose properties. Such elements are Pd, V, Ni, Mo, W and Co.
  • the interconnector line of thin film of the invention comprises 0.001 to 50 at % of at least one type of the first element (element satisfying at least one of an intermetallic compound forming element and a high electrode potential element) selected from Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Th, Sr, Ti, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Co, Ni, Pd, Ir, Pt, Cu, Ag, Au, Cd, Si, Pb and B and 0.01 at ppm to 50 at % with respect to the amount of the first element of at least one type of second element selected from C, O, N and H, with the balance comprising substantially Al.
  • the first element element satisfying at least one of an intermetallic compound forming element and a high electrode potential element
  • the first element selected from Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Th, Sr, Ti, Z
  • the above-described intermetallic compound forming element and high electrode potential element are contained in a range of 0.001 to 30 at % into the Al interconnector line of thin film.
  • the intermetallic compound forming element is contained in an amount of less than 0.001 at %, the above-described hillock suppressing effect cannot be obtained satisfactorily.
  • the intermetallic compound increases the resistance of the Al interconnector line of thin film and also becomes the cause of producing residues in dry etching or wet etching.
  • the high electrode potential element is contained in an amount of less than 0.1 at %, the above-described electrochemical reaction suppressing effect cannot be obtained satisfactorily.
  • a more preferable adding amount is in a range of 0.1 to 20 at %.
  • the interconnector line of thin film of the invention has a very small amount of at least one type of element selected from C, O, N and H contained together with an element which satisfies at least either the intermetallic compound forming element or the high electrode potential element.
  • This element (C, O, N, H) contained in a very small amount effectively acts on precipitation of a very small amount of the intermetallic compound, or the intermetallic compound forming element and the high electrode potential element itself. Therefore, the intermetallic compound, the intermetallic compound forming element and the high electrode potential element in the Al interconnector line of thin film can be precipitated finely and uniformly in the Al grains and grain boundaries.
  • the etching property is improved extensively. Therefore, when the interconnector line network is formed on the Al interconnector line of thin film by dry etching or the like, the occurrence of etching residues can be suppressed substantially. And, as described in detail afterward, when the sputtering method is applied to produce the Al interconnector line of thin film of the present invention, at least one type of element selected from C, O, N and H is also effective to suppress the produced amount of dust by sputtering. Therefore, the Al interconnector line of thin film with the content of fine dust reduced substantially can be obtained.
  • the first Al interconnector line of thin film of the invention excels in hillock resistance, does not cause an adverse effect on the subsequent process due to the occurrence of hillocks, and excels in forming a fine interconnector line network.
  • an electrochemical reaction with the ITO electrode or the like in an alkaline solution is suppressed by containing therein the high electrode potential element.
  • the second Al interconnector line of thin film of the invention excels in preventing the electrochemical reaction with the ITO electrode or the like and in forming the fine interconnector line network.
  • the contained amount of at least one type of element (hereinafter referred to as fine precipitating element) selected from C, O, N and H as described above shall be in a range of 0.01 at ppm to 50 at % with respect to an amount of the intermetallic compound forming element or the high electrode potential element in the Al interconnector line of thin film.
  • fine precipitating element selected from C, O, N and H as described above.
  • a more preferable contained amount of the fine precipitating element is in a range of 3 at ppm to 3 at % when C is used, and 1.5 at ppm to 7.5 at % when O, N and H are used.
  • C is used as the fine precipitating element, it is more preferable that it is in a range of 300 to 3000 at ppm with respect to the intermetallic compound forming element or the high electrode potential element, and desirably in a range of 600 to 1500 at ppm.
  • O, N and H are used as the fine precipitating element, it is more preferably in a range of 500 at ppm to 1.5 at % with respect to the amount of the intermetallic compound forming element or the high electrode potential element, and desirably in a range of 300 to 1500 at ppm.
  • C is particularly effective for the fine precipitation of the intermetallic compound or the intermetallic compound forming element. Therefore, it is preferable to use C as the fine precipitating element for the first interconnector line of thin film.
  • H acts on the fine precipitation of the intermetallic compound, the intermetallic compound forming element and the high electrode potential element and on additional improvement of the standard electrode potential of the Al interconnector line of thin film. Therefore, it is preferable to use H as the fine precipitating element for the second interconnector line of thin film. Namely, H lowers an ionization energy possessed by Al, the high electrode potential element and the intermetallic compound itself. Therefore, by using H as the fine precipitating element, the standard electrode potential of the Al interconnector line of thin film can be improved further. Otherwise, the contained amount of the high electrode potential element can be decreased.
  • H promotes the chemical reaction in wet etching and acceleratingly promotes the reaction between an etching species (radical etc.) and the constituting elements of the Al interconnector line of thin film in dry etching, thereby contributing to improvement of the fine processing accuracy in etching.
  • the contained amount of H in the Al interconnector line of thin film is preferably 500 wt ppm or below.
  • the first interconnector line of thin film of the invention can be obtained by, forming the film by sputtering under general conditions, using for example the Al sputter target having the same composition therewith. And, the second interconnector line of thin film is also obtained in the same way.
  • the sputter target used to form the first interconnector line of thin film comprises 0.001 to 30 at % of at least one type of intermetallic compound forming element constituting an intermetallic compound with Al and 0.01 at ppm to 50 at % with respect to the intermetallic compound forming element of at least one type of fine precipitating element selected from C, O, N and H, with the balance comprising substantially Al.
  • the sputter target used to form the second interconnector line of thin film comprises 0.001 to 30 at % of at least one type of high electrode potential element having a standard electrode potential higher than that of Al and 0.01 at ppm to 50 at % with respect to the amount of the high electrode potential element of at least one type of fine precipitating element selected from C, O, N and H, with the balance comprising substantially Al.
  • the sputter target of the invention can be a sputter target which comprises 0.001 to 30 at % of at least one type of first element (element satisfying at least either the intermetallic compound forming element or the high electrode potential element) selected from, for example, Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Th, Sr, Ti, Zr, V, Nb, Ta, Cr, Ma, W, Mn, Tc, Re, Fe, Co, Ni, Pd, Ir, Pt, Cu, Ag, Au, Cd, Si, Pb and B and 0.01 at ppm to 50 at % of at least one type of second element (fine precipitating element) selected from C, O, N and H, with the balance comprising substantially Al.
  • first element element satisfying at least either the intermetallic compound forming element or the high electrode potential element
  • the interconnector line of thin film of the invention can be obtained with good reproducibility.
  • the fine precipitating element also has an effect of suppressing the amount of dust produced by sputtering. Therefore, the Al interconnector line of thin film which is formed by sputtering using the sputter target of the invention has the contained amount of fine dust decreased substantially, excelling in forming the fine interconnector line network.
  • At least one type of fine precipitating element selected from C, O, N and H can be taken into the Al interconnector line of thin film by controlling, for example, the sputtering atmosphere and conditions. But, it is desirable that it is previously contained into the sputter target to obtain an effect of suppressing the occurred amount of dust by sputtering.
  • the above-described production method of the sputter target of the invention is not limited to a particular one, and it can be produced by applying a known production method such as atmosphere melting, vacuum melting, quench coagulation (e.g., spray foaming) or powder metallurgy.
  • an element satisfying at least one of the intermetallic compound forming element and the high electrode potential element and the fine precipitating element such as C are mixed in a predetermined amount with Al, and undergone high-frequency melting in vacuum to produce an ingot.
  • O, N and H are used as the fine precipitating element, taking into consideration the contained amount as the impurity element, and such gas is bubbled while melting to contain in a given amount into the ingot.
  • O, N and H are used as the fine precipitating element, it is preferable to adopt the vacuum melting in order to control their contained amount.
  • an element satisfying at least either the intermetallic compound forming element or the high electrode potential element and the fine precipitating element are mixed with Al in a given amount in the same way, undergone high-frequency melting, and sprayed by a spray to produce an ingot.
  • O, N and H are used as the fine precipitating element, taking into account the contained amount as the impurity element, such gas is injected when spraying to contain in a given amount into the ingot.
  • the fine precipitating element and an element satisfying at least either the intermetallic compounding forming element or the high electrode potential element are mixed in a given amount with Al, and subjected to atmosphere sintering, hot press, HIP or the like to produce a sinter.
  • atmosphere sintering, hot press, HIP or the like to produce a sinter.
  • O, N and H are used as the fine precipitating element, N can be contained from N 2 atmosphere when the sinter is produced.
  • an amount contained in Al mother material is specified.
  • O, N and H are contained in a predetermined amount into the sinter.
  • the quench coagulation by which a high-purity and fine-crystalline material with a relatively high density can be obtained easily, is suitable.
  • Hot processing or cold processing is generally applied to the ingot obtained by melting and the sinter obtained by powder metallurgy. And, if necessary, recrystallization heat processing and crystal orientation controlling are performed to obtain a desired sputter target.
  • recrystallization heat processing and crystal orientation controlling are performed to obtain a desired sputter target.
  • diffusion bonding or the like may be performed to obtain a target having a desired shape. But, when a large target which is used to form a large area LCD or the like is produced, it is preferable to form collectively by various types of methods in view of suppressing the occurrence of dust by sputtering.
  • the sputter target of the invention when the sputter target of the invention is produced, it is preferable to have a processing rate of 50% or more by rolling, forging or the like. This is because the heat energy obtained from the above-described processing rate is effective to produce an array of conformed crystal lattices and to decrease fine internal defects. Since the required purity, composition, plane direction and the like are different depending on the desired sputter target, the production method can be determined appropriately according to the required properties.
  • the production method for the Al interconnector line of thin film of the invention is not limited to the above-described sputtering and can be various types of film forming methods if an Al interconnector line of thin film satisfying the above-described composition can be applied.
  • the Al interconnector line of thin film of the invention is not limited to the sputter film but can be thin films produced by various types of film forming methods if they are the Al interconnector line of thin films satisfying the above-described composition.
  • the above-described Al interconnector line of thin film of the invention can be used for interconnector line, electrode and the like of various types of electronic parts. Specifically, they are a liquid crystal display (LCD) using the Al interconnector line of thin film of the invention as the gate line, signal line and the like, and semiconductor devices such as VLSI, ULSI and the like using the Al interconnector line of thin film of the invention as the interconnector line network.
  • the Al interconnector line of thin film of the invention can also be used for a surface acoustic wave oscillator (SAW) and interconnector line of electronic parts such as an SAW device using the SAW, and a thermal printer head (TPH).
  • SAW surface acoustic wave oscillator
  • TPH thermal printer head
  • the electronic parts of the invention are particularly effective for an enlarged and high-resolution LCD panel and a highly integrated semiconductor device.
  • FIG. 1 and FIG. 2 are diagrams showing one embodiment of a liquid crystal display using the Al interconnector line of thin film of the invention.
  • FIG. 1 is an equivalent circuit diagram of an active matrix liquid crystal display using a reverse staggered structure TFT
  • FIG. 2 is a sectional view showing the structure of the pertinent TFT.
  • 1 denotes a transparent glass substrate on which gate interconnector line 2 and data interconnector line 3 are disposed into the form of a matrix.
  • a TFT 4 is formed by a-Si film at respective crossings of interconnector line.
  • the sectional structure of the TFT 4 has a gate electrode 2 ′ made of the Al interconnector line of thin film (Al alloy film) of the invention formed on the transparent glass substrate 1 .
  • This gate electrode 2 ′ is integrally formed by the same material and the same process as the gate electrode 2 of FIG. 1 .
  • an Si 3 N 4 film 5 is formed as a gate insulating film thereon, a non-dope a-Si film 6 and an n + type a-Si film 7 are formed thereon, and an Mo film 8 is formed thereon.
  • a drain electrode 3 ′ and a source electrode 9 are formed thereon.
  • a surface electrode 10 and a liquid crystal capacitance 11 of each pixel are connected to the source of the TFT 4 .
  • FIG. 3 is a sectional view showing the main structure of one embodiment of a semiconductor device using the Al interconnector line of thin film of the invention. The structure of this semiconductor device will be described together with its production process.
  • 21 is a p-Si substrate, and heat oxidation is applied to this p-Si substrate to form a heat-oxidized film on the surface. Then, oxidation treatment is performed selectively excepting each region of source, gate and drain to form a field oxidized film 22 . Then, the heat-oxidized film on the respective source and drain regions is removed by the formation of the resist film and etching treatment (PEP treatment). By this PEP treatment, a gate-oxidized film 23 is formed. Then, a resist film is formed excluding the respective source and drain regions, and impurity elements are implanted into the p-Si substrate 21 to form a source region 24 and a drain region 25 . And, a silicide film 26 of Mo or W is formed on the gate-oxidized film 23 .
  • PEP treatment etching treatment
  • the phosphorus silicate glass layer 27 on the source region 24 and the drain region 25 is removed by PEP treatment.
  • a barrier layer 28 of TiN, ZrN, HfN or the like is formed on the source region 24 and the drain region 25 from which the phosphorus silicate glass layer 27 was removed.
  • the Al interconnector line of thin film (Al alloy film) of the invention is formed on the entire surface, and the PEP treatment is applied to form Al interconnector line 29 having a desired shape. And, after forming an insulation film 30 made of an Si 3 N 4 film or the like, an opening for bonding an Au lead 31 is formed by the PEP treatment to complete a semiconductor chip 32 .
  • FIG. 4 is an exploded perspective view showing the structure of main parts of one embodiment of a thermal printer head using the Al interconnector line of thin film of the invention.
  • a heat-resistant resin layer 32 made of an aromatic polyimide resin or the like is formed on a supporting substrate 31 made of, for example, an Fe—Cr alloy.
  • a base film 33 mainly consisting of, for example, Si and one of N or C is formed on the heat-resistant resin 32 by sputtering or the like.
  • An exothermic resistor 34 and respective electrodes 35 and common electrodes 36 made of the Al interconnector line of thin film of the invention are formed on the base film 33 .
  • a protective film 37 is formed to cover most of the electrodes 35 , 36 and the exothermic resistor 34 .
  • FIG. 5 , FIG. 6 and FIG. 7 are diagrams showing an SAW and an SAW device using the Al interconnector line of thin film of the invention.
  • FIG. 5 is a plan view showing the structure of an SAW according to one embodiment
  • FIG. 6 is a plan view showing the structure of an SAW according to another embodiment
  • FIG. 7 is a sectional view showing the structure of an SAW device using the SAW.
  • transducers 42 , 43 made of the Al interconnector line of thin film of the invention are formed separately on a piezoelectric substrate 41 made of an LiTaO 3 substrate and an LiNbO 3 substrate. Weighting is performed to change a crossing width of the electrodes of the transducer, e.g., the input transducer 42 , to make a filter, e.g., a PIF filter of a color TV receiver. A non-crossed part of the weighted input transducer 42 is fully covered with the Al alloy film of the invention to make large an electrode terminal 44 of the input transducer 42 .
  • a sound absorbing material 45 is disposed in an overlaid form on at least a part of the electrode terminal 44 formed in this way and the outer part of the input transducer 42 .
  • the shape of the sound absorbing material 45 is made to have a slanted side edge so to cover most of the rear edge of the input transducer 42 and to cross slantingly with a surface acoustic wave where the incident side of the surface acoustic wave enters.
  • a sound absorbing material 46 is also disposed on the outer side of the output transducer 43 .
  • FIG. 6 is a plan view showing the SAW according to another embodiment.
  • a transducer for transforming an input electric signal into a surface acoustic wave propagating on the piezoelectric substrate 41 for example, an interdigital electrode 47 made of a pair of comb-teeth type electrodes 47 a and 47 b mutually engaged, is formed on a piezoelectric substrate 41 consisting of an LiTaO 3 substrate or an LiNbO 3 substrate.
  • This interdigital electrode 47 is made of the Al alloy film of the invention.
  • Grading reflectors 48 , 49 which is to reflect the surface acoustic wave excited by the interdigital electrode 47 , and is made of the Al alloy film of the invention are formed on the piezoelectric substrate 41 at both ends of the interdigital electrode 47 .
  • the SAW shown in FIG. 5 and FIG. 6 is used as a device shown in FIG. 7 .
  • an SAW 51 is fixed onto a chip carrier 53 made of, for example, a ceramics substrate, through an adhesive member 52 , and a metallic cap 55 is put on the chip carrier 53 through a ring 54 made of a low-thermal expansion metal such as Kovar.
  • a interconnector line pattern 56 made of the Al alloy film of the invention is formed on the chip carrier 53 .
  • the SAW 51 and the interconnector line pattern 56 are electrically connected by a bonding wire 57 .
  • the interconnector line pattern 56 (each independent pattern) on the chip carrier 53 is electrically connected to an interconnector line pattern 59 on the bottom side of the chip carrier 53 via a through hole 58 having gold or the like applied on its inner wall and sealed by an insulating material such as glass.
  • an Al film having a thickness of 350 nm was formed by spin precipitation on a glass substrate having a diameter of 5 inches under conditions of a back pressure of 1 ⁇ 10 ⁇ 4 Pa, power of 200W DC and sputter time of 3 min.
  • the Al film was measured to evaluate on a specific resistance, a hillock density after the heat treatment (573 K) and the presence or not of etching residue.
  • Etching for an evaluation test of the etching residue was performed using, a BCl 3 +Cl 2 mixture gas as etching gas. The results are shown in Table 1.
  • an Al sputter target (comparative example 1-1) produced without adding Y and C and an Al sputter target (comparative example 1-2) produced under the same conditions as Example 1 excepting that C was not added were used to form Al films in the same way by sputtering. And, these Al films were also evaluated for properties in the same way as in Example 1. These results (after the heat treatment) are also shown in Table 1.
  • the Al interconnector line of thin film of the invention excels in hillock resistance and etching.
  • a good fine interconnector line network can be formed with good reliability.
  • Example 2 After producing the Al sputter targets having respective compositions shown in Table 2 in the same way as in Example 1, sputtering was performed under the same conditions as in Example 1 to produce respective Al interconnector line of thin films. These Al interconnector line of thin films were measured to evaluate their properties in the same way as in Example 1. The results are also shown in Table 2.
  • Al interconnector line of thin films were measured to evaluate their properties in the same way as in Example 1. And, the Al interconnector line of thin films of sample Nos. 16 through 21 were measured to evaluate reactivity with the ITO electrode in an alkaline solution. Reactivity with the ITO electrode in the alkaline solution was examined by a generally used electrode measuring method using silver/silver chloride electrodes as a reference electrode and ITO as the anode and respective Al alloys as the cathode. The results are also shown in Table 3.
  • material having 2.84 at % (6 wt %) of Co added to Al was undergone high-frequency melting (vacuum melting), and H 2 gas was bubbled into the melted metal to give H therein.
  • the bubbling amount of H was set so that the amount of H in an ingot becomes 980 at ppm (200 wt ppm) with respect to the amount of Co.
  • the ingot thus produced to have a target composition was undergone hot rolling and machining to obtain an Al sputter target having a diameter of 127 mm and a thickness of 5 mm.
  • an Al film having a thickness of 350 nm was formed by spin precipitation on a glass substrate having a diameter of 5 inches under conditions of a back pressure of 1 ⁇ 10 ⁇ 4 Pa, power of 200W DC and sputter time of 2 min.
  • the Al film was undergone patterning and dry etching and measured to evaluate on a specific resistance, a hillock density and the presence or not of etching residue after the heat treatment at 573 K. The results are shown in Table 4.
  • the evaluation test of the etching residue was performed using a BCl 3 +Cl 2 mixture gas as etching gas.
  • the Al interconnector line of thin film of example 4 excels in hillock resistance and etching. Therefore, by using this Al interconnector line of thin film, a good fine interconnector line network can be formed with good reproducibility.
  • the Al film containing an element having a standard electrode potential higher than Al has an electrode potential higher than that of the ITO.
  • the Al sputter targets having the compositions shown in Table 6 were produced in the same way as in Example 4, and films were formed by sputtering under the same conditions as in Example 4 to obtain the Al interconnector line of thin films. These Al interconnector line of thin films were measured to evaluate their reactivity with the ITO electrode in an alkaline solution. The results are also shown in Table 6. Comparative example 6 in Table 6 has the contained amount of high electrode potential elements fell outside the range of the invention.
  • the respective Al interconnector line of thin films having an appropriate amount of high electrode potential elements and H contained according to Example 6 excelling in specific resistance, hillock resistance, etching and resistance of reaction with the ITO electrode. Therefore, by using such an Al interconnector line of thin film, a good fine interconnector line network can be formed with good reproducibility. And, the gate line or the like of the LCD can also be formed properly.
  • the Al sputter targets having the compositions shown in Table 7 were produced in the same way as in Example 4, and films were formed by sputtering under the same conditions as in Example 4 to obtain the Al interconnector fine of thin films. These Al interconnector line of thin films were measured to evaluate their properties in the same way as in Example 1. And, the etching property of the Al interconnector line of thin films was examined on the etching rate of wet etching and dry etching respectively. The results are shown in Table 7.
  • Comparative example 7 in Table 7 shows Al films formed by sputtering in the same way respectively using the Al sputter target produced in the same conditions as Example 7 excepting that H was not added.
  • Example 7 1 Al-0.2% Au 163 ppm 3.1 ⁇ circle around (o) ⁇ 105 380 (450 ppm) 2 Al-0.9% Ag 354 ppm 4.2 ⁇ circle around (o) ⁇ 111 400 (380 ppm) 3 Al-1.2% Pd 580 ppm 4.6 ⁇ circle around (o) ⁇ 101 340 (480 ppm) Comparative example 7 1 Al-0.7% Au — 3.1 ⁇ 75 210 2 Al-2.5% Ag — 4.8 ⁇ 70 250 3 Al-19% Pd — 13.2 ⁇ circle around (o) ⁇ 55 200
  • each Al interconnector line of thin film according to Example 7 containing an appropriate amount of high electrode potential element and H excels in specific resistance and anti-hillock property and also has high etching rate property. Therefore, by using this Al interconnector line of thin film, a good fine interconnector line network can be formed with good reproducibility and high efficiency.
  • material having 0.3 at % (2 wt %) of Ta added to Al was undergone high frequency melting (vacuum melting), and O 2 was bubbled to enter oxygen when melting.
  • the entered amount of oxygen was set so that the amount of O in an ingot becomes 10 at ppm (300 wt ppm) with respect to the amount of Ta.
  • the ingot thus produced to have a target composition was undergone hot rolling and machining to obtain an Al sputter target having a diameter of 127 mm and a thickness of 5 mm.
  • an Al film having a thickness of 350 nm was formed by spin precipitation on a glass substrate having a diameter of 5 inches under conditions of a back pressure of 1 ⁇ 10 ⁇ 4 Pa, power of 200W DC and sputter time of 2 min.
  • the Al film was undergone patterning and dry etching and measured to evaluate on a specific resistance, a hillock density and the presence or not of etching residue after the heat treatment at 573 K.
  • the results are shown in Table 9.
  • the evaluation test of the etching residue was performed using a BCl3+Cl2 mixture gas as etching gas.
  • an Al sputter target (comparative example 9-1) produced with no addition of Ta and O and an Al sputter target (comparative example 9-2) produced under the same conditions excepting no addition of O as in Example 9 were used to form an Al film in the same way by sputtering. And, these Al films were also evaluated on their properties in the same way as in Example 9. These results are also shown in Table 9.
  • the Al interconnector line of thin film of Example 9 excels in anti-hillock property and etching property. Therefore, by using this Al interconnector line of thin film, a good fine interconnector line network can be formed with good reproducibility.
  • Al targets compositions shown in Table 10 using various types of elements were produced in the same way as in Example 9, films were formed by sputtering under the same conditions as in Example 9 to obtain respective Al interconnector line of thin films.
  • material having 0.28 at % (2 wt %) of Pt added to Al underwent high-frequency melting (vacuum melting) and N 2 was bubbled to enter nitrogen while melting.
  • the entered amount of nitrogen was determined so that the amount of N in an ingot becomes 19 at ppm (500 wt ppm) against the amount of Pt.
  • the ingot produced to have the target composition was undergone hot rolling and machining to obtain an Al sputter target having a diameter of 127 mm and a thickness of 5 mm.
  • an Al film having a thickness of 350 mm was formed by spin precipitation on a glass substrate having a diameter of 5 inches under conditions of a back pressure of 1 ⁇ 10 ⁇ 4 Pa, power of 200W DC and sputter time of 2 min.
  • the Al film was undergone patterning and dry etching and measured to evaluate on a specific resistance, a hillock density and the presence or not of etching residue after the heat treatment at 573 K. The results are shown in Table 11.
  • the evaluation test of the etching residue was performed using a BCl 3 +Cl 2 mixture gas as etching gas.
  • an Al sputter target (Comparative example 11-1) produced with no addition of Pt and N and an Al sputter target (Comparative example 11-2) produced under the same conditions as in Example 11 excepting that N was not added were used to form Al films by sputtering in the same way. And, these Al films were also evaluated on their properties in the same way as in Example 11. These results are also shown in Table 11.
  • the Al interconnector line of thin film of Example 11 excels in anti-hillock property and etching property. Therefore, by using this Al interconnector line of thin film, a good fine interconnector line network can be formed with good reproducibility.
  • the interconnector line of thin film of the invention has low resistance and also excels in anti-hillock property, etching property, preventing property of an electrochemical reaction with ITO or the like. Therefore, by using the interconnector line of thin film of the invention, LCD's signal lines, gate lines, and very fine interconnector line network of a semiconductor device can be formed well. And, with the sputter target of the invention, the above-described low resistance interconnector line of thin film can be formed with good reproducibility, and the occurrence of dust in sputtering can be suppressed.

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US10/732,888 1995-10-12 1996-10-14 Interconnector line of thin film, sputter target for forming the wiring film and electronic component using the same Expired - Lifetime USRE41975E1 (en)

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USRE45481E1 (en) * 1995-10-12 2015-04-21 Kabushiki Kaisha Toshiba Interconnector line of thin film, sputter target for forming the wiring film and electronic component using the same
US8492862B2 (en) 2009-11-13 2013-07-23 Semiconductor Energy Laboratory Co., Ltd. Sputtering target and manufacturing method thereof, and transistor
US8937020B2 (en) 2009-11-13 2015-01-20 Semiconductor Energy Laboratory Co., Ltd. Sputtering target and manufacturing method thereof, and transistor
US10083823B2 (en) 2009-11-13 2018-09-25 Semiconductor Energy Laboratory Co., Ltd. Sputtering target and manufacturing method thereof, and transistor
US9224609B2 (en) 2009-12-04 2015-12-29 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device using oxide semiconductor
US10332996B2 (en) 2009-12-04 2019-06-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof

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JP4488991B2 (ja) 2010-06-23
JP4130418B2 (ja) 2008-08-06
JP5175824B2 (ja) 2013-04-03
EP0855451A1 (en) 1998-07-29
JP2006111969A (ja) 2006-04-27
JP2006111970A (ja) 2006-04-27
WO1997013885A1 (en) 1997-04-17
TW318276B (ja) 1997-10-21
JP5175780B2 (ja) 2013-04-03
JP4137182B2 (ja) 2008-08-20
KR100312548B1 (ko) 2001-12-28
JP2006100822A (ja) 2006-04-13
JP4589854B2 (ja) 2010-12-01
US6329275B1 (en) 2001-12-11
EP1553205A1 (en) 2005-07-13
JP2010031378A (ja) 2010-02-12
EP0855451A4 (en) 1999-10-06
JP2004260194A (ja) 2004-09-16
JP2009149997A (ja) 2009-07-09
EP1553205B1 (en) 2017-01-25
JP4488992B2 (ja) 2010-06-23

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