US7867877B2 - Method for manufacturing SOI wafer - Google Patents

Method for manufacturing SOI wafer Download PDF

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US7867877B2
US7867877B2 US10/587,725 US58772505A US7867877B2 US 7867877 B2 US7867877 B2 US 7867877B2 US 58772505 A US58772505 A US 58772505A US 7867877 B2 US7867877 B2 US 7867877B2
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wafer
ion implanted
active layer
oxygen ion
layer
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US20070161199A1 (en
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Etsuro Morita
Akihiko Endo
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Sumco Corp
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Sumco Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26533—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically inactive species in silicon to make buried insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/974—Substrate surface preparation

Definitions

  • the present invention relates to a method for manufacturing silicon-on-insulator (SOI) wafers, and more particularly, to a method for manufacturing SOI wafers by a lamination method.
  • SOI silicon-on-insulator
  • SOI wafers are superior to conventional silicon wafers in terms of inter-element separation, reduction of parasitic capacitance between elements and substrate, and three-dimensional structure, and are used in high-speed, low-power-consumption LSI.
  • Lamination methods are used to produce SOI wafers. These methods consist of forming an oxide film and bonding two silicon wafers followed by grinding and polishing to form an SOI layer.
  • Smart Cut method (registered trademark) is included in these lamination methods.
  • Patent Document 2 Namely, in the preparation of SOI wafers by the Smart Cut method, the wafer surface is first subjected to oxidation treatment following separation to form an oxide film. The oxide film is then removed using an aqueous HF solution. Subsequently, the wafer is heat treated in a reducing atmosphere containing hydrogen to smooth the surface.
  • the uniformity of the in-plane film thickness is required to be 5 to 10% or less. If this is not satisfied, there is a considerable effect on the electrical characteristics (for example, variations in switching time) of the transistor formed on the SOI layer.
  • Patent Document 1 Japanese Unexamined Patent Application, First Publication, (JP-A) No. H09-116125
  • Patent Document 2 Japanese Unexamined Patent Application, First Publication, (JP-A) No. 2000-124092
  • an object of the present invention is to provide a method for manufacturing SOI wafers capable of achieving in-plane uniformity of thickness in a thin-film SOI layer of SOI wafers.
  • the present invention is a method for manufacturing SOI wafers in which a laminated wafer is formed by laminating an active layer wafer to a base wafer with an insulating film interposed therebetween, followed by reducing the thickness of the active layer wafer side to produce an SOI wafer, comprising the steps of: implanting oxygen ions into the active layer wafer to form an oxygen ion implanted layer on the active layer wafer; reducing the oxygen in the vicinity of the surface layer of the oxygen implanted wafer by out diffusion by heat treating in a reducing atmosphere; forming a laminated wafer by laminating the active layer wafer onto a base wafer with an insulating film interposed therebetween; allowing a portion of the active layer wafer to remain on the surface side of the oxygen ion implanted layer by grinding the active layer wafer portion of the laminated wafer; exposing the oxygen ion implanted layer by polishing or etching a portion of the remaining active layer wafer; forming an oxide film
  • the insulating film for example, oxide film
  • the implantation acceleration voltage and dose of oxygen ions implanted in the active layer wafer are suitably selected according to the target film thickness of the SOI layer. Grinding of the active layer wafer of the laminated wafer is carried out by mechanical processing. As a result of this grinding, a portion of the active layer wafer remains on the surface side of the oxygen ion implanted layer. There are no limitations on the film thickness of the remaining active layer wafer.
  • An alkaline etching solution is used for etching.
  • Oxidation treatment is carried out, for example, in an oxidizing atmosphere, and there are no limitations on the treatment temperature. Oxidation treatment is carried out, for example, in an oxidizing atmosphere at a temperature of 600 to 1000° C. There are also no limitations on the thickness of the oxide film subjected to oxidation treatment.
  • Subsequent removal of the oxide film may be carried out by cleaning with an HF solution, or etching may be used by annealing using hydrogen gas, Ar gas or a gas containing HF.
  • the SOI wafer is immersed in, for example, a mixture of organic acid and hydrofluoric acid to remove particles and metal impurities adhered to the surface of the SOI wafer.
  • an oxygen ion implanted layer is formed at a predetermined depth of an active layer wafer.
  • a laminated wafer is formed by laminating the active layer wafer to a base wafer with an insulating film interposed therebetween.
  • the active layer wafer portion of the laminated wafer is ground to leave a portion of the active layer wafer (film thickness: approx. 5 ⁇ m) on the surface side of the oxygen ion implanted layer.
  • film thickness film thickness: approx. 5 ⁇ m
  • only a portion of the remaining active layer wafer is polished.
  • a portion of the remaining active layer wafer is etched with an alkaline etching solution. As a result, the oxygen ion implanted layer is exposed.
  • Oxygen ions are (can be) uniformly implanted within the plane of the oxygen ion implanted layer of the laminated wafer. Accordingly, the exposed oxygen ion implanted layer is formed uniformly within the plane thereof and to a roughly uniform thickness. Thus, an oxide film of a predetermined thickness is formed on the exposed surface of the oxygen ion implanted layer by oxidation treatment. As a result, the thickness of the SOI layer can be reduced and the film thickness thereof can be made to be uniform.
  • the present invention is a method for manufacturing SOI wafers in which ions of hydrogen or a noble gas element are implanted in an active layer wafer through an insulating film to form an ion implanted layer on the active layer wafer, this active layer wafer is laminated to a base wafer with an insulating film interposed therebetween to form a laminated wafer, this laminated wafer is subjected to heat treatment, and a portion of the laminated wafer is separated at the boundary with the ion implanted layer to produce an SOI wafer, comprising the steps of: injecting oxygen ions from the separated surface of the SOI wafer following separation to form an oxygen ion implanted layer between the separated surface and the insulating film; exposing the oxygen ion implanted layer by polishing or etching a portion of the active layer wafer from the separated surface to the oxygen ion implanted layer; forming an oxide film of a predetermined thickness on the exposed surface of the oxygen ion implanted layer by subjecting
  • the wafer surface portion which is shallower than the oxygen ion implanted layer becomes the SOI layer. Consequently, it is necessary to heat the substrate to a temperature of 400 to 600° C. during implantation to inhibit implantation damage during implantation. In the present invention, however, since the surface layer portion is polished or etched, it is not necessary to control the substrate temperature since implantation damage is not required to be taken into consideration.
  • an ion implanted layer is first formed on an active layer wafer (such as a wafer in which an oxide film has been formed on a silicon wafer).
  • an active layer wafer such as a wafer in which an oxide film has been formed on a silicon wafer.
  • this active layer wafer is laminated onto a base wafer (such as a silicon wafer) with an insulating film interposed therebetween.
  • a laminated wafer is formed in which an insulating film is interposed at the lamination interface.
  • this laminated wafer is heat treated at a set temperature (for example, approximately 500° C.).
  • a set temperature for example, approximately 500° C.
  • oxygen ions are implanted into the exposed surface of the SOI wafer under predetermined conditions.
  • an oxygen ion implanted layer is formed to a predetermined depth.
  • the atmosphere at this time is not limited to a reducing atmosphere or oxidizing atmosphere.
  • the implanted oxygen layer becomes an SiO 2 layer, which is better suited for stopping polishing.
  • the SiO 2 layer is polished to the oxygen ion implanted layer to expose the ion implanted layer.
  • the thickness thereof can be made to be uniform.
  • a portion of the aforementioned active layer wafer is preferably polished while supplying an abrasive having an abrasive particle concentration of 1% by weight or less.
  • alkaline solution containing abrasive particles such as silicon
  • abrasive particles such as silicon
  • examples of alkaline solutions include inorganic alkaline solutions (such as KOH or NaOH), organic alkaline solutions and mixed solutions thereof.
  • a portion of the aforementioned active layer wafer is polished while supplying an abrasive in which the abrasive particle (silica) concentration is 1% by weight or less.
  • the abrasive has an abrasive particle concentration of 1% by weight or less. Accordingly, it has chemical polishing action without hardly any mechanical polishing action attributable to the abrasive particles.
  • a portion of the active layer wafer on the surface side of the SOI wafer (Si layer) is polished by the chemical polishing action of the alkaline solution.
  • the alkaline solution has a high Si/SiO 2 etching rate. Consequently, the Si layer in the form of a portion of the active layer wafer can be polished efficiently.
  • the Si layer is polished to expose the oxygen ion implanted layer.
  • Chemical polishing by the alkaline solution does not act on the oxygen ion implanted layer. Consequently, the oxygen ion implanted layer is hardly polished at all. As a result, the oxygen ion implanted layer can be uniformly exposed.
  • a portion of the aforementioned active layer wafer is preferably etched using an alkaline etching solution.
  • KOH for example, is used for the alkaline etching solution.
  • a portion of the active layer wafer is etched using an alkaline etching solution.
  • the etching speed of the alkaline etching solution is slower than that of an acidic etching solution, the selectivity of the etching rate between silicon and silicon oxide is large. As a result, the oxygen ion implanted layer can be exposed by only etching a portion of the active layer wafer.
  • an oxygen ion implanted layer is formed on an active layer wafer.
  • a laminated wafer is produced and then polished while leaving a portion of the active layer wafer.
  • a portion of the active layer wafer is polished while supplying an abrasive having an abrasive particle concentration of 1% by weight or less to expose the oxygen ion implanted layer.
  • oxygen ions are uniformly implanted within the plane of the ion implanted layer.
  • oxidation treatment is carried out to form an oxide film after which it is removed together with the oxygen ion implanted layer. As a result, the thickness of the SOI layer is reduced and the film thickness thereof is made to be uniform.
  • the thickness of the SOI layer can be reduced and the thickness thereof made to be uniform by implanting oxygen ions in an SOI wafer produced according to the Smart Cut method as well.
  • FIG. 1 is a flow chart showing a method for manufacturing SOI wafers by a lamination method as claimed in a first embodiment of the present invention.
  • FIG. 2 is a flow chart showing a method for manufacturing SOI wafers by a lamination method as claimed in a second embodiment of the present invention.
  • two silicon wafers having a diameter of 200 mm are prepared by slicing from a silicon ingot grown by the CZ method and doped with boron.
  • One of the silicon wafers is used as an active layer wafer 21 (specific resistance: 1 to 10 ⁇ cm), while the other silicon wafer is used as a base wafer 22 (specific resistance: 10 to 20 ⁇ cm).
  • the active layer wafer 21 is placed in a vacuum chamber of an ion implantation device.
  • Oxygen ions are then implanted from the surface of the active layer wafer 21 under conditions of an acceleration voltage of 170 keV and dose within the range of 5.0E16 to 5.0E17 atoms/cm 2 , and preferably a dose within the range of 1.0E17 to 3.0E17 atoms/cm 2 .
  • Oxygen ions are implanted to a predetermined depth from the surface of the active layer wafer 21 .
  • an oxygen ion implanted layer 13 is formed to a depth of about 3000 ⁇ from the surface of the active layer wafer 21 .
  • oxygen in the vicinity of the surface layer of the oxygen implanted wafer is reduced by diffusing to the outside by carrying out heat treatment in a reducing atmosphere.
  • Argon is used for the atmosphere, and heat treatment is carried out for about 2 hours at a temperature of 1100° C. or higher.
  • an oxide film (BOX layer) 12 is formed on the surface of the silicon wafer serving as the active layer wafer 21 .
  • Formation of the oxide film 12 is carried out by inserting the silicon wafer into an oxidizing oven and heating for 4 hours at a temperature of 1000° C. At this time, the thickness of the formed oxide film 12 is 1500 ⁇ . Furthermore, this step may be carried out prior to the aforementioned oxygen ion implantation step.
  • the active layer wafer 21 is laminated to the base wafer 22 with the oxygen ion implanted surface (the oxide film 12 surface) as the laminated surface.
  • the oxygen ion implanted surface the oxide film 12 surface
  • E of FIG. 1 a laminated wafer 10 is formed in which an insulating film (the oxide film 12 ) is interposed at the lamination interface.
  • lamination heat treatment is carried out on the laminated wafer 10 to strengthen the bonding between the active layer wafer 21 and the base layer 22 .
  • the conditions of this heat treatment consist of a duration of about 2 hours and a temperature of 1100° C. or higher in an oxidizing gas atmosphere.
  • a portion of the implanted oxygen ions change to an oxygen precipitate (SiO 2 ), thereby enhancing the selectivity of subsequent polishing or etching.
  • the surface of the active layer wafer 21 of laminated wafer 10 (side on the opposite side of the laminated surface) is ground to a predetermined thickness using a grinding device. A portion of the active layer wafer 21 (film thickness: approx. 5 ⁇ m) is thus allowed to remain on the surface side of the oxygen ion implanted layer 13 .
  • the surface of the ground laminated wafer 10 is then polished using an ordinary polishing device (not shown) while supplying an abrasive containing abrasive particles having an abrasive particle (silica) concentration of 1% by weight or less.
  • An organic alkaline solution having an amine as its primary component (for example, piperazine or ethylene diamine) is used for the alkaline solution.
  • a portion of the active layer wafer 21 (Si layer) is polished as a result of the chemical polishing action of the alkaline solution.
  • the alkaline solution has a high Si/SiO 2 etching rate. Consequently, the alkaline solution is able to efficiently polish a portion of the active layer wafer 21 in the form of an Si layer.
  • the Si is polished to expose the oxygen ion implanted layer 13 .
  • the oxygen ion implanted layer 13 is hardly polished at all since it is not acted on by the chemical polishing action of the alkaline solution. Furthermore, the oxygen ion implanted layer 13 is formed uniformly within the plane of the SOI wafer 11 . As a result, the oxygen ion implanted layer 13 , which is uniformly formed within the plane of the SOI wafer 11 , is exposed.
  • a portion of the active layer wafer 21 can also be etched using an alkaline etching solution. More specifically, the laminated wafer 10 on which grinding has been completed is immersed in an alkaline etching solution (liquid temperature: 85° C.) in which KOH has been dissolved in pure water (DIW). Furthermore, this alkaline etching solution contains KOH at 10% by weight. In addition, hydrogen peroxide (H 2 O 2 ) is added to this etching solution at 0.1% by weight. As a result, the Si/SiO 2 etching rate becomes 300 or more, making it difficult for the etching solution to dissolve the oxide film (SiO 2 ). Thus, when etching is carried out using this alkaline etching solution, the portion of the active layer wafer 21 remaining after the aforementioned grinding is removed, and the oxygen ion implanted layer 13 is exposed.
  • an alkaline etching solution liquid temperature: 85° C.
  • KOH has been dissolved in pure water
  • H 2 O 2 hydrogen peroxid
  • this oxide film 15 is removed by, for example, HF etching (HF solution composition: 10%, temperature: 20° C.).
  • HF etching HF solution composition: 10%, temperature: 20° C.
  • the above-mentioned series of steps may be repeated several times.
  • the thickness of the SOI layer 16 can be reduced while maintaining smoothed roughness. Namely, in the case of removing a large amount of the SOI layer 16 , the thickness of the SOI layer 16 is reduced by repeating the steps of forming the oxide film 15 by oxidation treatment followed by removing the oxide film 15 by, for example, HF etching.
  • the laminated wafer 10 is cleaned using the treatment described below.
  • the laminated wafer 10 is respectively immersed in an aqueous solution containing an organic acid in the form of citric acid in pure water at 0.06% by weight, an aqueous solution in which hydrofluoric acid has been added at 0.05% by weight, an aqueous solution in which an organic acid in the form of citric acid has been added to pure water at 0.6% by weight, and finally a room temperature, dissolved ozone aqueous solution having an ozone concentration of 5 ppm.
  • the laminated wafer 10 is immersed for 5 minutes in each solution at room temperature.
  • the laminated wafer 10 is heat treated by holding at a temperature of 1200° C. for 1 hour in an argon gas atmosphere.
  • the SOI wafer 11 is completed by carrying out the aforementioned steps.
  • the oxygen ion implanted layer 13 is formed as a result of ions being uniformly implanted and at a uniform depth within the plane of the active layer wafer 21 .
  • the active layer wafer 21 is polished until the oxygen ion implanted layer 13 is exposed.
  • the oxide film 15 is formed by oxidation treatment, and if this is removed together with the oxygen ion implanted layer 13 , the SOI layer 16 can be made to be reduced in thickness and have a uniform thickness.
  • the film thickness of the SOI layer 16 formed in this manner can be controlled at 200 to 700 ⁇ . Variation in the distribution of the in-plane film thickness of each film is within 5%.
  • FIG. 2 An explanation of a second embodiment of the present invention is provided with reference to FIG. 2 regarding a method for manufacturing SOI wafers according to the Smart Cut method.
  • two silicon wafers having a diameter of 200 mm are prepared by slicing from a silicon ingot grown by the CZ method and doped with boron.
  • One of the silicon wafers is used as an active layer wafer 121
  • the other silicon wafer is used as a base wafer 122 .
  • an oxide film 112 is formed on the surface of the silicon wafer to serve as the active layer wafer 121 .
  • the formation of the oxide film 112 is carried out by placing the silicon wafer in an oxidizing oven and heating for 4 hours at a temperature of 1000° C. At this time, the thickness of the oxide film 112 is 1500 ⁇ .
  • the active layer wafer 121 on which the oxide film 112 has been formed is placed in a vacuum chamber of an ion implantation device.
  • hydrogen ions are then implanted from the surface of the active layer wafer 121 through the oxide film 112 at an acceleration voltage of 50 keV and dose of 5.0E17 atoms/cm 2 .
  • the hydrogen ions are implanted to a predetermined depth from the surface of the active layer wafer 121 .
  • a hydrogen ion implanted layer 114 is formed to a predetermined depth (about 4500 ⁇ ) of the active layer wafer 121 .
  • the active layer wafer 121 into which hydrogen ions have been implanted is laminated to the base wafer 122 with the hydrogen ion implanted surface (the oxide film 112 surface) as the laminated surface.
  • the oxide film 112 surface the hydrogen ion implanted surface
  • separation treatment is carried out on the laminated wafer 110 in a heat treatment chamber.
  • the inside of the heat treatment chamber is maintained at a nitrogen gas atmosphere at a temperature of about 500° C. for 30 minutes.
  • bubbles of noble gas form in the hydrogen ion implanted layer 114 of the laminated wafer 110 , and a portion of the laminated wafer 110 (portion of the active layer wafer 121 ) separates at the boundary with the hydrogen ion implanted layer 114 in which said bubbles have formed.
  • an SOI wafer 111 is formed as shown in F of FIG. 2 .
  • oxygen ions are implanted in a separation surface 117 of the SOI wafer 111 after separation.
  • the implantation conditions at this time consist of an acceleration voltage of 40 keV, dose within the range of 5.0E 16 to 5.0E17 atoms/cm 2 , and preferably 1.0E17 to 3.0E17 atoms/cm 2 .
  • the oxygen ion implanted layer 113 is formed at a depth of about 500 ⁇ from the separation surface 117 of the SOI wafer 111 (between the separation surface 117 and the oxide film 112 ).
  • lamination strengthening heat treatment is carried out on the SOI wafer 111 to strengthening the bonding between the active layer wafer 121 and the base wafer 122 .
  • the conditions of this heat treatment consist of a duration of about 2 hours and a temperature of 1100° C. or higher in an Ar gas atmosphere.
  • the surface of the SOI wafer 111 is polished while supplying an abrasive having an abrasive particle concentration of 1% by weight or less to expose the surface of the oxygen ion implanted layer 113 .
  • a portion of the active layer wafer is etched using an alkaline etching solution. The methods used to polish and etch the active layer wafer are the same as those described in the aforementioned first embodiment.
  • wet heat treatment is carried out on the SOI wafer 11 for 1 hour at a temperature of 650° C. and in an oxidizing atmosphere.
  • an oxide film 115 of a predetermined thickness is formed on the exposed surface of the oxygen ion implanted layer 113 .
  • this oxide film 115 is removed by, for example, HF etching. As a result, the thickness of an SOI layer 116 is decreased and made to be uniform.
  • the method for manufacturing SOI wafers of the present invention was confirmed to improve the uniformity of the SOI layer 116 as compared with ordinary methods for manufacturing SOI wafers by CMP polishing.
  • the thickness of an SOI layer can be reduced and the thickness thereof can be made to be uniform in SOI wafers produced according to a lamination method or Smart Cut method.
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